Infineon-Technologies-IPA060N06N
| Part # | Infineon-Technologies-IPA060N06N |
Download  | Infineon-Technologies-IPA060N06N |
IPA060N06N
MOSFET
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
TO-220-FP
Features
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.ꢀrec.
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
•ꢀN-channel
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC
1)
ꢀꢀforꢀtargetꢀapplications
•ꢀPb-freeꢀleadꢀꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Drain
Pin 2
Parameter
Value
Unit
V
DS
60
V
Gate
Pin 1
R
DS(on),max
I
D
6.0
45
m
Ω
A
Source
Pin 3
Q
OSS
32
nC
nC
Q
G
(0V..10V)
27
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPA060N06N
PG-TO220-FP
060N06N
–
1)
J-STD20 and JESD22
Final Data Sheet
1
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Trademarks .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Final Data Sheet
2
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
A
=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
–
–
–
–
45
38
V
GS
=10ꢀV,ꢀ
T
C
=25ꢀ°C
V
GS
=10ꢀV,ꢀ
T
C
=100ꢀ°C
Continuous drain current
I
D
A
Pulsed drain current
1)
Avalanche energy, single pulse
2)
Gate source voltage
I
D,pulse
E
AS
–
–
–
–
–
180
60
A
T
C
=25ꢀ°C
–
mJ
V
I
D
=45ꢀA,ꢀ
R
GS
=25ꢀ
Ω
V
GS
P
tot
-20
–
20
–
Power dissipation
33
W
T
C
=25ꢀ°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Operating and storage temperature
T
j
,ꢀ
T
stg
-55
–
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
3.4
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction – case
R
thJC
R
thJA
–
4.6
K/W
K/W
–
–
Thermal resistance, junction – ambient,
Leaded
–
–
80
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
–
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
60
Max.
–
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
GS(th)
V
V
V
GS
=0ꢀV,ꢀ
I
D
=1ꢀmA
V
DS
=
V
GS
,ꢀ
I
D
=36ꢀµA
2.1
2.8
3.3
–
–
0.1
10
1
100
V
DS
=60ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=25ꢀ°C
V
DS
=60ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I
DSS
µA
nA
I
GSS
–
10
100
V
GS
=20ꢀV,ꢀ
V
DS
=0ꢀV
–
–
5.2
6.7
6.0
7.5
V
GS
=10ꢀV,ꢀ
I
D
=45ꢀA
V
GS
=6ꢀV,ꢀ
I
D
=12ꢀA
R
DS(on)
m
Ω
Gate resistance
3)
Transconductance
R
G
g
fs
–
1.6
73
2.4
–
Ω
–
36
S
|
V
DS
|>2|
I
D
|
R
DS(on)max
,ꢀ
I
D
=45ꢀA
1)
See Diagram 3 for more detailed information
2)
See Diagram 13 for more detailed information
3)
Defined by design. Not subject to production test
Final Data Sheet
3
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
1)
ꢀ
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
C
iss
C
oss
C
rss
–
–
–
2000 2500 pF
V
GS
=0ꢀV,ꢀ
V
DS
=30ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=30ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=30ꢀV,ꢀ
f
=1ꢀMHz
Output capacitance
490
22
613
44
pF
pF
Reverse transfer capacitance
V
DD
=30ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=45ꢀA,
R
G,ext
,ext=3ꢀ
Ω
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
12
12
20
7
–
–
–
–
ns
ns
ns
ns
V
DD
=30ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=45ꢀA,
R
G,ext
,ext=3ꢀ
Ω
V
DD
=30ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=45ꢀA,
R
G,ext
,ext=3ꢀ
Ω
Turn-off delay time
Fall time
V
DD
=30ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=45ꢀA,
R
G,ext
,ext=3ꢀ
Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
2)
ꢀ
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
9
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge
1)
Switching charge
Q
gs
–
–
–
–
–
–
–
–
–
nC
nC
nC
nC
nC
V
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=30ꢀV,ꢀ
I
D
=45ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DS
=0.1ꢀV,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
Q
g(th)
Q
gd
5
–
5
7
–
Q
sw
9
Gate charge total
1)
Q
g
27
4.8
24
32
32
–
Gate plateau voltage
Gate charge total, sync. FET
Output charge
1)
V
plateau
Q
g(sync)
Q
oss
–
nC
nC
40
V
DD
=30ꢀV,ꢀ
V
GS
=0ꢀV
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
–
Max.
27
Diode continuous forward current
Diode pulse current
I
S
–
–
–
–
–
A
T
C
=25ꢀ°C
I
S,pulse
V
SD
t
rr
–
180
1.2
51
A
T
C
=25ꢀ°C
Diode forward voltage
Reverse recovery time
1)
0.91
32
28
V
V
GS
=0ꢀV,ꢀ
I
F
=27ꢀA,ꢀ
T
j
=25ꢀ°C
V
R
=30ꢀV,ꢀ
I
F
=27ꢀA,ꢀd
i
F
/d
t
=100ꢀA/µs
V
R
=30ꢀV,ꢀ
I
F
=27ꢀA,ꢀd
i
F
/d
t
=100ꢀA/µs
ns
nC
Reverse recovery charge
Q
rr
–
1)
Defined by design. Not subject to production test
2)
See
″
Gate charge waveforms
″
for parameter definition
Final Data Sheet
4
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
40
50
40
30
20
10
0
30
20
10
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
T
C
ꢀ[°C]
T
C
ꢀ[°C]
P
tot
=f(
T
C
)
I
D
=f(
T
C
);ꢀ
V
GS
≥
10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
3
10
1
0.5
1 µs
10 µs
10
2
10
1
10
0
10
-1
10
0
0.2
0.1
100 µs
0.05
0.02
0.01
1 ms
10 ms
10
-1
single pulse
DC
10
-2
10
-1
10
0
10
1
10
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
=f(
t
p
);ꢀparameter:ꢀ
D
=
t
p
/
T
Final Data Sheet
5
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
180
16
10 V
160
140
120
100
80
7 V
14
6 V
12
5 V
5.5 V
10
6 V
8
6
4
2
0
5.5 V
7 V
60
10 V
5 V
40
20
0
0.0
0.5
1.0
1.5
2.0
0
20
40
60
80
100 120 140 160 180
V
DS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
I
D
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
180
120
160
140
120
100
80
100
80
60
40
20
0
60
40
175 °C
20
25 °C
0
0
2
4
6
8
0
20
40
60
80
100
V
GS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
GS
);ꢀ|
V
DS
|>2|
I
D
|
R
DS(on)max
;ꢀparameter:ꢀ
T
j
g
fs
=f(
I
D
);ꢀ
T
j
=25ꢀ°C
Final Data Sheet
6
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
12
5
11
10
9
4
3
8
max
7
360 µA
6
typ
36 µA
5
4
3
2
1
0
2
1
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
T
j
ꢀ[°C]
R
DS(on)
=f(
T
j
);ꢀ
I
D
=45ꢀA;ꢀ
V
GS
=10ꢀV
V
GS(th)
=f(
T
j
);ꢀ
V
GS
=
V
DS
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
10
4
10
3
25 °C
175 °C
25°C max
175°C max
Ciss
10
3
10
2
10
1
10
2
10
1
10
0
Coss
Crss
0
20
40
60
0.0
0.5
1.0
1.5
2.0
V
DS
ꢀ[V]
V
SD
ꢀ[V]
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
Final Data Sheet
7
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
10
2
12
30 V
48 V
10
8
12 V
25 °C
100 °C
10
1
6
150 °C
4
2
10
0
0
10
0
10
1
10
2
10
3
0
10
20
30
t
AV
ꢀ[µs]
Q
gate
ꢀ[nC]
I
AS
=f(
t
AV
);ꢀ
R
GS
=25ꢀ
Ω
;ꢀparameter:ꢀ
T
j(start)
V
GS
=f(
Q
gate
);ꢀ
I
D
=45ꢀAꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Gate charge waveforms
70
66
62
58
54
50
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
Final Data Sheet
8
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
5ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO220-FP,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
9
Rev.ꢀ2.2,ꢀꢀ2016-08-10
OptiMOS
TM
ꢀPower-Transistor,ꢀ60ꢀV
IPA060N06N
RevisionꢀHistory
IPA060N06N
Revision:ꢀ2016-08-10,ꢀRev.ꢀ2.2
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.1
2.2
Rev.2.1
2014-06-19
2016-08-10
Add Rthja parameter
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.
TrademarksꢀupdatedꢀAugustꢀ2015
OtherꢀTrademarks
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.
WeꢀListenꢀtoꢀYourꢀComments
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:
Publishedꢀby
InfineonꢀTechnologiesꢀAG
81726ꢀMünchen,ꢀGermany
©ꢀ2016ꢀInfineonꢀTechnologiesꢀAG
AllꢀRightsꢀReserved.
LegalꢀDisclaimer
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristics.ꢀWith
respectꢀtoꢀanyꢀexamplesꢀorꢀhintsꢀgivenꢀherein,ꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplication
ofꢀtheꢀdevice,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithout
limitation,ꢀwarrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
10
Rev.ꢀ2.2,ꢀꢀ2016-08-10
