Infineon-Technologies-IPA600N25NM3S

Part #Infineon-Technologies-IPA600N25NM3S
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Infineon-Technologies-IPA600N25NM3S
IPA600N25NM3S  
MOSFET  
OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
PG-TOꢀ220ꢀFP  
Features  
•ꢀIdealꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀsync.ꢀrec.  
•ꢀExcellentꢀgateꢀchargeꢀxꢀ
R

DS(on)

ꢀproductꢀ(FOM)  
•ꢀVeryꢀlowꢀon-resistanceꢀꢀR

DS(on)  

•ꢀN-channel,ꢀnormalꢀlevel  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Productꢀvalidation  
QualifiedꢀaccordingꢀtoꢀJEDECꢀStandard  
Drain  
Pin 2  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Gate  
Pin 1  
Parameter  
Value  
250  
60  
Unit  
Source  
Pin 3  
V

DS  

V
R

DS(on),max  

I

D  

m
Ω
 
A
15  
Q

oss  

46  
nC  
nC  
Q

G

(0V..10V)  
22  
Typeꢀ/ꢀOrderingꢀCode  
Package  
PG-TO 220 FullPAK  
Marking  
RelatedꢀLinks  
IPA600N25NM3S  
600N253S  
–
Final Data Sheet  
1
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
TableꢀofꢀContents  
Description .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings
 
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3  
Thermal characteristics
 
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Electrical characteristics
 
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3  
Electrical characteristics diagrams
 
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5  
Package Outlines
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision History
 
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10  
Trademarks .
 
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10  
Disclaimer .
 
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10  
Final Data Sheet  
2
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀ
T

A

=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
–
–
–
–
15  
10  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=100ꢀ°C  
Continuous drain current  
I

D  

A
Pulsed drain current

1)  

Avalanche energy, single pulse

2)  

Gate source voltage  
I

D,pulse  

E

AS  

–
–
–
–
–
60  
A
T

C

=25ꢀ°C  
–
210  
20  
mJ  
V
I

D

=15ꢀA,ꢀ
R

GS

=25ꢀ
Ω  
V

GS  

P

tot  

-20  
–
–
Power dissipation  
38  
W
T

C

=25ꢀ°C  
IEC climatic category; DIN IEC 68-1:  
55/175/56  
Operating and storage temperature  
T

j

,ꢀ
T

stg  

-55  
–
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
–
Parameter  
Symbol  
R

thJC  

Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction – case  
–
3.9  
°C/W –  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀ
T

j

=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
250  
2
Typ.  
Max.  
Drain-source breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

GS(th)  

–
–
–
V
V
V

GS

=0ꢀV,ꢀ
I

D

=1ꢀmA  
V

DS

=
V

GS

,ꢀ
I

D

=89ꢀµA  
4
–
–
0.1  
10  
1
100  
V

DS

=200ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=25ꢀ°C  
V

DS

=200ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=125ꢀ°C  
Zero gate voltage drain current  
I

DSS  

µA  
nA  
Gate-source leakage current  
Drain-source on-state resistance  
Gate resistance

3)  

I

GSS  

R

DS(on)  

R

G  

–
–
–
–
1
100  
V

GS

=20ꢀV,ꢀ
V

DS

=0ꢀV  
49.0  
2.5  
37  
60.0  
m
Ω
V

GS

=10ꢀV,ꢀ
I

D

=15ꢀA  
–
–
Ω
–
Transconductance  
g

fs  

S
|
V

DS

|
≥
2|
I

D

|
R

DS(on)max

,ꢀ
I

D

=15ꢀA  

1)

See Diagram 3 for more detailed information  

2)

See Diagram 13 for more detailed information  

3)

Defined by design. Not subject to production test.  
Final Data Sheet  
3
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance

1)  

C

iss  

C

oss  

C

rss  

–
–
–
1800 2300 pF  
V

GS

=0ꢀV,ꢀ
V

DS

=100ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=100ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=100ꢀV,ꢀ
f
=1ꢀMHz  
Output capacitance  
110  
5
–
–
pF  
pF  
Reverse transfer capacitance  
V

DD

=100ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=12ꢀA,  
R

G,ext

=1.6ꢀ
Ω  
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
10  
10  
22  
8
–
–
–
–
ns  
ns  
ns  
ns  
V

DD

=100ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=12ꢀA,  
R

G,ext

=1.6ꢀ
Ω  
V

DD

=100ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=12ꢀA,  
R

G,ext

=1.6ꢀ
Ω  
Turn-off delay time  
Fall time  
V

DD

=100ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=12ꢀA,  
R

G,ext

=1.6ꢀ
Ω  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics

2)

ꢀ  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
8
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Gate charge total

1)  

Gate plateau voltage  
Output charge  
Q

gs  

–
–
–
–
–
–
–
–
nC  
nC  
nC  
nC  
nC  
V
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
I

D

=12ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=100ꢀV,ꢀ
V

GS

=0ꢀV  
Q

g(th)  

Q

gd  

5
–
3
–
Q

sw  

5
–
Q

g  

22  
4.3  
46  
29  
–
V

plateau  

Q

oss  

–
nC  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Typ.  
–
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
15  
60  
1.2  
–
Diode continuous forward current  
Diode pulse current  
I

S  

–
–
–
–
–
A
T

C

=25ꢀ°C  
I

S,pulse  

V

SD  

t

rr  

–
A
T

C

=25ꢀ°C  
Diode forward voltage  
0.87  
127  
604  
V
V

GS

=0ꢀV,ꢀ
I

F

=15ꢀA,ꢀ
T

j

=25ꢀ°C  
V

R

=100ꢀV,ꢀ
I

F

=12ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
V

R

=100ꢀV,ꢀ
I

F

=12ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
Reverse recovery time

1)  

Reverse recovery charge

1)  

ns  
nC  
Q

rr  

–

1)

Defined by design. Not subject to production test.  

2)

See
″
Gate charge waveforms
″
for parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
40  
15.0  
35  
30  
25  
20  
15  
10  
5
12.5  
10.0  
7.5  
5.0  
2.5  
0
0.0  
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
T

C

ꢀ[°C]  
T

C

ꢀ[°C]  
P

tot

=f(
T

C

)  
I

D

=f(
T

C

);ꢀ
V

GS

≥
10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
10

2  

10

1  

single pulse  
0.01  
0.02  
0.05  
0.1  
1 µs  
10 µs  
100 µs  
10

1  

10

0  

0.2  
0.5  
1 ms  
10

0  

10

-1  

10

-2  

10

-1  

10

-2  

10

-3  

10 ms  
DC  
10

0  

10

1  

10

2  

10

3  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

V

DS

ꢀ[V]  
t

p

ꢀ[s]  
I

D

=f(
V

DS

);ꢀ
T

C

=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t

p  

Z

thJC

=f(
t

p

);ꢀparameter:ꢀ
D
=
t

p

/
T  
Final Data Sheet  
5
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
60  
150  
10 V  
8 V  
7 V  
50  
125  
6 V  
5 V  
4.5 V  
5 V  
40  
30  
20  
10  
0
100  
75  
50  
25  
0
6 V  
7 V  
8 V  
10 V  
4.5 V  
0
2
4
6
8
10  
0
10  
20  
30  
40  
50  
60  
V

DS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

DS

),ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

R

DS(on)

=f(
I

D

),ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
60  
180  
25 °C  
160  
140  
120  
100  
80  
50  
40  
30  
20  
10  
0
175 °C  
175 °C  
60  
25 °C  
40  
20  
0
0
1
2
3
4
5
6
7
0
2
4
6
8
10  
V

GS

ꢀ[V]  
V

GS

ꢀ[V]  
I

D

=f(
V

GS

),ꢀ|
V

DS

|>2|
I

D

|
R

DS(on)max

;ꢀparameter:ꢀ
T

j  

R

DS(on)

=f(
V

GS

),ꢀ
I

D

=15ꢀA;ꢀparameter:ꢀ
T

j  

Final Data Sheet  
6
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
3.0  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
890 µA  
89 µA  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
T

j

ꢀ[°C]  
T

j

ꢀ[°C]  
R

DS(on)

=f(
T

j

),ꢀ
I

D

=15ꢀA,ꢀ
V

GS

=10ꢀV  
V

GS(th

=f(
T

j

),ꢀ
V

GS

=
V

DS

;ꢀparameter:ꢀ
I

D  

Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
10

4  

10

2  

25 °C  
25 °C, max  
175 °C  
175 °C, max  
Ciss  
10

3  

10

1  

10

2  

Coss  
10

0  

10

1  

Crss  
10

0  

10

-1  

0
50  
100  
150  
200  
250  
0.00  
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
V

DS

ꢀ[V]  
V

SD

ꢀ[V]  
C
=f(
V

DS

);ꢀ
V

GS

=0ꢀV;ꢀ
f
=1ꢀMHz  
I

F

=f(
V

SD

);ꢀparameter:ꢀ
T

j  

Final Data Sheet  
7
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
10

2  

10  
50 V  
125 V  
200 V  
8
6
4
2
0
10

1  

25 °C  
10

0  

100 °C  
150 °C  
10

-1  

10

0  

10

1  

10

2  

10

3  

0
4
8
12  
16  
20  
24  
t

AV

ꢀ[µs]  
Q

gate

ꢀ[nC]  
I

AS

=f(
t

AV

);ꢀ
R

GS

=25ꢀ
Ω
;ꢀparameter:ꢀ
T

j,start  

V

GS

=f(
Q

gate

),ꢀ
I

D

=12ꢀAꢀpulsed,ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

DD  

Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
290  
280  
270  
260  
250  
240  
230  
-80  
-40  
0
40  
80  
120  
160  
200  
T

j

ꢀ[°C]  
V

BR(DSS)

=f(
T

j

);ꢀ
I

D

=1ꢀmA  
Final Data Sheet  
8
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
1
2
3
MILLIMETERS  
MIN.  
DIMENSIONS  
MAX.  
4.90  
2.80  
2.86  
0.90  
1.38  
1.50  
1.38  
1.50  
0.63  
16.15  
9.83  
10.65  
DOCUMENT NO.  
Z8B00181328  
A
A1  
A2  
b
4.50  
2.34  
2.42  
0.65  
0.95  
1.20  
0.65  
1.20  
0.40  
15.67  
8.97  
10.00  
REVISION  
03  
b1  
b2  
b3  
b4  
c
ISSUE DATE  
23.07.2018  
SCALE 5:1  
0
1
2
3
4
5mm  
D
D1  
E
e
2.54  
EUROPEAN PROJECTION  
H
28.70  
12.78  
2.83  
29.75  
13.75  
3.45  
L
L1  
øP  
Q
3.00  
3.38  
3.15  
3.50  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TOꢀ220ꢀFullPAK,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
9
Rev.ꢀ2.1,ꢀꢀ2019-09-02  

OptiMOS

TMꢀ

3ꢀPower-Transistor,ꢀ250ꢀV  
IPA600N25NM3S  
RevisionꢀHistory  
IPA600N25NM3S  
Revision:ꢀ2019-09-02,ꢀRev.ꢀ2.1  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
Release of final version  
Update package outline  
2019-07-25  
2019-09-02  
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Final Data Sheet  
10  
Rev.ꢀ2.1,ꢀꢀ2019-09-02