Infineon-Technologies-IPA65R600E6

Part #Infineon-Technologies-IPA65R600E6
Download 
Infineon-Technologies-IPA65R600E6
MOSFET  
Metall Oxide Semiconductor Field Effect Transistor  
CoolMOS E6  
650V CoolMOS

TM

E6 Power Transistor  
IPx65R600E6  
Data Sheet  
Rev. 2.
3
, 201
8
-0
2
–
28  
Power Management & Multimarket  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
1
Description  
CoolMOS

TM

is a revolutionary technology for high voltage power MOSFETs,  
designed according to the superjunction (SJ) principle and pioneered by  
Infineon Technologies. CoolMOS

TM

DE series combines the experience of the  
leading SJ MOSFET supplier with high class innovation. The resulting devices  
provide all benefits of a fast switching SJ
 
MOSFET while not sacrificing ease  
of use.
 
Extremely low switching and conduction losses make  
switching applications even more efficient, more compact, lighter, and  
cooler.  
Features  
Extremely low losses due to very low F O M R
dson
*Q
g
and E
oss  
Very high commutation ruggedness  
Easy to use/drive  
JEDEC

1)

qualified, Pb-free plating, available in Halogen free mold compound

2)  

Applications  
PFC stages, hard switching PWM stages and resonant switching PWM stages  
e.g. PC Silverbox, Adapter, LCD & PDP TV, Lightning, Server, Telecom and UPS.  
Please note: For MOSFET paralleling the use o fferrite beads on the gate or  
separate totem poles is generally recommended.  
Table 1  
Key Performance Parameters  
Parameter  
V

DS

@Tj

max  

R

DS(on), max  

Q

G, typ  

Value  
700  
0.6  
23  
Unit  
V
Ω
nC  
A
I

D, pulse  

18  
E

oss

@ 400V  
Body diode di/dt  
2
500  
µJ  
A/µs  
Type / Ordering Code  
IPD65R600E6  
IPP65R600E6  
Package  
PG-TO252  
PG-TO220  
PG-TO220 FullPAK  
Marking  
65E6600  
Related links  
IFX Design tools  
IPA65R600E6  
1) J-STD20
 
and JESD22  
2) For
 
PG-TO252: non-Halogen free (OPN: IPD65R600E6BT); Halogen free (OPN: IPD65R600E6AT)  
Rev. 2.3  
Page 2  
2018-02-28  
 

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
2
Maximum ratings  
At
T

j

= 25 °C, unless otherwise specified.  
Table 2  
Parameter  
Maximum ratings  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
7.3  
Continuous drain current

1)  

I

D  

–
–
–
–
–
–
–
–
A
T

C

= 25°C  
4.6  
18  
T

C

= 100°C  
T

C

= 25°C  
Pulsed drain current

2)  

I

D, pulse  

E

AS  

142  
I

D

= 1.3A; V

DD

= 50V;  
T

C

= 25°C (see  
Averlanche energy, single pulse  
mJ  
0.21  
1.3  
50  
I

D

=1.3 A, V

DD

=50V  
Averlanche energy, repetitive  
Avalanche current, repetitive  
MOSFET dv/dt ruggedness  
Gate source voltage  
E

AR  

I

AR  

–
–
–
–
–
–
–
A
dv/dt  
V

GS  

V/ns  
V
V

DS

=0…480 V  
static  
20  
-20  
-30  
–
30  
AC (f >1 Hz)  
T

C

= 25°C  
Power dissipation for  
Non FullPAK  
P

tot  

P

tot  

–
–
63  
W
W
Power dissipation for  
FullPAK  
–
28  
T

C

= 25°C  
150  
60  
Operating and storage temperature
 
T

j

, T

stg  

-55  
–
–
°C  
Mounting torque  
TO-220  
–
Ncm  
M3 and M3.5 screws  
M2.5 Screws  
50  
Mounting torque  
TO-220 FullPAK  
–
–
6.3  
18  
Continous diode forward current  
Diode pulse current

2)  

Reverse diode dv/dt

3)  

I

S  

–
–
–
–
–
–
A
T

C

= 25°C  
I

S, pulsed  

dv/dt  
di

f

/dt  
A
T

C

= 25°C  
15  
V/ns  
A/µs  
V

DS

=0…480 V, I

SD

≤
I

D

,  
T

C

= 125°C  
500  
Maxumum diode commutation  
speed

3)  

(see table 22)  
1) Limited
 
by T

j, max.
 

Maximum duty cycle D=0.75  
2) Pulse
 
width t

p

limited by T

j, max  

3) Identical
 
low side and high side switch with identical R

G  

Rev. 2.3  
Page 4  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
3
Thermal characteristics  
Table 3  
Parameter  
Thermal characteristics TO-220 (IPP65R600E6)  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
2.0  
–
Thermal resistance, junction-case  
R

thJC  

R

thJA  

–
–
°C/W  
62  
Thermal resistance, junction-  
ambient  
–
leaded  
260  
Soldering temperature,  
wavesoldering only allowed at leads  
T

sold  

–
–
°C  
1.6mm (0.063 in.) from  
case for 10 s  
Table 4  
Parameter  
Thermal characteristics TO-220 FullPAK (IPA65R600E6)  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
4.5  
–
Thermal resistance, junction-case  
R

thJC  

R

thJA  

–
–
°C/W  
80  
Thermal resistance, junction-  
ambient  
–
leaded  
260  
Soldering temperature,  
wavesoldering only allowed at leads  
T

sold  

–
–
°C  
1.6mm (0.063 in.) from  
case for 10 s  
Table 5  
Parameter  
Thermal characteristics TO-252
 
(IPD65R600E6)  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
–
2.0  
62  
Thermal resistance, junction-case  
R

thJC  

–
–
°C/W  
Thermal resistance, junction-ambient
 
R

thJA  

–
SMD version, device on  
PCB, minimal footprint  
35  
–
SMD version, device on  
PCB, 6cm

2

cooling area

1)  

260  
Soldering temperature,  
T

sold  

–
°C  
Reflow MSL1  
wave- &reflowsoldering only allowed  
1) Device
 
on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm

2

(one layer, 70µm thick) copper area for drain connection. PCB is vertical  
without air stream cooling.  
Rev. 2.3  
Page 5  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
4
Electrical characteristics  
Electrical characteristics, at T

j

=25°C, unless otherwise specified  
Table 6  
Parameter  
Static characteristics  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
650  
Typ.  
Max.  
–
–
Drain-source Breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

GS(th)  

V
V

GS

= 0V, I

D

= 1.0mA  
V

DS

= V

GS

, I

D

= 0.21mA  
V

DS

=600 V, V

GS

=0V,  
T

j

=25°C  
2.5  
3
3.5  
1
–
–
µA  
Zero gate Voltage drain current  
I

DSS  

–
10  
–
V

DS

=600 V, V

GS

=0V,  
T

j

=150°C  
–
–
–
100  
0.6  
Gate- source leakage current  
Drain- source on- state resistance  
Gate resistance  
I

GSS  

nA  
V

GS

= 20V, V

DS

= 0V  
0.54  
Ω
V

GS

= 10V, I

D

=2.1A,  
T

j

= 25°C  
R

DS(on)  

–
–
1.40  
10.5  
–
–
V

GS

= 10V, I

D

=2.1A,  
T

j

= 150°C  
R

G  

Ω
f= 1MHz, open drain  
Table7  
Parameter  
Dynamic characteristics  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
440  
–
–
–
Input capacitance  
Output capacitance  
C

iss  

–
pF  
V

GS

= 0V, V

DS

= 100V,  
f= 1MHz  
–
30  
21  
C

oss  

C

o(er)  

–
–
Effective output capacitance,  
energy related

1)  

V

GS

= 0V,  
V

DS

=
0…480
V  
88  
–
Effective output capacitance,  
time related

2)  

C

o(tr)  

I

D

= const  
V

GS

= 0V, V

DS

=0
…480
V  
–
–
–
–
10  
8
–
–
–
–
Turn- on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

ns  
V

DD

=400 V  
V

GS

=13 V, I

D

=3.2A,  
R

G

= 6.8
Ω  
64  
11  
Turn- off delay time  
Fall time  
(see table 20)  
1) C

o(er)

is a fixed capacitance that gives the same stored energy as C

oss

while V

DS

is rising from 0 to 80% V

(BR)DSS  

2) C

o(tr)

is a fixed capacitance that gives the same charging time as C

oss

while V

DS

is rising from 0 to 80% V

(BR)DSS  

Rev. 2.3  
Page 6  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Table 8  
Parameter  
Gate charge characteristics  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
2.75  
–
–
Gate to source charge  
Gate to drain charge  
Gate charge, total  
Q

GS  

Q

GD  

Q

G  

–
nC  
V

DD

= 480V, I

D

= 3.2A,  
V

GS

=0 to 10 V  
–
12  
23  
5.5  
–
–
–
Gate plateau voltage  
V

plateau  

V
Table 8  
Parameter  
Reverse diode characteristics  
Symbol  
Values  
Unit  
Note/Test Condition  
Min.  
Typ.  
Max.  
0.9  
–
Diode forward voltage  
V

SD  

–
V
V

GS

=0V, I

F

=3.2A,  
T

j

=25°C  
–
–
–
270  
2.0  
13  
–
–
–
Reverse recovery time  
t

rr  

ns  
nC  
A
V

R

=400 V, I

F

=3.2A,  
diF/d

t

=100 A/µs  
(see table 22)  
Reverse recovery charge  
Peak reverse recovery current  
Q

rr  

I

rrm  

Rev. 2.3  
Page 7  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
5
Electrical characteristics diagrams  
Table 10  
Power dissipation  
Non FullPAK  
Power dissipation  
FULLPAK  
P

tot

= f(T

C

)  
P

tot

= f(T

C

)  
Table 11  
Max. transient thermal impedance  
Non FullPAK  
Max. transient thermal impedance  
Non FullPAK  
Z

(thJC)

=f(tp); parameter: D=t

p

/T  
Z

(thJC)

=f(tp); parameter: D=t

p

/T  
Rev. 2.3  
Page 8  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Table 12  
Safe operating area T

C

=25°C  
Non FullPAK  
Safe operating area T

C

=25°C  
FullPAK  
I

D

=f(V

DS

); T

C

=25°C; V

GS

> 7V; D=0; parameter t

p  

I

D

=f(V

DS

); T

C

=25°C; V

GS

> 7V; D=0; parameter t

p  

Table 13  
Safe operating area T

C

=80°C  
Non FullPAK  
Safe operating area T

C

=80°C  
FullPAK  
I

D

=f(V

DS

); T

C

=80°C; V

GS

> 7V; D=0; parameter t

p  

I

D

=f(V

DS

); T

C

=80°C; V

GS

> 7V; D=0; parameter t

p  

Rev. 2.3  
Page 9  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Table 14  
Typ. output characteristics T

C

=25°C  
Typ. output characteristics T

C

=125°C  
I

D

=f(V

DS

); T

j

=25°C; parameter: V

GS  

I

D

=f(V

DS

); T

j

=125°C; parameter: V

GS  

Table 15  
Typ. drain-source on-state resistance  
Drain-source on-state resistance  
R

DS(on)

=f(I

D

); T

j

=125 °C; parameter: V

GS  

R

DS(on)

= f(T

j)

; I

D

=4.9A; V

GS

=10V  
Rev. 2.3  
Page 10  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Table 16  
Typ. transfer characteristics  
Typ. gate charge  
I

D

=f(V

GS

); V

DS

=20V  
V

GS

=f(Q

gate

), I

D

=4.9 A pulsed  
Table 17  
Avalanche energy  
Drain-source breakdown voltage  
E

AS

=f(T

j

); I

D

=1.8 A; V

DD

=50 V  
V

BR(DSS)

=f(T

j

); I

D

=1.0 mA  
Rev. 2.3  
Page 11  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Table 18  
Typ. capacitances  
Typ. C

OSS

stored energy  
C=f(V

DS

); V

GS

= 0 V; f=1 MHz  
E

OSS

=f(V

DS

)  
Table 19  
Forward characteristics of reverse diode  
I

F

=
ƒ
(V

SD

); parameter: T

j  

Rev. 2.3  
Page 12  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
6
Test circuits  
Table 20  
Switching times test circuit and waveform for inductive load  
Switching times test circuit for inductive load  
Switching time waveform  
V

DS  

90%  
V

DS  

V

GS  

10%  
V

GS  

t

d(off)  

t

r  

t

d(on)  

t

on  

t

f  

t

off  

Table 11  
Unclamped inductive load test circuit  
Unclamped inductive waveform  
V

(BR)DS  

I

D  

V

D  

V

DS  

V

DS  

V

DS  

I

D  

Table 22  
Test circuit for diode characteristics  
Diode recovery waveform  
Rev. 2.3  
Page 13  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
7
Package outlines  
Figure 1
 
Outlines TO-252,, dimensions in mm/inches  
Rev. 2.3  
Page 14  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
Figure 2
 
Outlines TO220, dimensions in mm/inches  
Rev. 2.3  
Page 15  
2018-02-28  

650V CoolMOS

TM

E6 Power Transistor  
IPD65R600E6, IPP65R600E6  
IPA65R600E6  
1
2
3
MILLIMETERS  
DIMENSIONS  
MIN.  
4.50  
2.34  
2.42  
0.65  
0.95  
0.95  
0.65  
0.65  
0.40  
15.67  
8.97  
10.00  
MAX.  
4.90  
2.85  
2.86  
0.90  
1.38  
1.51  
1.38  
1.51  
0.63  
16.15  
9.83  
10.65  
DOCUMENT NO.  
A
A1  
A2  
b
Z8B00003319  
REVISION  
07  
b1  
b2  
b3  
b4  
c
SCALE 5:1  
0
1
2
3
4
5mm  
D
EUROPEAN PROJECTION  
D1  
E
e
2.54  
H
28.70  
12.78  
2.83  
29.75  
13.75  
3.45  
L
L1  
øP  
Q
ISSUE DATE  
3.00  
3.30  
27.01.2017  
3.15  
3.50  
Figure 3
 
Outlines TO220 FullPAK, dimensions in mm  
Rev. 2.3  
Page 16  
2018-02-28  

650VꢀCoolMOSªꢀE6ꢀPowerꢀTransistor  
IPx65R600E6  
RevisionꢀHistory  
IPx65R600E6  
Revision:ꢀ2018-03-04,ꢀRev.ꢀ2.3  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.2  
2.3  
Revised TO220 Full PAK package drawing on page 16  
Outline PG-TO-220 FullPAK update  
2016-08-04  
2018-03-04  
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG  
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,  
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,  
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,  
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,  
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.  
TrademarksꢀupdatedꢀAugustꢀ2015  
OtherꢀTrademarks  
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.  
WeꢀListenꢀtoꢀYourꢀComments  
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously  
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:  
Publishedꢀby  
InfineonꢀTechnologiesꢀAG  
81726ꢀMünchen,ꢀGermany  
©ꢀ2018ꢀInfineonꢀTechnologiesꢀAG  
AllꢀRightsꢀReserved.  
LegalꢀDisclaimer  
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristicsꢀ  
(“Beschaffenheitsgarantie”)ꢀ.  
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe  
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation  
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.  
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis  
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe  
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.  
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s  
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct  
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.  
Information  
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon  
TechnologiesꢀOfficeꢀ(

).  
Warnings  
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.  
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
17  
Rev.ꢀ2.3,ꢀꢀ2018-03-04