Infineon-Technologies-IPB117N20NFD
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MOSFET
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor
OptiMOS
TM
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
DataꢀSheet
Rev.ꢀ2.0
Final
PowerꢀManagementꢀ&ꢀMultimarket
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
D²PAK
1ꢀꢀꢀꢀꢀDescription
Features
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀFastꢀDiodeꢀ(FD)ꢀwithꢀreducedꢀQ
rr
•ꢀOptimizedꢀforꢀhardꢀcommutationꢀruggedness
•ꢀVeryꢀlowꢀon-resistanceꢀ
R
DS(on)
•ꢀ175ꢀ°Cꢀoperatingꢀtemperature
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC
ꢀ1)
ꢀꢀforꢀtargetꢀapplication
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
Drain
Pin 2, tab
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
Gate
Pin 1
V
DS
200
V
R
DS(on),max
I
D
11.7
84
m
Ω
A
Source
Pin 3
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPB117N20NFD
PG-TO 263-3
117N20NF
–
1)
J-STD20 and JESD22
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
2ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
j
ꢀ=ꢀ25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
at 25 °C
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
–
–
–
–
84
60
T
C
=25ꢀ°C
T
C
=100ꢀ°C
Continuous drain current
I
D
A
Pulsed drain current
1)
I
D,pulse
E
AS
–
–
–
–
336
375
A
T
C
=25ꢀ°C
Avalanche energy, single pulse
mJ
I
D
=67ꢀA,ꢀ
R
GS
=25ꢀ
Ω
I
D
=160ꢀA,ꢀ
V
DS
=100ꢀV,
d
i
/d
t
=1500ꢀA/µs,ꢀ
T
j,max
=175ꢀ°C
Reverseꢀdiodeꢀpeakꢀd
v
/d
t
d
v
/d
t
–
–
60
kV/µs
Gate source voltage
Power dissipation
V
GS
P
tot
-20
–
–
–
20
V
–
300
W
T
C
=25ꢀ°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Operating and storage temperature
T
j
,ꢀ
T
stg
-55
–
175
°C
3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
0.3
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction – case
R
thJC
R
thJA
–
0.5
K/W
K/W
–
–
Thermal resistance, junction – ambient,
minimal footprint
–
–
–
–
62
40
Thermal resistance, junction – ambient,
6 cm
2
cooling area
2)
R
thJA
K/W
–
1)
See figure 3
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
200
2
Typ.
Max.
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
GS(th)
–
–
V
V
V
GS
=0ꢀV,ꢀ
I
D
=1ꢀmA
3
4
V
DS
=
V
GS
,ꢀ
I
D
=270ꢀµA
–
–
0.1
10
1
100
V
DS
=160ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=25ꢀ°C
V
DS
=160ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=125ꢀ°C
Zero gate voltage drain current
I
DSS
µA
nA
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
I
GSS
R
DS(on)
R
G
–
1
100
11.7
3.6
–
V
GS
=20ꢀV,ꢀ
V
DS
=0ꢀV
–
10.3
2.4
139
m
Ω
V
GS
=10ꢀV,ꢀ
I
D
=84ꢀA
–
Ω
–
Transconductance
g
fs
70
S
|
V
DS
|>2|
I
D
|
R
DS(on)max
,ꢀ
I
D
=84ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
C
iss
C
oss
C
rss
–
–
–
5000 6650 pF
V
GS
=0ꢀV,ꢀ
V
DS
=100ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=100ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=100ꢀV,ꢀ
f
=1ꢀMHz
Output capacitance
400
6
532
13
pF
pF
Reverse transfer capacitance
V
DD
=100ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=42ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
13
10
24
8
–
–
–
–
ns
ns
ns
ns
V
DD
=100ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=42ꢀA,
R
G,ext
=1.6ꢀ
Ω
V
DD
=100ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=42ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-off delay time
Fall time
V
DD
=100ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=42ꢀA,
R
G,ext
=1.6ꢀ
Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
ꢀ1)
ꢀ
Values
Typ.
25
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
Switching charge
Gate charge total
Gate plateau voltage
Output charge
Q
gs
–
–
–
–
–
–
–
nC
nC
nC
nC
V
V
DD
=100ꢀV,ꢀ
I
D
=84ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=100ꢀV,ꢀ
I
D
=84ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=100ꢀV,ꢀ
I
D
=84ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=100ꢀV,ꢀ
I
D
=84ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=100ꢀV,ꢀ
I
D
=84ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=100ꢀV,ꢀ
V
GS
=0ꢀV
Q
gd
8
–
Q
sw
Q
g
17
–
65
87
–
V
plateau
Q
oss
4.7
162
–
nC
1)
See
″
Gate charge waveforms
″
for parameter definition
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
84
Diode continous forward current
Diode pulse current
1)
Diode hard commutation current
2)
I
S
–
–
–
–
–
–
–
A
T
C
=25ꢀ°C
I
S,pulse
I
S,hard
V
SD
t
rr
–
336
160
1.2
288
–
A
T
C
=25ꢀ°C
–
A
T
C
=25ꢀ°C,ꢀ
d
i
F
/d
t
=1500ꢀA/µs
V
GS
=0ꢀV,ꢀ
I
F
=84ꢀA,ꢀ
T
j
=25ꢀ°C
V
R
=100ꢀV,ꢀ
I
F
=ꢀ56ꢀA,ꢀd
i
F
/d
t
=100ꢀA/µs
V
R
=100ꢀV,ꢀ
I
F
=ꢀ56ꢀA,ꢀd
i
F
/d
t
=100ꢀA/µs
Diode forward voltage
1
V
Reverse recovery time
144
629
ns
nC
Reverse recovery charge
Q
rr
1)
Diode pulse current is defined by thermal and/or package limits
2)
Maximum allowed hard-commutated current through diode at di/dt=1500 A/µs
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
5ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
320
100
280
240
200
160
120
80
80
60
40
20
0
40
0
0
50
100
150
200
0
50
100
150
200
T
C
ꢀ[°C]
T
C
ꢀ[°C]
P
tot
=f(
T
C
)
I
D
=f(
T
C
);ꢀ
V
GS
≥
10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
3
10
0
1 µs
10 µs
100 µs
10
2
10
1
10
0
10
-1
0.5
1 ms
0.2
10
-1
10 ms
0.1
DC
0.05
0.02
0.01
single pulse
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
=f(
t
p
);ꢀparameter:ꢀ
D
=
t
p
/
T
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
200
20
10 V
175
4.5 V
150
125
100
75
7 V
15
5 V
5 V
7 V
10 V
10
4.5 V
50
5
25
0
0
0
1
2
3
4
5
0
20
40
60
80
100
120
140
V
DS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
I
D
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
200
180
180
160
140
120
100
80
160
140
120
100
80
60
60
40
40
175 °C
20
20
0
25 °C
0
0
2
4
6
8
0
25
50
75
100
125
150
V
GS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
GS
);ꢀ|
V
DS
|>2|
I
D
|
R
DS(on)max
;ꢀparameter:ꢀ
T
j
g
fs
=f(
I
D
);ꢀ
T
j
=25ꢀ°C
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
35
4.0
3.5
30
25
20
2700 µA
3.0
270 µA
2.5
2.0
1.5
1.0
0.5
0.0
98%
15
typ
10
5
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
T
j
ꢀ[°C]
R
DS(on)
=f(
T
j
);ꢀ
I
D
=84ꢀA;ꢀ
V
GS
=10ꢀV
V
GS(th)
=f(
T
j
);ꢀ
V
GS
=
V
DS
;ꢀparameter:ꢀ
I
D
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
10
4
10
3
Ciss
25 °C
175 °C
25°C, 98%
175°C, 98%
Coss
10
3
10
2
10
1
10
0
10
2
Crss
10
1
10
0
0
40
80
120
160
0.0
0.5
1.0
1.5
2.0
V
DS
ꢀ[V]
V
SD
ꢀ[V]
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
10
2
10
25 °C
8
160 V
100 °C
100 V
6
125 °C
40 V
10
1
4
2
0
10
0
10
0
10
1
10
2
10
3
0
20
40
60
80
t
AV
ꢀ[µs]
Q
gate
ꢀ[nC]
I
AS
=f(
t
AV
);ꢀ
R
GS
=25ꢀ
Ω
;ꢀparameter:ꢀ
T
j(start)
V
GS
=f(
Q
gate
);ꢀ
I
D
=84ꢀAꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Gate charge waveforms
230
220
210
200
190
180
170
160
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
6ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TOꢀ263-3,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2014-02-06
OptiMOS
TM
FDꢀPower-Transistor,ꢀ200ꢀV
IPB117N20NFD
RevisionꢀHistory
IPB117N20NFD
Revision:ꢀ2014-02-06,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
2.0
Subjects (major changes since last revision)
Release of final version
2014-02-06
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limitation,ꢀwarrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
12
Rev.ꢀ2.0,ꢀꢀ2014-02-06
