Infineon-Technologies-IPB80N06S4-07

Part #Infineon-Technologies-IPB80N06S4-07
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Infineon-Technologies-IPB80N06S4-07
IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
OptiMOS

®

-T2
Power-Transistor  
Product Summary  
V

DS  

60  
7.1  
80  
V
R

DS(on),max

(SMD version)  
m
Ω
 
A
I

D  

Features  
• N-channel – Enhancement mode  
PG-TO263-3-2  
PG-TO262-3-1  
PG-TO220-3-1  
• AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green Product (RoHS compliant)  
• 100% Avalanche tested  
Type  
Package  
Marking  
4N0607  
4N0607  
4N0607  
IPB80N06S4-07  
IPI80N06S4-07  
IPP80N06S4-07  
PG-TO263-3-2  
PG-TO262-3-1  
PG-TO220-3-1  
Maximum ratings,
at
T

j

=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
T

C

=25°C,
V

GS

=10V

1)  

I

D  

Continuous drain current  
80  
58  
A
T

C

=100°C,
V

GS

=10V

2)  

Pulsed drain current

2)  

I

D,pulse  

E

AS  

T

C

=25°C  
320  
71  
Avalanche energy, single pulse

2)  

Avalanche current, single pulse  
Gate source voltage  
I

D

=40A  
mJ  
A
I

AS  

–
80  
V

GS  

–
±20  
79  
V
P

tot  

T

C

=25°C  
Power dissipation  
W
T

j

,
T

stg  

Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
–
–
-55 … +175  
55/175/56  
°C  
Rev. 1.0  
page 1  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Thermal characteristics

2)  

R

thJC  

R

thJA  

R

thJA  

Thermal resistance, junction – case  
–
–
–
–
–
–
1.9  
62  
K/W  
Thermal resistance, junction –  
ambient, leaded  
SMD version, device on PCB  
minimal footprint  
–
–
–
–
62  
40  
6 cm

2

cooling area

3)  

Electrical characteristics,
at
T

j

=25 °C, unless otherwise specified  
Static characteristics  
V

(BR)DSS  

V

GS(th)  

I

DSS  

V
V
V

GS

=0V,
I

D

= 1mA  

DS

=
V

GS

,
I

D

=40µA  

DS

=60V,
V

GS

=0V  
Drain-source breakdown voltage  
Gate threshold voltage  
60  
2.0  
–
–
–
4.0  
1
V
3.0  
0.01  
Zero gate voltage drain current  
µA  
V

DS

=60V,
V

GS

=0V,  
–
5
100  
T

j

=125°C

2)  

I

GSS  

V
V

GS

=20V,
V

DS

=0V  

GS

=10V,
I

D

=80A  
Gate-source leakage current  
–
–
–
100 nA  
R

DS(on)  

Drain-source on-state resistance  
6.2  
7.4  
m
Ω  
V

GS

=10V,
I

D

=80A,  
–
5.9  
7.1  
SMD version  
Rev. 1.0  
page 2  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Dynamic characteristics

2)  

Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C

iss  

C

oss  

C

rss  

t

d(on)  

t

r  

–
–
–
–
–
–
–
3460  
850  
35  
15  
3
4500 pF  
1105  
V

GS

=0V,
V

DS

=25V,  
f
=1MHz  
70  
–
–
–
–
ns  
V

DD

=30V,
V

GS

=10V,  
I

D

=80A,
R

G

=3.5
Ω  
t

d(off)  

t

f  

Turn-off delay time  
Fall time  
23  
5
Gate Charge Characteristics

2)  

Gate to source charge  
Gate to drain charge  
Gate charge total  
Q

gs  

–
–
–
–
21  
5.5  
43  
27  
11  
56  
–
nC  
Q

gd  

V
V

DD

=48V,
I

D

=80A,  

GS

=0 to 10V  
Q

g  

V

plateau  

Gate plateau voltage  
6.0  
V
A
Reverse Diode  
Diode continous forward current

2)  

Diode pulse current

2)  

I

S  

–
–
–
–
80  
T

C

=25°C  
I

S,pulse  

320  
V

GS

=0V,
I

F

=80A,  
V

SD  

Diode forward voltage  
Reverse recovery time

2)  

Reverse recovery charge

2)  

0.6  
0.95  
39  
1.3  
V
T

j

=25°C  
V

R

=30V,
I

F

=50A,  
d
i

F

/d
t
=100A/µs  
t

rr  

–
–
–
ns  
nC  
Q

rr  

–
38  

1)

Current is limited by bondwire; with an
R

thJC

= 1.9K/W the chip is able to carry 82A at 25°C.  

2)

Specified by design. Not subject to production test.  

3)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm

2

(one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
1 Power dissipation  
2 Drain current  
P

tot

= f(
T

C

);
V

GS

≥
6 V  
I

D

= f(
T

C

);
V

GS

≥
6 V; SMD  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
80  
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T

C

[°C]  
T

C

[°C]  
3 Safe operating area  
4 Max. transient thermal impedance  

thJC

= f(
t

p

)  
I

D

= f(
V

DS

);
T

C

= 25 °C;
D
= 0; SMD  
parameter:
t

p  

Z
parameter:
D
=
t

p

/
T  
10

1  

1000  
100  
10  
1 µs  
0.5  
10

0  

10 µs  
0.1  
0.05  
10

-1  

100 µs  
0.01  
10

-2  

single pulse  
1 ms  
10

-3  

1
10

-6  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

0.1  
1
10  
100  
t

p

[s]  
V

DS

[V]  
Rev. 1.0  
page 4  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
5 Typ. output characteristics  
I

D

= f(
V

DS

);
T

j

= 25 °C; SMD  
parameter:
V

GS  

6 Typ. drain-source on-state resistance  

DS(on)

= f(
I

D

);
T

j

= 25 °C; SMD  
R
parameter:
V

GS  

320  
280  
240  
200  
160  
120  
80  
17  
6 V  
5 V  
10 V  
7 V  
8 V  
15  
13  
11  
9
7 V  
8 V  
6 V  
5 V  
7
10 V  
40  
0
5
0
0
1
2
3
4
5
6
80  
160  
240  
320  
V

DS

[V]  
I

D

[A]  
7 Typ. transfer characteristics  
I

D

= f(
V

GS

);
V

DS

= 6V  
parameter:
T

j  

8 Typ. drain-source on-state resistance  
R

DS(on)

= f(
T

j

);
I

D

= 80 A;
V

GS

= 10 V; SMD  
320  
280  
240  
200  
160  
120  
80  
12  
-55 °C  
10  
8
25 °C  
175 °C  
6
40  
0
4
2
3
4
5
6
7
8
-60  
-20  
20  
60  
T

j

[°C]  
100  
140  
180  
V

GS

[V]  
Rev. 1.0  
page 5  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
9 Typ. gate threshold voltage  

GS(th)

= f(
T

j

);
V

GS

=
V

DS  

10 Typ. capacitances  
V
C
= f(
V

DS

);
V

GS

= 0 V;
f
= 1 MHz  
parameter:
I

D  

4
10

4  

Ciss  
3.5  
3
400 µA  
10

3  

Coss  
40 µA  
2.5  
2
10

2  

1.5  
Crss  
10

1  

1
0
5
10  
15  
20  
25  
30  
-60  
-20  
20  
60  
T

j

[°C]  
100  
140  
180  
V

DS

[V]  
11 Typical forward diode characteristicis  
12 Avalanche characteristics  

A S

= f(
t

AV  

IF = f(V

SD

)  
I
)
parameter:
T

j  

parameter: T

j(start)  

10

3  

100  
25 °C  
100 °C  
10

2  

10  
1
150 °C  
25 °C  
175 °C  
10

1  

10

0  

0.1  
0.1  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
1
10  
100  
1000  
V

SD

[V]  
t

AV

[µs]  
Rev. 1.0  
page 6  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
13 Avalanche energy  
14 Drain-source breakdown voltage  

BR(DSS)

= f(
T

j

);
I

D

= 1 mA  
E

AS

= f(
T

j

);
I

D

= 40 A  
V
66  
64  
62  
60  
58  
56  
80  
60  
40  
20  
0
-55  
-15  
25  
65  
105  
145  
25  
75  
125  
175  
T

j

[°C]  
T

j

[°C]  
15 Typ. gate charge  

GS

= f(
Q

gate

);
I

D

= 80 A pulsed  
16 Gate charge waveforms  
V
parameter:
V

DD  

10  
9
8
7
6
5
4
3
2
1
12 V  
48 V  
V

GS  

Q

g  

V

g
s(th)  

Q

g
(
t
h)  

Q

sw  

Q

g
d  

Q

g
ate  

Q

g
s  

0
0
10  
20  
Q
30  

gate

[nC]  
40  
50  
Rev. 1.0  
page 7  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
©
Infineon Technologies AG 2009  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions  
or characteristics. With respect to any examples or hints given herein, any typical values stated  
herein and/or any information regarding the application of the device, Infineon Technologies hereby  
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties  
of non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact  
the nearest Infineon Technologies Office (

).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the  
express written approval of Infineon Technologies, if a failure of such components can reasonably be  
expected to cause the failure of that life-support device or system or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2009-03-24  

IPB80N06S4-07  
IPI80N06S4-07, IPP80N06S4-07  
Revision History  
Version  
Date  
Changes  
Revision 1.0  
24.03.2009 Final data sheet  
Rev. 1.0  
page 9  
2009-03-24