Infineon-Technologies-IPD50N06S2L-13
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IPD50N06S2L-13
Opti
MOS
®
Power-Transistor
Product Summary
Features
V
DS
55
12.7
50
V
• N-channel Logic Level – Enhancement mode
R
DS(on),max
(SMD version)
m
Ω
A
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
•
Green package (lead free)
• Ultra low Rds(on)
I
D
PG-TO252-3-11
• 100% Avalanche tested
Type
Package
Marking
IPD50N06S2L-13
PG-TO252-3-11 PN06L13
Maximum ratings,
at
T
j
=25 °C, unless otherwise specified
Value
Parameter
Symbol
Conditions
Unit
Continuous drain current
1)
I
D
T
C
=25 °C,
V
GS
=10 V
T
C
=100 °C,
50
A
50
V
GS
=10 V
2)
Pulsed drain current
2)
I
D,pulse
E
AS
T
C
=25 °C
I
D
=50A
200
240
Avalanche energy, single pulse
Gate source voltage
mJ
V
V
GS
±20
P
tot
T
C
=25 °C
Power dissipation
136
W
°C
T
j
,
T
stg
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
-55 … +175
55/175/56
Rev. 1.0
page 1
2006-07-18
IPD50N06S2L-13
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Thermal characteristics
R
thJC
R
thJA
R
thJA
Thermal resistance, junction – case
–
–
–
–
1.1
K/W
Thermal resistance, junction –
ambient, leaded
100
SMD version, device on PCB
minimal footprint
–
–
–
–
75
50
6 cm
2
cooling area
3)
Electrical characteristics,
at
T
j
=25 °C, unless otherwise specified
Static characteristics
V
(BR)DSS
V
GS(th)
V
V
GS
=0 V,
I
D
= 1 mA
DS
=
V
GS
,
I
D
=80 µA
Drain-source breakdown voltage
Gate threshold voltage
55
–
–
V
1.2
1.6
2.0
V
DS
=55 V,
V
GS
=0 V,
I
DSS
Zero gate voltage drain current
–
–
0.01
1
1
µA
T
j
=25 °C
V
DS
=55 V,
V
GS
=0 V,
100
T
j
=125 °C
2)
I
GSS
V
V
V
GS
=20 V,
V
DS
=0 V
GS
=4.5 V,
I
D
=34 A
GS
=10 V,
I
D
=34 A
Gate-source leakage current
Drain-source on-state resistance
Drain-source on-state resistance
–
–
–
1
100 nA
16.7
12.7 m
Ω
R
DS(on)
R
DS(on)
12.7
10.2
m
Ω
Rev. 1.0
page 2
2006-07-18
IPD50N06S2L-13
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics
2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C
iss
C
oss
C
rss
t
d(on)
t
r
–
–
–
–
–
–
–
1800
508
172
9
–
–
–
–
–
–
–
pF
ns
V
GS
=0 V,
V
DS
=25 V,
f
=1 MHz
29
V
DD
=30 V,
V
GS
=10 V,
I
D
=50 A,
R
G
=3.6
Ω
t
d(off)
t
f
Turn-off delay time
Fall time
43
12
Gate Charge Characteristics
2)
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
–
–
–
–
6
8
26
69
–
nC
Q
gd
18
54
3.4
V
V
DD
=44 V,
I
D
=50 A,
GS
=0 to 10 V
Q
g
V
plateau
Gate plateau voltage
V
A
Reverse Diode
Diode continous forward current
2)
Diode pulse current
2)
I
S
–
–
–
–
50
T
C
=25 °C
I
S,pulse
200
V
GS
=0 V,
I
F
=50 A,
V
SD
Diode forward voltage
Reverse recovery time
2)
Reverse recovery charge
2)
–
–
–
0.9
52
99
1.3
V
T
j
=25 °C
V
R
=30 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/µs
t
rr
–
–
ns
nC
V
R
=30 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/µs
Q
rr
1)
Current is limited by bondwire; with an RthJC=1.1 K/W the chip is able to carry 72 A. For detailed
2)
Defined by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2006-07-18
IPD50N06S2L-13
1 Power dissipation
2 Drain current
P
tot
= f(
T
C
);
V
GS
≥
6 V
I
D
= f(
T
C
);
V
GS
≥
10 V
160
140
120
100
80
50
40
30
20
10
0
60
40
20
0
0
50
100
150
200
0
50
100
150
200
T
C
[°C]
T
C
[°C]
3 Safe operating area
4 Max. transient thermal impedance
thJC
= f(
t
p
)
I
D
= f(
V
DS
);
T
C
= 25 °C;
D
= 0
parameter:
t
p
Z
parameter:
D
=
t
p
/
T
1000
100
10
1 µs
10
0
10 µs
100 µs
1 ms
0.1
10
-1
0.05
0.02
0.01
10
-2
single pulse
10
-3
1
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
0.1
1
10
100
t
p
[s]
V
DS
[V]
Rev. 1.0
page 4
2006-07-18
IPD50N06S2L-13
5 Typ. output characteristics
I
D
= f(
V
DS
);
T
j
= 25 °C
parameter:
V
GS
6 Typ. drain-source on-state resistance
DS(on)
= (
I
D
);
T
j
= 25 °C
R
parameter:
V
GS
200
55
10 V
3.5 V
5 V
3 V
160
45
120
80
40
0
35
25
15
4 V
4 V
3.5 V
3 V
4.5 V
5 V
10 V
2.5 V
4
5
0
0
1
2
3
5
6
7
20
40
60
80
100
V
DS
[V]
I
D
[A]
7 Typ. transfer characteristics
I
D
= f(
V
GS
);
V
DS
= 6V
parameter:
T
j
8 Typ. Forward transconductance
g
fs
= f(
I
D
);
T
j
= 25°C
parameter:
g
fs
100
90
80
70
60
50
40
30
20
10
0
120
100
80
60
40
20
0
-55 °C
175 °C
25 °C
1
2
3
4
5
0
20
40
60
80
100
I
D
[A]
V
GS
[V]
Rev. 1.0
page 5
2006-07-18
IPD50N06S2L-13
9 Typ. Drain-source on-state resistance
DS(ON)
= f(
T
j
)
10 Typ. gate threshold voltage
GS(th)
= f(
T
j
);
V
GS
=
V
DS
R
V
parameter:
I
D
= 34 A; V
GS
= 10 V
parameter:
I
D
25
2.5
20
15
10
5
2
1.5
1
400 µA
80 µA
0.5
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
T
j
[°C]
100
140
180
T
j
[°C]
11 Typ. capacitances
12 Typical forward diode characteristicis
C
= f(
V
DS
);
V
GS
= 0 V;
f
= 1 MHz
IF = f(V
SD
)
parameter:
T
j
10
4
10
3
10
2
10
1
Ciss
10
3
Coss
Crss
25 °C
175 °C
10
2
10
0
0
5
10
15
20
25
30
0
0.2 0.4 0.6 0.8
SD
[V]
1
1.2 1.4 1.6
V
DS
[V]
V
Rev. 1.0
page 6
2006-07-18
IPD50N06S2L-13
13 Typical avalanche energy
AS
= f(
T
j
)
14 Typ. gate charge
E
V
GS
= f(
Q
gate
);
I
D
= 50 A pulsed
parameter:
I
D
1000
12
10
8
12.5 A
800
600
400
200
0
44 V
11 V
6
4
2
0
25 A
50 A
25
50
75
100
125
150
175
0
10
20
30
40
50
60
T
j
[°C]
Q
gate
[nC]
15 Typ. drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS)
= f(
T
j
);
I
D
= 1 mA
66
64
62
60
58
56
54
52
50
V
GS
Q
g
Q
gate
Q
gd
Q
gs
-60
-20
20
60
100
140
180
T
j
[°C]
Rev. 1.0
page 7
2006-07-18
IPD50N06S2L-13
Published by
Infineon Technologies AG
Am Campeon 1-12
D-85579 Neubiberg
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices, please contact your
nearest Infineon Technologies Office (www.infineon.com)
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies Office.
Infineon Technologies’ components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies, if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2006-07-18
