Infineon-Technologies-IPD60R145CFD7
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IPD60R145CFD7
MOSFET
DPAK
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower
MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand
pioneeredꢀbyꢀInfineonꢀTechnologies.ꢀTheꢀlatestꢀCoolMOS™ꢀCFD7ꢀisꢀthe
successorꢀtoꢀtheꢀCoolMOS™ꢀCFD2ꢀseriesꢀandꢀisꢀanꢀoptimizedꢀplatform
tailoredꢀtoꢀtargetꢀsoftꢀswitchingꢀapplicationsꢀsuchꢀasꢀphase-shiftꢀfull-bridge
(ZVS)ꢀandꢀLLC.ꢀResultingꢀfromꢀreducedꢀgateꢀchargeꢀ(Q
g
),ꢀbest-in-class
reverseꢀrecoveryꢀchargeꢀ(Q
rr
)ꢀandꢀimprovedꢀturnꢀoffꢀbehaviorꢀCoolMOS™
CFD7ꢀoffersꢀhighestꢀefficiencyꢀinꢀresonantꢀtopologies.ꢀAsꢀpartꢀofꢀInfineon’s
fastꢀbodyꢀdiodeꢀportfolio,ꢀthisꢀnewꢀproductꢀseriesꢀblendsꢀallꢀadvantagesꢀof
aꢀfastꢀswitchingꢀtechnologyꢀtogetherꢀwithꢀsuperiorꢀhardꢀcommutation
robustness,ꢀwithoutꢀsacrificingꢀeasyꢀimplementationꢀinꢀtheꢀdesign-in
process.ꢀTheꢀCoolMOS™ꢀCFD7ꢀtechnologyꢀmeetsꢀhighestꢀefficiencyꢀand
reliabilityꢀstandardsꢀandꢀfurthermoreꢀsupportsꢀhighꢀpowerꢀdensity
solutions.ꢀAltogether,ꢀCoolMOS™ꢀCFD7ꢀmakesꢀresonantꢀswitching
topologiesꢀmoreꢀefficient,ꢀmoreꢀreliable,ꢀlighterꢀandꢀcooler.
tab
2
1
3
Drain
Pin 2, Tab
Gate
Pin 1
Features
•ꢀUltra-fastꢀbodyꢀdiode
Source
Pin 3
•ꢀLowꢀgateꢀcharge
•ꢀBest-in-classꢀreverseꢀrecoveryꢀchargeꢀ(Q
rr
)
•ꢀImprovedꢀMOSFETꢀreverseꢀdiodeꢀdv/dtꢀandꢀdi
F
/dtꢀruggedness
•ꢀLowestꢀFOMꢀR
DS(on)
*Q
g
ꢀandꢀR
DS(on)
*E
oss
•ꢀBest-in-classꢀR
DS(on)
ꢀinꢀSMDꢀandꢀTHDꢀpackages
Benefits
•ꢀExcellentꢀhardꢀcommutationꢀruggedness
•ꢀHighestꢀreliabilityꢀforꢀresonantꢀtopologies
•ꢀHighestꢀefficiencyꢀwithꢀoutstandingꢀease-of-useꢀ/ꢀperformanceꢀtradeoff
•ꢀEnablingꢀincreasedꢀpowerꢀdensityꢀsolutions
Potentialꢀapplications
SuiteableꢀforꢀSoftꢀSwitchingꢀtopologies
Optimizedꢀforꢀphase-shiftꢀfull-bridgeꢀ(ZVS),ꢀLLCꢀApplicationsꢀ–ꢀServer,
Telecom,ꢀEVꢀCharging
ProductꢀValidation:
ꢀFullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrial
Applications
Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate
orꢀseparateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
V
DS
@ T
j,max
R
DS(on),max
Value
650
145
31
Unit
V
m
Ω
nC
A
Q
g,typ
I
D,pulse
58
E
oss
@ 400V
Body diode di
F
/dt
3.6
µJ
1300
A/µs
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPD60R145CFD7
PG-TO 252-3
60R145F7
see Appendix A
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
Test Circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Appendix A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Trademarks .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
j
ꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
–
–
–
–
16
10.0
T
C
=25°C
A
Continuous drain current
1)
I
D
T
C
=100°C
Pulsed drain current
2)
I
D,pulse
E
AS
E
AR
I
AS
–
–
–
–
–
–
–
–
–
–
–
–
–
–
58
A
T
C
=25°C
Avalanche energy, single pulse
Avalanche energy, repetitive
Avalanche current, single pulse
MOSFET dv/dt ruggedness
Gate source voltage (static)
Gate source voltage (dynamic)
Power dissipation
–
68
mJ
mJ
A
I
D
=4.1A; V
DD
=50V; see table 10
–
0.34
4.1
120
20
I
D
=4.1A; V
DD
=50V; see table 10
–
–
dv/dt
V
GS
V
GS
P
tot
T
stg
T
j
–
V/ns
V
DS
=0…400V
-20
-30
–
V
static;
30
V
AC (f>1 Hz)
83
W
°C
°C
T
C
=25°C
Storage temperature
-55
-55
–
150
150
–
–
–
Operating junction temperature
Mounting torque
–
Ncm –
Continuous diode forward current
Diode pulse current
2)
I
S
–
16
A
A
T
C
=25°C
I
S,pulse
–
58
T
C
=25°C
V
DS
=0…400V,ꢀ
I
SD
<=16A,ꢀ
T
j
=25°Cꢀꢀꢀꢀꢀ
see table 8
Reverse diode dv/dt
3)
dv/dt
–
–
70
V/ns
V
DS
=0…400V,ꢀ
I
SD
<=16A,ꢀ
T
j
=25°Cꢀꢀꢀꢀꢀ
see table 8
Maximum diode commutation speed
Insulation withstand voltage
di
F
/dt
–
–
–
–
1300 A/
µ
s
n.a.
V
ISO
V
V
rms
,ꢀ
T
C
=25°C,ꢀ
t
=1min
1)
Limited by T
j max
.
2)
Pulse width t
p
limited by T
j,max
3)
Identical low side and high side switch with identical R
G
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
1.51
62
Thermal resistance, junction
– case
R
thJC
–
–
–
–
°C/W –
Thermal resistance, junction
– ambient
R
thJA
°C/W device
on PCB, minimal footprint
Device on 40mm*40mm*1.5mm
epoxy PCB FR4 with 6cm² (one
Thermal resistance, junction
– ambient
for SMD version
layer, 70µm thickness) copper area
for drain connection and cooling.
PCB is vertical without air stream
cooling.
R
thJA
–
–
35
–
45
°C/W
Soldering temperature, wave- & reflow
soldering allowed
T
sold
260
°C
reflow MSL1
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀ
T
j
=25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
600
3.5
Typ.
Max.
–
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
(GS)th
–
V
V
V
GS
=0V,ꢀ
I
D
=1mA
4
4.5
V
DS
=
V
GS
,ꢀ
I
D
=0.34mA
–
–
–
7
1
37
V
DS
=600V,ꢀ
V
GS
=0V,ꢀ
T
j
=25°C
V
DS
=600V,ꢀ
V
GS
=0V,ꢀ
T
j
=125°C
Zero gate voltage drain current
1)
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
I
DSS
µ
A
nA
Ω
I
GSS
–
–
100
V
GS
=20V,ꢀ
V
DS
=0V
–
–
0.127 0.145
0.29
V
GS
=10V,ꢀ
I
D
=6.8A,ꢀ
T
j
=25°C
V
GS
=10V,ꢀ
I
D
=6.8A,ꢀ
T
j
=150°C
R
DS(on)
R
G
–
–
10
–
Ω
f
=1MHz,ꢀopenꢀdrain
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
1330
24
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance
C
iss
–
–
–
–
pF
pF
V
GS
=0V,ꢀ
V
DS
=400V,ꢀ
f
=250kHz
V
GS
=0V,ꢀ
V
DS
=400V,ꢀ
f
=250kHz
C
oss
Effective output capacitance, energy
related
2)
C
o(er)
C
o(tr)
t
d(on)
t
r
–
–
–
–
–
–
44
–
–
–
–
–
–
pF
pF
ns
ns
ns
ns
V
GS
=0V,ꢀ
V
DS
=0…400V
Effective output capacitance, time
related
3)
453
27
I
D
=constant,ꢀ
V
GS
=0V,ꢀ
V
DS
=0…400V
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=7.3A,
R
G
=5.3
Ω
;ꢀseeꢀtableꢀ9
Turn-on delay time
Rise time
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=7.3A,
R
G
=5.3
Ω
;ꢀseeꢀtableꢀ9
18
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=7.3A,
R
G
=5.3
Ω
;ꢀseeꢀtableꢀ9
Turn-off delay time
Fall time
t
d(off)
t
f
71
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=7.3A,
R
G
=5.3
Ω
;ꢀseeꢀtableꢀ9
7.2
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
Values
Typ.
8
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
–
–
–
–
–
–
–
–
nC
nC
nC
V
V
DD
=400V,ꢀ
I
D
=7.3A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=400V,ꢀ
I
D
=7.3A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=400V,ꢀ
I
D
=7.3A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=400V,ꢀ
I
D
=7.3A,ꢀ
V
GS
=0ꢀtoꢀ10V
Q
gd
10
Q
g
31
Gate plateau voltage
V
plateau
5.7
1)
Maximum specification is defined by calculated six sigma upper confidence bound
2)
ꢀ
C
o(er)
ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀ
C
oss
ꢀwhileꢀ
V
DS
ꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
3)
ꢀ
C
o(tr)
ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀ
C
oss
ꢀwhileꢀ
V
DS
ꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics
Values
Typ.
1.0
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Diode forward voltage
Reverse recovery time
V
SD
t
rr
–
–
V
V
GS
=0V,ꢀ
I
F
=6.8A,ꢀ
T
j
=25°C
V
R
=400V,ꢀ
I
F
=7.3A,ꢀd
i
F
/d
t
=100A/µs;
see table 8
–
–
–
102
0.45
8
153
0.9
–
ns
V
R
=400V,ꢀ
I
F
=7.3A,ꢀd
i
F
/d
t
=100A/µs;
see table 8
Reverse recovery charge
Q
rr
I
rrm
µC
A
V
R
=400V,ꢀ
I
F
=7.3A,ꢀd
i
F
/d
t
=100A/µs;
see table 8
Peak reverse recovery current
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea
100
10
2
1 µs
10
1
10
0
80
60
40
20
0
10 µs
100 µs
1 ms
10
-1
10
-2
10
-3
10
-4
10 ms
DC
0
25
50
75
100
125
150
10
0
10
1
10
2
10
3
T
C
ꢀ[°C]
V
DS
ꢀ[V]
P
tot
=f(
T
C
)
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
2
10
1
1 µs
10
1
10
0
10 µs
100 µs
1 ms
10
0
0.5
10
-1
10
-2
10
-3
10
-4
0.2
0.1
0.05
10
-1
10 ms
DC
0.02
0.01
single pulse
10
-2
10
0
10
1
10
2
10
3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=80ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
ꢀ=f(
t
P
);ꢀparameter:ꢀ
D=t
p
/
T
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics
100
60
20 V
50
40
30
20
20 V
80
60
40
20
0
10 V
10 V
8 V
8 V
7 V
6 V
7 V
5.5 V
10
0
6 V
5.5 V
5 V
5 V
4.5 V
15
4.5 V
0
5
10
20
0
5
10
15
20
V
DS
ꢀ[V]
V
DS
ꢀ[V]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
I
D
=f(
V
DS
);ꢀ
T
j
=125ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance
0.450
2.5
7 V
5.5 V
6.5 V
6 V
10 V
0.400
0.350
0.300
0.250
0.200
2.0
1.5
1.0
0.5
20 V
0
10
20
30
40
50
-50
-25
0
25
50
75
100
125
150
I
D
ꢀ[A]
T
j
ꢀ[°C]
R
DS(on)
=f(
I
D
);ꢀ
T
j
=125ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
T
j
);ꢀ
I
D
=6.8ꢀA;ꢀ
V
GS
=10ꢀV
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge
80
10
25 °C
9
8
7
6
5
4
3
2
1
0
120 V
400 V
60
150 °C
40
20
0
0
2
4
6
8
10
12
0
5
10
15
20
25
30
35
V
GS
ꢀ[V]
Q
gate
ꢀ[nC]
I
D
=f(
V
GS
);ꢀ
V
DS
=20V;ꢀparameter:ꢀ
T
j
V
GS
=f(
Q
gate
);ꢀ
I
D
=7.3ꢀAꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
Diagramꢀ12:ꢀAvalancheꢀenergy
10
2
80
60
40
20
0
10
1
125 °C
25 °C
10
0
10
-1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
25
50
75
100
125
150
V
SD
ꢀ[V]
T
j
ꢀ[°C]
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
E
AS
=f(
T
j
);ꢀ
I
D
=4.1ꢀA;ꢀ
V
DD
=50ꢀV
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagramꢀ14:ꢀTyp.ꢀcapacitances
690
10
5
10
4
660
630
600
570
540
Ciss
10
3
10
2
Coss
10
1
Crss
10
0
10
-1
-50
-25
0
25
50
75
100
125
150
0
100
200
300
400
500
T
j
ꢀ[°C]
V
DS
ꢀ[V]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=250ꢀkHz
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy
5
4
3
2
1
0
0
100
200
300
400
500
V
DS
ꢀ[V]
E
oss
=
f
(V
DS
)
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
5ꢀꢀꢀꢀꢀTestꢀCircuits
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics
Test circuit for diode characteristics
Diode recovery waveform
R
g
1
V
DS
R
g
2
I
F
R
g
1 = R
g
2
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes
Switching times test circuit for inductive load
Switching times waveform
V
DS
90%
10%
V
DS
V
GS
V
GS
t
d(off)
t
f
t
d(on)
t
on
t
r
t
off
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload
Unclamped inductive load test circuit
Unclamped inductive waveform
V
(BR)DS
I
D
V
DS
V
DS
V
DS
I
D
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
6ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TOꢀ252-3,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
12
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
7ꢀꢀꢀꢀꢀAppendixꢀA
Tableꢀ11ꢀꢀꢀꢀꢀRelatedꢀLinks
Final Data Sheet
13
Rev.ꢀ2.1,ꢀꢀ2018-11-05
600VꢀCoolMOSªꢀCFD7ꢀPowerꢀTransistor
IPD60R145CFD7
RevisionꢀHistory
IPD60R145CFD7
Revision:ꢀ2018-11-05,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2.1
2018-04-20
2018-11-05
Table 7: Reduced trr,max value; Change of qualification grade nomenclature
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intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
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Final Data Sheet
14
Rev.ꢀ2.1,ꢀꢀ2018-11-05
