Infineon-Technologies-IPL65R650C6S
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MOSFET
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor
CoolMOS™ꢀC6
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
DataꢀSheet
Rev.ꢀ2.0
Final
PowerꢀManagementꢀ&ꢀMultimarket
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
ThinPAKꢀ5×6
1ꢀꢀꢀꢀꢀDescription
CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower
MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand
pioneeredꢀbyꢀInfineonꢀTechnologies.ꢀCoolMOS™ꢀC6ꢀseriesꢀcombinesꢀthe
experienceꢀofꢀtheꢀleadingꢀSJꢀMOSFETꢀsupplierꢀwithꢀhighꢀclassꢀinnovation.
TheꢀofferedꢀdevicesꢀprovideꢀallꢀbenefitsꢀofꢀaꢀfastꢀswitchingꢀSJꢀMOSFET
whileꢀnotꢀsacrificingꢀeaseꢀofꢀuse.ꢀExtremelyꢀlowꢀswitchingꢀandꢀconduction
lossesꢀmakeꢀswitchingꢀapplicationsꢀevenꢀmoreꢀefficient,ꢀmoreꢀcompact,
lighterꢀandꢀcooler.
Features
•ꢀExtremelyꢀlowꢀlossesꢀdueꢀtoꢀveryꢀlowꢀFOMꢀRdson*QgꢀandꢀEoss
•ꢀVeryꢀhighꢀcommutationꢀruggedness
•ꢀEasyꢀtoꢀuse/drive
•ꢀPb-freeꢀplating,ꢀHalogenꢀfreeꢀmoldꢀcompound
•ꢀQualifiedꢀforꢀindustrialꢀgradeꢀapplicationsꢀaccordingꢀtoꢀJEDECꢀ(J-STD20
andꢀJESD22)
Applications
PFCꢀstages,ꢀhardꢀswitchingꢀPWMꢀstagesꢀandꢀresonantꢀswitchingꢀPWM
stagesꢀforꢀe.g.ꢀPCꢀSilverbox,ꢀAdapter,ꢀLCDꢀ&ꢀPDPꢀTV,ꢀLighting,ꢀServer,
TelecomꢀandꢀUPS.
Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate
orꢀseperateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
V
DS
@ T
j,max
R
DS(on),max
Q
g,typ
Value
700
0.65
23
Unit
V
Ω
nC
A
I
D,pulse
16.6
2
E
oss
@400V
Body diode di/dt
µJ
500
A/µs
Typeꢀ/ꢀOrderingꢀCode
Package
ThinPAK 5×6 SMD
Marking
RelatedꢀLinks
see Appendix A
IPL65R650C6S
65C6650
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
Test Circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Appendix A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
2ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
j
ꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
–
–
–
–
6.7
4.2
T
C
= 25°C
A
Continuous drain current
1)
I
D
T
C
= 100°C
Pulsed drain current
2)
I
D,pulse
E
AS
–
–
–
–
–
–
–
–
–
–
16.6
142
0.21
1.3
A
T
C
=25°C
Avalanche energy, single pulse
Avalanche energy, repetitive
Avalanche current, repetitive
MOSFET dv/dt ruggedness
mJ
mJ
A
I
D
=1.3A; V
DD
= 50V
E
AR
I
D
=1.3A; V
DD
= 50V
–
I
AR
dv/dt
50
V/ns
V
DS
ꢀ=0…520V
-20
-30
–
–
20
30
static;
V
Gate source voltage
V
GS
AC (f>1 Hz)
Power dissipation (non FullPAK)
Operating and storage temperature
Continuous diode forward current
Diode pulse current
2)
Reverse diode dv/dt
3)
Maximum diode commutation speed
3)
di
f
/dt
P
tot
–
–
–
–
–
–
–
56.8
150
5.8
W
°C
A
T
C
=25°C
–
T
j
,ꢀ
T
stg
I
S
-40
–
–
–
–
T
C
=25°C
T
C
= 25°C
I
S,pulse
16.2
15
A
dv/dt
V/ns
V
DS
ꢀ=0…400V,ꢀ
I
SD
<=
I
S
,ꢀ
T
j
=25°C
A/
µ
s
V
DS
ꢀ=0…400V,ꢀ
I
SD
<=
I
S
,ꢀ
T
j
=25°C
500
3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristicsꢀ(nonꢀFullPAK)
Values
Typ.
–
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction
– case
R
thJC
–
2.2
°C/W –
Device on 40mm*40mm*1.5 epoxy
PCB FR4 with 6cm
2
(one layer 70
µ
m
°C/W thick)
copper area for drain
connection and cooling. PCB is
vertical without blown air.
Thermal resistance, junction
– ambient
R
thJA
–
–
35
–
62
Soldering temperature, wavesoldering
T
sold
260
°C
reflow MSL1
only allowed at leads
1)
Limited by T
j max
. Maximum duty cycle D=0.75
2)
Pulse width t
p
limited by T
j,max
3)
ꢀ
V
DClink
=400V;ꢀ
V
DS,peak
<
V
(BR)DSS
;ꢀidenticalꢀlowꢀsideꢀandꢀhighꢀsideꢀswitchꢀwithꢀidenticalꢀ
R
G
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
650
Typ.
Max.
–
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
(GS)th
–
V
V
V
GS
=0V,ꢀ
I
D
=1mA
2.50
3
3.50
V
DS
=
V
GS
,ꢀ
I
D
=0.21mA
–
–
–
10
1
–
V
DS
=650V,ꢀ
V
GS
=0V,ꢀ
T
j
=25°C
V
DS
=650V,ꢀ
V
GS
=0V,ꢀ
T
j
=150°C
Zero gate voltage drain current
Gate-source leakage curent
Drain-source on-state resistance
Gate resistance
I
DSS
µ
A
nA
Ω
I
GSS
–
–
100
V
GS
=20V,ꢀ
V
DS
=0V
–
–
0.59
1.52
0.65
–
V
GS
=10V,ꢀ
I
D
=2.1A,ꢀ
T
j
=25°C
V
GS
=10V,ꢀ
I
D
=2.1A,ꢀ
T
j
=150°C
R
DS(on)
R
G
–
17.5
–
Ω
f
=1ꢀMHz,ꢀopenꢀdrain
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
440
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance
C
iss
–
–
–
–
pF
pF
V
GS
=0V,ꢀ
V
DS
=100V,ꢀ
f
=1MHz
V
GS
=0V,ꢀ
V
DS
=100V,ꢀ
f
=1MHz
C
oss
30
Effective output capacitance, energy
related
1)
C
o(er)
C
o(tr)
t
d(on)
t
r
–
–
–
–
–
–
21
88
12
9
–
–
–
–
–
–
pF
pF
ns
ns
ns
ns
V
GS
=0V,ꢀ
V
DS
=0…520V
Effective output capacitance, time
related
2)
I
D
=constant,ꢀ
V
GS
=0V,ꢀ
V
DS
=0…520V
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=3.2A,
R
G
=6.8
Ω
Turn-on delay time
Rise time
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=3.2A,
R
G
=6.8
Ω
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=3.2A,
R
G
=6.8
Ω
Turn-off delay time
Fall time
t
d(off)
t
f
80
13
V
DD
=400V,ꢀ
V
GS
=10V,ꢀ
I
D
=3.2A,
R
G
=6.8
Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
Values
Typ.
2.5
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
–
–
–
–
–
–
–
–
nC
nC
nC
V
V
DD
=520V,ꢀ
I
D
=3.2A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=520V,ꢀ
I
D
=3.2A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=520V,ꢀ
I
D
=3.2A,ꢀ
V
GS
=0ꢀtoꢀ10V
V
DD
=520V,ꢀ
I
D
=3.2A,ꢀ
V
GS
=0ꢀtoꢀ10V
Q
gd
11
Q
g
21
Gate plateau voltage
V
plateau
5.5
1)
ꢀ
C
o(er)
ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀ
C
oss
ꢀwhileꢀ
V
DS
ꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ80%ꢀV
(BR)DSS
2)
ꢀ
C
o(tr)
ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀ
C
oss
ꢀwhileꢀ
V
DS
ꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ80%ꢀV
(BR)DSS
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
0.9
270
2
Max.
Diode forward voltage
V
SD
t
rr
–
–
–
–
–
–
–
–
V
V
GS
=0V,ꢀ
I
F
=3.2A,ꢀ
T
f
=25°C
Reverse recovery time
ns
µC
A
V
R
=400V,ꢀ
I
F
=3.2A,ꢀd
i
F
/d
t
=100A/µs
V
R
=400V,ꢀ
I
F
=3.2A,ꢀd
i
F
/d
t
=100A/µs
V
R
=400V,ꢀ
I
F
=3.2A,ꢀd
i
F
/d
t
=100A/µs
Reverse recovery charge
Peak reverse recovery current
Q
rr
I
rrm
13
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
5ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea
60
10
2
50
40
30
20
10
0
10
1
1 µs
10 µs
10
0
100 µs
10
-1
10
-2
10
-3
1 ms
10 ms
DC
0
25
50
75
100
125
150
10
0
10
1
10
2
10
3
T
C
ꢀ[°C]
V
DS
ꢀ[V]
P
tot
=f(
T
C
)
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
2
10
1
10
1
10
0
1 µs
0.5
10
0
10 µs
0.2
100 µs
0.1
0.05
0.02
10
-1
10
-2
10
-3
1 ms
10
-1
0.01
single pulse
10 ms
DC
10
-2
10
0
10
1
10
2
10
3
10
-5
10
-4
10
-3
10
-2
10
-1
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=80ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
ꢀ=f(
t
P
);ꢀparameter:ꢀ
D=t
p
/
T
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics
20
12
20 V
10 V
20 V
10 V
18
16
14
12
10
8
8 V
10
8 V
7 V
8
6
4
2
0
7 V
6 V
5.5 V
6 V
6
5 V
5.5 V
5 V
4
4.5 V
2
4.5 V
0
0
5
10
15
20
0
5
10
15
20
V
DS
ꢀ[V]
V
DS
ꢀ[V]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
I
D
=f(
V
DS
);ꢀ
T
j
=125ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance
3.0
2.00
2.8
2.6
1.80
1.60
1.40
1.20
10 V
6 V
7 V
6.5 V
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
5.5 V
1.00
98%
typ
0.80
0.60
0.40
0.20
0.00
20 V
0
2
4
6
8
10
12
-50
-25
0
25
50
75
100
125
150
I
D
ꢀ[A]
T
j
ꢀ[°C]
R
DS(on)
=f(
I
D
);ꢀ
T
j
=125ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
T
j
);ꢀ
I
D
=2.1ꢀA;ꢀ
V
GS
=10ꢀV
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge
18
10
9
8
16
14
12
10
8
25 °C
120 V
7
480 V
6
5
4
3
2
1
0
150 °C
6
4
2
0
0
2
4
6
8
10
12
0
5
10
15
20
25
V
GS
ꢀ[V]
Q
gate
ꢀ[nC]
I
D
=f(
V
GS
);ꢀ
V
DS
=20V;ꢀparameter:ꢀ
T
j
V
GS
=f(
Q
gate
);ꢀ
I
D
=3.2ꢀAꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
Diagramꢀ12:ꢀAvalancheꢀenergy
10
2
160
140
120
100
80
10
1
125 °C
25 °C
60
10
0
40
20
10
-1
0
0.0
0.5
1.0
1.5
2.0
25
50
75
100
125
150
V
SD
ꢀ[V]
T
j
ꢀ[°C]
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
E
AS
=f(
T
j
);ꢀ
I
D
=1.3ꢀA;ꢀ
V
DD
=50ꢀV
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagramꢀ14:ꢀTyp.ꢀcapacitances
740
10
4
720
700
680
660
640
620
600
580
10
3
Ciss
10
2
Coss
10
1
Crss
10
0
-75 -50 -25
0
25
50
75 100
125 150 175
0
100
200
300
400
500
T
j
ꢀ[°C]
V
DS
ꢀ[V]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
100
200
300
400
500
V
DS
ꢀ[V]
E
oss
=
f
(V
DS
)
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
6ꢀꢀꢀꢀꢀTestꢀCircuits
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics
Test circuit for diode characteristics
Diode recovery waveform
V,I
V
DS
R
g
1
V
D
S
(
p
ea
k
)
V
DS
t
rr
V
DS
I
F
t
F
t
S
d
I
F
/ dt
R
g
2
I
F
t
1
0
%
I
rrm
Q
F
Q
S
I
F
dI /
dt
rr
t
rr
=
t
F
+t
S
rr
I
rrm
Q
=
Q
F
+
Q
S
R
g
1 = R
g
2
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes
Switching times test circuit for inductive load
Switching times waveform
V
DS
90%
10%
V
DS
V
GS
V
GS
t
d(off)
t
f
t
d(on)
t
on
t
r
t
off
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload
Unclamped inductive load test circuit
Unclamped inductive waveform
V
(BR)DS
I
D
V
DS
V
DS
V
DS
I
D
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
7ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B00172997
0
SCALE
MILLIMETERS
INCHES
DIM
MIN
0.90
0.30
0.00
0.10
4.90
4.11
5.90
2.60
0.20
MAX
1.10
0.50
0.05
0.30
5.10
4.31
6.10
2.80
0.40
MIN
MAX
0.043
0.020
0.002
0.012
0.201
0.170
0.240
0.110
0.016
1
A
b
0.035
0.012
0.000
0.004
0.193
0.162
0.232
0.102
0.008
0
1
b1
c
2mm
D
EUROPEAN PROJECTION
D1
E
E1
E2
e
1.27 (BSC)
0.05 (BSC)
K1
K2
L
1.80
0.30
0.45
0.45
2.00
0.50
0.65
0.65
0.071
0.012
0.018
0.018
0.079
0.020
0.026
0.026
ISSUE DATE
17-04-2014
REVISION
L1
N
01
8
8
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀThinPAKꢀ5×6ꢀSMD,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
12
Rev.ꢀ2.0,ꢀꢀ2014-07-08
650VꢀCoolMOS™ꢀC6ꢀPowerꢀTransistor
IPL65R650C6S
RevisionꢀHistory
IPL65R650C6S
Revision:ꢀ2014-07-08,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
2.0
Subjects (major changes since last revision)
Release of final version
2014-07-08
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aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
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Final Data Sheet
14
Rev.ꢀ2.0,ꢀꢀ2014-07-08
