Infineon-Technologies-IPP029N06NAKSA1

Part #Infineon-Technologies-IPP029N06NAKSA1
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Infineon-Technologies-IPP029N06NAKSA1
MOSFET  
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor  
OptiMOS

TM  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
DataꢀSheet  
Rev.ꢀ2.6  
Final  
PowerꢀManagementꢀ&ꢀMultimarket  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
TO-220-3  
1ꢀꢀꢀꢀꢀDescription  
tab  
Features  
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.ꢀrec.  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀSuperiorꢀthermalꢀresistance  
•ꢀN-channel  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC

1)

ꢀꢀforꢀtargetꢀapplications  
•ꢀPb-freeꢀleadꢀꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Drain  
Pin 2, Tab  
Parameter  
Value  
Unit  
V

DS  

60  
V
Gate  
Pin 1  
R

DS(on),max  

I

D  

2.9  
100  
65  
m
Ω
 
A
Source  
Pin 3  
Q

OSS  

nC  
nC  
Q

G

(0V..10V)  
56  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPP029N06N  
PG-TO220-3  
029N06N  
–

1)

J-STD20 and JESD22  
Final Data Sheet  
2
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
TableꢀofꢀContents  
Description .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Maximum ratings
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
4  
Thermal characteristics
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
5  
Electrical characteristics diagrams
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
7  
Package Outlines
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
11  
Revision History
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
Disclaimer .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
Final Data Sheet  
3
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
2ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀ
T

j

ꢀ=ꢀ25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
–
–
–
–
–
–
100  
100  
24  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=100ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C,ꢀ
R

thJA

ꢀ=50K/W  
Continuous drain current  
I

D  

A
Pulsed drain current

1)  

Avalanche energy, single pulse

2)  

I

D,pulse  

E

AS  

–
–
–
–
400  
110  
20  
A
T

C

=25ꢀ°C  
–
mJ  
V
I

D

=100ꢀA,ꢀ
R

GS

=25ꢀ
Ω  
Gate source voltage  
V

GS  

-20  
–
–
–
–
–
136  
3.0  
T

C

=25ꢀ°C  
T

A

=25ꢀ°C,ꢀ
R

thJA

=50ꢀK/W  
Power dissipation  
P

tot  

W
IEC climatic category;  
DIN IEC 68-1: 55/175/56  
Operating and storage temperature  
T

j

,ꢀ
T

stg  

-55  
–
175  
°C  
3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction – case,  
bottom  
R

thJC  

R

thJA  

R

thJA  

T

sold  

–
0.7  
1.1  
K/W  
K/W  
K/W  
°C  
–
Device on PCB,  
minimal footprint  
–
–
–
–
–
–
62  
–
Device on PCB,  
40  
–
6 cm² cooling area

3)  

Soldering temperature, wave and  
reflow soldering are allowed  
260  
Reflow MSL1  

1)

See figure 3 for more detailed information  

2)

See figure 13 for more detailed information  

3)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm

2

(one layer, 70 µm thick) copper area for drain connection.  
PCB is vertical in still air.  
Final Data Sheet  
4
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
60  
Typ.  
–
Max.  
–
Drain-source breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

GS(th)  

V
V
V

GS

=0ꢀV,ꢀ
I

D

=1ꢀmA  
V

DS

=
V

GS

,ꢀ
I

D

=75ꢀµA  
2.1  
2.8  
3.3  
–
–
0.5  
10  
1
100  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=25ꢀ°C  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
I

DSS  

µA  
nA  
I

GSS  

–
10  
100  
V

GS

=20ꢀV,ꢀ
V

DS

=0ꢀV  
–
–
2.7  
3.3  
2.9  
4.4  
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA  
V

GS

=6ꢀV,ꢀ
I

D

=25ꢀA  
R

DS(on)  

m
Ω  
Gate resistance

1)  

Transconductance  
R

G  

g

fs  

0.65  
80  
1.3  
1.95  
–
Ω
–
160  
S
|
V

DS

|>2|
I

D

|
R

DS(on)max

,ꢀ
I

D

=100ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics

1)

ꢀ  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
C

iss  

C

oss  

C

rss  

–
–
–
4100 5125 pF  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
Output capacitance  
980  
39  
1225 pF  
Reverse transfer capacitance  
78  
–
pF  
ns  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

,ext=3ꢀ
Ω  
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
17  
15  
30  
8
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

,ext=3ꢀ
Ω  
–
–
–
ns  
ns  
ns  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

,ext=3ꢀ
Ω  
Turn-off delay time  
Fall time  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

,ext=3ꢀ
Ω  

1)

Defined by design. Not subject to production test  
Final Data Sheet  
5
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics

1)

ꢀ  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
20  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge

2)  

Switching charge  
Q

gs  

–
–
–
–
–
–
–
–
–
nC  
nC  
nC  
nC  
nC  
V
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DS

=0.1ꢀV,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
Q

g(th)  

Q

gd  

11  
–
11  
15  
–
Q

sw  

19  
Gate charge total

2)  

Q

g  

56  
66  
–
Gate plateau voltage  
Gate charge total, sync. FET  
Output charge

2)  

V

plateau  

Q

g(sync)  

Q

oss  

4.8  
49  
–
nC  
nC  
65  
82  
V

DD

=30ꢀV,ꢀ
V

GS

=0ꢀV  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
–
Max.  
120  
480  
1.2  
86  
Diode continuous forward current  
Diode pulse current  
I

S  

–
–
–
–
–
A
T

C

=25ꢀ°C  
I

S,pulse  

V

SD  

t

rr  

–
A
T

C

=25ꢀ°C  
Diode forward voltage  
Reverse recovery time

2)  

1.0  
54  
77  
V
V

GS

=0ꢀV,ꢀ
I

F

=100ꢀA,ꢀ
T

j

=25ꢀ°C  
V

R

=30ꢀV,ꢀ
I

F

=100ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
V

R

=30ꢀV,ꢀ
I

F

=100ꢀA,ꢀd
i

F

/d
t
=100ꢀA/µs  
ns  
nC  
Reverse recovery charge  
Q

rr  

–

1)

See
″
Gate charge waveforms
″
for parameter definition  

2)

Defined by design. Not subject to production test  
Final Data Sheet  
6
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
5ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
160  
120  
100  
80  
60  
40  
20  
0
140  
120  
100  
80  
60  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
T

C

ꢀ[°C]  
T

C

ꢀ[°C]  
P

tot

=f(
T

C

)  
I

D

=f(
T

C

);ꢀ
V

GS

≥
10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
10

3  

10

1  

1 µs  
10 µs  
100 µs  
10

2  

10

0  

0.5  
1 ms  
DC  
10

1  

0.2  
0.1  
10 ms  
10

-1  

0.05  
0.02  
0.01  
10

0  

single pulse  
10

-1  

10

-2  

10

-1  

10

0  

10

1  

10

2  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

V

DS

ꢀ[V]  
t

p

ꢀ[s]  
I

D

=f(
V

DS

);ꢀ
T

C

=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t

p  

Z

thJC

=f(
t

p

);ꢀparameter:ꢀ
D
=
t

p

/
T  
Final Data Sheet  
7
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
400  
8
10 V  
7 V  
5 V  
5.5 V  
6 V  
360  
320  
280  
240  
200  
160  
120  
80  
7
6
5
4
3
2
1
0
6 V  
5.5 V  
7 V  
10 V  
5 V  
40  
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
80  
160  
240  
320  
400  
V

DS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

DS

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

R

DS(on)

=f(
I

D

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
400  
200  
360  
320  
280  
240  
200  
160  
120  
80  
150  
100  
50  
40  
0
175 °C  
25 °C  
0
0
2
4
6
8
0
20  
40  
60  
80  
100  
V

GS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

GS

);ꢀ|
V

DS

|>2|
I

D

|
R

DS(on)max

;ꢀparameter:ꢀ
T

j  

g

fs

=f(
I

D

);ꢀ
T

j

=25ꢀ°C  
Final Data Sheet  
8
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
5
4
3
4.0  
750 µA  
max  
3.5  
75 µA  
3.0  
typ  
2
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
T

j

ꢀ[°C]  
R

DS(on)

=f(
T

j

);ꢀ
I

D

=100ꢀA;ꢀ
V

GS

=10ꢀV  
V

GS(th)

=f(
T

j

);ꢀ
V

GS

=
V

DS  

Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
10

4  

10

3  

25 °C  
175 °C  
Ciss  
10

3  

10

2  

10

1  

10

2  

10

1  

10

0  

Coss  
Crss  
0
20  
40  
60  
0.0  
0.5  
1.0  
1.5  
2.0  
V

DS

ꢀ[V]  
V

SD

ꢀ[V]  
C
=f(
V

DS

);ꢀ
V

GS

=0ꢀV;ꢀ
f
=1ꢀMHz  
I

F

=f(
V

SD

);ꢀparameter:ꢀ
T

j  

Final Data Sheet  
9
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
10

3  

12  
10  
8
30 V  
48 V  
12 V  
10

2  

100 °C  
25 °C  
6
125 °C  
10

1  

4
2
10

0  

0
10

0  

10

1  

10

2  

10

3  

0
10  
20  
30  
40  
50  
60  
t

AV

ꢀ[µs]  
Q

gate

ꢀ[nC]  
I

AS

=f(
t

AV

);ꢀ
R

GS

=25ꢀ
Ω
;ꢀparameter:ꢀ
T

j(start)  

V

GS

=f(
Q

gate

);ꢀ
I

D

=100ꢀAꢀpulsed;ꢀparameter:ꢀ
V

DD  

Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Gate charge waveforms  
70  
66  
62  
58  
54  
50  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
V

BR(DSS)

=f(
T

j

);ꢀ
I

D

=1ꢀmA  
Final Data Sheet  
10  
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
6ꢀꢀꢀꢀꢀPackageꢀOutlines  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO220-3,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
11  
Rev.ꢀ2.6,ꢀꢀ2015-02-10  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPP029N06N  
RevisionꢀHistory  
IPP029N06N  
Revision:ꢀ2015-02-10,ꢀRev.ꢀ2.6  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.5  
2.6  
Rev.2.5  
2014-07-25  
2015-02-10  
Insert Rg min value = 0.65 Ohm  
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Final Data Sheet  
12  
Rev.ꢀ2.6,ꢀꢀ2015-02-10