Infineon-Technologies-IPP083N10N5
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IPP083N10N5
MOSFET
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
TO-220-3
tab
Features
•ꢀIdealꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀsync.ꢀrec.
•ꢀExcellentꢀgateꢀchargeꢀxꢀ
R
DS(on)
ꢀproductꢀ(FOM)
•ꢀVeryꢀlowꢀon-resistanceꢀꢀR
DS(on)
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀ100%ꢀavalancheꢀtested
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC
1)
ꢀꢀforꢀtargetꢀapplications
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
Drain
Pin 2, Tab
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
100
8.3
73
Unit
V
DS
V
Gate
Pin 1
R
DS(on),max
I
D
m
Ω
A
Source
Pin 3
Q
oss
40
nC
nC
Q
G
(0V..10V)
30
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPP083N10N5
PG-TO220-3
083N10N5
–
1)
J-STD20 and JESD22
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
TableꢀofꢀContents
Description .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Electrical characteristics diagrams
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package Outlines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Trademarks .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Disclaimer .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀ
T
A
=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
–
–
–
–
73
53
T
C
=25ꢀ°C
A
Continuous drain current
I
D
T
C
=100ꢀ°C
Pulsed drain current
1)
Avalanche energy, single pulse
Gate source voltage
I
D,pulse
E
AS
–
–
–
–
–
292
50
A
T
C
=25ꢀ°C
–
mJ
V
I
D
=73ꢀA,ꢀ
R
GS
=25ꢀ
Ω
V
GS
P
tot
-20
–
20
–
Power dissipation
100
W
T
C
=25ꢀ°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Operating and storage temperature
T
j
,ꢀ
T
stg
-55
–
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
1.1
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction – case
R
thJC
R
thJA
–
1.5
K/W
K/W
–
–
Thermal resistance, junction – ambient,
minimal footprint
–
–
–
–
–
–
62
Thermal resistance, junction – ambient,
6 cm
2
cooling area
2)
R
thJA
T
sold
40
K/W
°C
–
–
Soldering temperature, wave and
reflow soldering are allowed
260
1)
see Diagram 3
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
–
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
100
2.2
Max.
–
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSS
V
GS(th)
V
V
V
GS
=0ꢀV,ꢀ
I
D
=1ꢀmA
V
DS
=
V
GS
,ꢀ
I
D
=49ꢀµA
3.0
3.8
–
–
0.1
10
1
100
V
DS
=100ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=25ꢀ°C
V
DS
=100ꢀV,ꢀ
V
GS
=0ꢀV,ꢀ
T
j
=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I
DSS
µA
nA
I
GSS
–
1
100
V
GS
=20ꢀV,ꢀ
V
DS
=0ꢀV
–
–
7.3
8.9
8.3
11.0
V
GS
=10ꢀV,ꢀ
I
D
=73ꢀA
V
GS
=6ꢀV,ꢀ
I
D
=37ꢀA
R
DS(on)
m
Ω
Gate resistance
1)
Transconductance
R
G
g
fs
–
1.2
96
1.8
–
Ω
–
48
S
|
V
DS
|>2|
I
D
|
R
DS(on)max
,ꢀ
I
D
=73ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
1)
ꢀ
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
C
iss
C
oss
C
rss
–
–
–
2100 2730 pF
V
GS
=0ꢀV,ꢀ
V
DS
=50ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=50ꢀV,ꢀ
f
=1ꢀMHz
V
GS
=0ꢀV,ꢀ
V
DS
=50ꢀV,ꢀ
f
=1ꢀMHz
Output capacitance
337
16
438
28
pF
pF
Reverse transfer capacitance
V
DD
=50ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=73ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-on delay time
Rise time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
13
5
–
–
–
–
ns
ns
ns
ns
V
DD
=50ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=73ꢀA,
R
G,ext
=1.6ꢀ
Ω
V
DD
=50ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=73ꢀA,
R
G,ext
=1.6ꢀ
Ω
Turn-off delay time
Fall time
21
5
V
DD
=50ꢀV,ꢀ
V
GS
=10ꢀV,ꢀ
I
D
=73ꢀA,
R
G,ext
=1.6ꢀ
Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
2)
ꢀ
Values
Typ.
11
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
1)
Switching charge
Gate charge total
1)
Gate plateau voltage
Output charge
1)
Q
gs
–
–
–
–
–
–
–
nC
nC
nC
nC
V
V
DD
=50ꢀV,ꢀ
I
D
=73ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=50ꢀV,ꢀ
I
D
=73ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=50ꢀV,ꢀ
I
D
=73ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=50ꢀV,ꢀ
I
D
=73ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=50ꢀV,ꢀ
I
D
=73ꢀA,ꢀ
V
GS
=0ꢀtoꢀ10ꢀV
V
DD
=50ꢀV,ꢀ
V
GS
=0ꢀV
Q
gd
6.5
10
–
Q
sw
Q
g
11
30
37
–
V
plateau
Q
oss
5.2
40
53
nC
1)
Defined by design. Not subject to production test.
2)
See
″
Gate charge waveforms
″
for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Typ.
–
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
73
Diode continous forward current
Diode pulse current
I
S
–
–
–
–
–
A
T
C
=25ꢀ°C
I
S,pulse
V
SD
t
rr
–
292
1.2
A
T
C
=25ꢀ°C
Diode forward voltage
1.0
58
V
V
GS
=0ꢀV,ꢀ
I
F
=73ꢀA,ꢀ
T
j
=25ꢀ°C
V
R
=50ꢀV,ꢀ
I
F
=
I
S
,ꢀd
i
F
/d
t
=100ꢀA/µs
V
R
=50ꢀV,ꢀ
I
F
=
I
S
,ꢀd
i
F
/d
t
=100ꢀA/µs
Reverse recovery time
1)
Reverse recovery charge
1)
116
236
ns
nC
Q
rr
118
1)
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
120
80
70
60
50
40
30
20
10
0
80
40
0
0
50
100
150
200
0
50
100
150
200
T
C
ꢀ[°C]
T
C
ꢀ[°C]
P
tot
=f(
T
C
)
I
D
=f(
T
C
);ꢀ
V
GS
≥
10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
10
3
10
1
1 µs
10 µs
10
2
10
1
10
0
10
-1
10
0
100 µs
1 ms
0.5
0.2
0.1
0.05
10 ms
0.02
10
-1
0.01
DC
single pulse
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
ꢀ[V]
t
p
ꢀ[s]
I
D
=f(
V
DS
);ꢀ
T
C
=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t
p
Z
thJC
=f(
t
p
);ꢀparameter:ꢀ
D
=
t
p
/
T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
300
20
5 V
6 V
10 V
8 V
4.5 V
16
12
8
200
100
0
6 V
8 V
10 V
4
5 V
4.5 V
0
0
1
2
3
4
5
0
50
100
150
200
250
300
V
DS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
DS
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
R
DS(on)
=f(
I
D
);ꢀ
T
j
=25ꢀ°C;ꢀparameter:ꢀ
V
GS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
300
120
250
200
150
100
50
100
80
60
40
20
0
175 °C
25 °C
0
0
2
4
6
8
10
0
20
40
60
80
100
120
V
GS
ꢀ[V]
I
D
ꢀ[A]
I
D
=f(
V
GS
);ꢀ|
V
DS
|>2|
I
D
|
R
DS(on)max
;ꢀparameter:ꢀ
T
j
g
fs
=f(
I
D
);ꢀ
T
j
=25ꢀ°C
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
18
4.0
16
14
12
3.5
490 µA
3.0
2.5
2.0
1.5
1.0
0.5
0.0
49 µA
max
10
typ
8
6
4
2
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
T
j
ꢀ[°C]
R
DS(on)
=f(
T
j
);ꢀ
I
D
=73ꢀA;ꢀ
V
GS
=10ꢀV
V
GS(th)
=f(
T
j
);ꢀ
V
GS
=
V
DS
;ꢀparameter:ꢀ
I
D
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
10
4
10
3
25 °C
175 °C
25 °C, max
175 °C, max
Ciss
10
3
10
2
10
1
10
0
Coss
10
2
Crss
10
1
0
20
40
60
80
0.0
0.5
1.0
1.5
2.0
V
DS
ꢀ[V]
V
SD
ꢀ[V]
C
=f(
V
DS
);ꢀ
V
GS
=0ꢀV;ꢀ
f
=1ꢀMHz
I
F
=f(
V
SD
);ꢀparameter:ꢀ
T
j
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
10
2
10
8
6
4
2
0
50 V
25 °C
80 V
20 V
100 °C
10
1
150 °C
10
0
10
0
10
1
10
2
10
3
0
10
20
30
t
AV
ꢀ[µs]
Q
gate
ꢀ[nC]
I
AS
=f(
t
AV
);ꢀ
R
GS
=25ꢀ
Ω
;ꢀparameter:ꢀ
T
j(start)
V
GS
=f(
Q
gate
);ꢀ
I
D
=ꢀ73Aꢀpulsed;ꢀparameter:ꢀ
V
DD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Gate charge waveforms
110
105
100
95
90
-60
-20
20
60
100
140
180
T
j
ꢀ[°C]
V
BR(DSS)
=f(
T
j
);ꢀ
I
D
=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
5ꢀꢀꢀꢀꢀPackageꢀOutlines
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO220-3,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2016-10-03
OptiMOS
ª
5ꢀPower-Transistor,ꢀ100ꢀV
IPP083N10N5
RevisionꢀHistory
IPP083N10N5
Revision:ꢀ2016-10-03,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
2014-12-17
2016-10-03
Update Avalanche Energy
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.
TrademarksꢀupdatedꢀAugustꢀ2015
OtherꢀTrademarks
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©ꢀ2016ꢀInfineonꢀTechnologiesꢀAG
AllꢀRightsꢀReserved.
LegalꢀDisclaimer
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristicsꢀ
(“Beschaffenheitsgarantie”)ꢀ.
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2016-10-03
