Infineon-Technologies-IPP12CN10L-G
| Part # | Infineon-Technologies-IPP12CN10L-G |
| Download | Infineon-Technologies-IPP12CN10L-G |
IPS12CN10L G
IPP12CN10L G
Opti
MOS
®
2 Power-Transistor
Product Summary
Features
V
DS
100
12
V
• N-channel, logic level
R
DS(on),max
I
D
m
W
A
• Excellent gate charge x
R
DS(on)
product (FOM)
• Very low on-resistance
R
DS(on)
69
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
• Qualified according to JEDEC
1)
for target application
• Ideal for high-frequency switching and synchronous rectification
Type
IPP12CN10L G
IPS12CN10L G
Package
Marking
PG-TO220-3
12CN10L
PG-TO251-3-11
12CN10L
Maximum ratings,
at
T
j
=25 °C, unless otherwise specified
Value
Parameter
Symbol Conditions
Unit
I
D
T
C
=25 °C
Continuous drain current
69
49
A
T
C
=100 °C
Pulsed drain current
2)
I
D,pulse
E
AS
T
C
=25 °C
276
150
I
D
=69 A,
R
GS
=25
W
Avalanche energy, single pulse
mJ
I
D
=69 A,
V
DS
=80 V,
d
i
/d
t
=100 A/µs,
T
j,max
=175 °C
Reverse diode d
v
/d
t
d
v
/d
t
6
kV/µs
Gate source voltage
3)
V
GS
±20
V
P
tot
T
C
=25 °C
Power dissipation
125
W
°C
T
j
,
T
stg
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
-55 … 175
55/175/56
1)
J-STD20 and JESD22
2)
see figure 3
3)
T
=150°C and duty cycle D=0.01 for V
gs
<-5V
jmax
Rev. 1.03
page 1
2011-09-05
IPS12CN10L G
IPP12CN10L G
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Thermal characteristics
R
thJC
Thermal resistance, junction – case
–
–
–
–
–
–
1.2
62
40
K/W
R
thJA
minimal footprint
Thermal resistance, junction –
ambient
6 cm2 cooling area
4)
Electrical characteristics,
at
T
j
=25 °C, unless otherwise specified
Static characteristics
V
(BR)DSS
V
GS
=0 V,
I
D
=1 mA
V
GS(th)
V
DS
=
V
GS
,
I
D
=83 µA
Drain-source breakdown voltage
Gate threshold voltage
100
1.2
–
–
V
1.84
2.4
V
DS
=80 V,
V
GS
=0 V,
T
j
=25 °C
I
DSS
Zero gate voltage drain current
–
0.1
1
µA
V
DS
=80 V,
V
GS
=0 V,
T
j
=125 °C
–
–
–
10
1
100
I
GSS
V
GS
=20 V,
V
DS
=0 V
Gate-source leakage current
100 nA
V
GS
=4.5 V,
I
D
=34.5 A,
(TO220)
R
DS(on)
Drain-source on-state resistance
11.7
15.8
12
m
W
V
GS
=10 V,
I
D
=69 A,
(TO220)
–
–
9.9
V
GS
=4.5 V,
I
D
=34.5 A,
(TO251)
11.7
15.8
V
GS
=10 V,
I
D
=69 A,
(TO251)
–
–
9.9
1.3
11.8
R
G
g
fs
Gate resistance
–
–
W
|
V
DS
|>2|
I
D
|
R
DS(on)max
I
D
=69 A
,
Transconductance
57
113
S
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.03
page 2
2011-09-05
IPS12CN10L G
IPP12CN10L G
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C
iss
–
–
–
–
–
–
–
4210
528
29
14
9
5600 pF
V
GS
=0 V,
V
DS
=50 V,
f
=1 MHz
C
oss
C
rss
t
d(on)
t
r
702
–
–
–
–
–
ns
V
DD
=50 V,
V
GS
=10 V,
I
D
=34.5 A,
R
G
=1.6
W
t
d(off)
t
f
Turn-off delay time
Fall time
39
5
Gate Charge Characteristics
5)
Gate to source charge
Gate to drain charge
Switching charge
Q
gs
–
–
–
–
–
–
16
10
13
58
3.7
54
–
–
–
–
–
–
nC
Q
gd
V
DD
=50 V,
I
D
=69 A,
V
GS
=0 to 10 V
Q
sw
Q
g
Gate charge total
V
plateau
Q
oss
Gate plateau voltage
Output charge
V
V
DD
=50 V,
V
GS
=0 V
nC
Reverse Diode
I
S
Diode continous forward current
Diode pulse current
–
–
–
–
69
A
T
C
=25 °C
I
S,pulse
276
V
GS
=0 V,
I
F
=69 A,
T
j
=25 °C
V
SD
Diode forward voltage
–
1
1.2
V
t
rr
Reverse recovery time
–
–
101
193
–
–
ns
V
R
=50 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/µs
Q
rr
Reverse recovery charge
nC
5)
See figure 16 for gate charge parameter definition
Rev. 1.03
page 3
2011-09-05
IPS12CN10L G
IPP12CN10L G
1 Power dissipation
2 Drain current
P
tot
=f(
T
C
)
I
D
=f(
T
C
);
V
GS
≥10 V
140
120
100
80
80
70
60
50
40
30
20
10
0
60
40
20
0
0
50
100
150
200
0
50
100
150
200
T
C
[°C]
T
C
[°C]
3 Safe operating area
I
D
=f(
V
DS
);
T
C
=25 °C;
D
=0
parameter:
t
p
4 Max. transient thermal impedance
Z
thJC
=f(
t
p
)
parameter:
D
=
t
p
/
T
10
3
10
2
10
1
10
0
10
-1
10
1
1 µs
10 µs
100 µs
10
0
0.5
1 ms
0.2
0.1
10 ms
10
-1
0.05
DC
0.02
0.01
single pulse
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
[V]
t
p
[s]
Rev. 1.03
page 4
2011-09-05
IPS12CN10L G
IPP12CN10L G
5 Typ. output characteristics
I
D
=f(
V
DS
);
T
j
=25 °C
6 Typ. drain-source on resistance
R
DS(on)
=f(
I
D
);
T
j
=25 °C
parameter:
V
GS
parameter:
V
GS
250
30
10 V
7.5 V
5 V
25
200
150
3.2 V
4.5 V
20
3.5 V
15
10
5
4 V
4.5 V
100
4 V
10 V
50
3.5 V
3.2 V
3 V
0
0
0
1
2
3
4
5
0
20
40
60
80
100
V
DS
[V]
I
D
[A]
7 Typ. transfer characteristics
I
D
=f(
V
GS
); |
V
DS
|>2|
I
D
|
R
DS(on)max
parameter:
T
j
8 Typ. forward transconductance
g
fs
=f(
I
D
);
T
j
=25 °C
150
160
140
120
100
80
100
60
50
40
175 °C
20
25 °C
0
0
0
2
4
6
0
20
40
60
80
100
120
140
V
GS
[V]
I
D
[A]
Rev. 1.03
page 5
2011-09-05
IPS12CN10L G
IPP12CN10L G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
V
GS(th)
=f(
T
j
);
V
GS
=
V
DS
parameter:
I
D
R
DS(on)
=f(
T
j
);
I
D
=69 A;
V
GS
=10 V
30
25
20
2.5
2
830 µA
83 µA
1.5
15
98 %
typ
1
0.5
0
10
5
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T
j
[°C]
T
j
[°C]
11 Typ. capacitances
12 Forward characteristics of reverse diode
I
F
=f(
V
SD
C
=f(
V
DS
);
V
GS
=0 V;
f
=1 MHz
)
parameter:
T
j
10
4
10
3
Ciss
Coss
10
3
10
2
175 °C, 98%
25 °C, 98%
25 °C
175 °C
Crss
10
2
10
1
10
1
10
0
0
0
20
40
60
80
0.5
1
1.5
2
V
DS
[V]
V
SD
[V]
Rev. 1.03
page 6
2011-09-05
IPS12CN10L G
IPP12CN10L G
13 Avalanche characteristics
14 Typ. gate charge
V
GS
=f(
Q
gate
);
I
D
=69 A pulsed
parameter:
V
DD
I
AS
=f(
t
AV
);
R
GS
=25
W
parameter:
T
j(start)
100
10
8
25 °C
100 °C
80 V
6
150 °C
50 V
10
20 V
4
2
0
1
1
10
100
1000
0
10
20
30
Q
gate
[nC]
40
50
60
t
AV
[µs]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS)
=f(
T
j
);
I
D
=1 mA
115
110
105
100
95
V
GS
Q
g
V
gs(th)
Q
g(th)
Q
sw
Q
gd
Q
gate
Q
gs
90
-60
-20
20
60
100
140
180
T
j
[°C]
Rev. 1.03
page 7
2011-09-05
IPS12CN10L G
IPP12CN10L G
PG-TO220-3: Outline
Rev. 1.03
page 8
2011-09-05
IPS12CN10L G
IPP12CN10L G
Rev. 1.03
page 9
2011-09-05
IPS12CN10L G
IPP12CN10L G
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2011 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
Warnings
Due to technical requirements, components may contain dangerous substances. For information
on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
Rev. 1.03
page 10
2011-09-05
