Infineon-Technologies-IPT007N06N

Part #Infineon-Technologies-IPT007N06N
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Infineon-Technologies-IPT007N06N
MOSFET  
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor  
OptiMOS

TM  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
DataꢀSheet  
Rev.ꢀ2.1  
Final  
PowerꢀManagementꢀ&ꢀMultimarket  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
HSOF  
1ꢀꢀꢀꢀꢀDescription  
Features  
T
a
b  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀSuperiorꢀthermalꢀresistance  
•ꢀN-channel  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC

ꢀ1)

ꢀꢀforꢀtargetꢀapplications  
•ꢀPb-freeꢀleadꢀꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
1
2
3
4
5
6
7
8
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
Value  
Unit  
Drain  
Tab  
V

DS  

60  
V
R

DS(on),max  

I

D  

0.75  
300  
227  
216  
m
Ω
 
A
Gate  
Pin 1  
Source  
Pin 2-8  
Q

oss  

nC  
nC  
Q

G

(0V..10V)  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPT007N06N  
PG-HSOF-8-1  
007N06N  
–

1)

J-STD20 and JESD22  
Final Data Sheet  
2
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
TableꢀofꢀContents  
Description .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Maximum ratings
 
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4  
Thermal characteristics
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
5  
Electrical characteristics diagrams
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
7  
Package Outlines
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
11  
Revision History
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
Disclaimer .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
Final Data Sheet  
3
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
2ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀ
T

j

ꢀ=ꢀ25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=100ꢀ°C  
V

GS

=10ꢀV,ꢀ
T

C

=25ꢀ°C,ꢀ
R

thJA

ꢀ=40ꢀK/W  
1)  
–
–
–
–
–
–
300  
300  
52  
Continuous drain current  
I

D  

A
Pulsed drain current

2)  

Avalanche energy, single pulse

3)  

Gate source voltage  
I

D,pulse  

E

AS  

–
–
–
–
–
1200  
A
T

C

=25ꢀ°C  
–
1100 mJ  
I

D

=150ꢀA,ꢀ
R

GS

=25ꢀ
Ω  
V

GS  

P

tot  

-20  
–
20  
V
–
Power dissipation  
375  
W
T

C

=25ꢀ°C  
IEC climatic category;  
DIN IEC 68-1: 55/175/56  
Operating and storage temperature  
T

j

,ꢀ
T

stg  

-55  
–
175  
°C  
3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
0.4  
62  
Thermal resistance, junction – case  
Device on PCB, minimal footprint  
Device on PCB, 6 cm² cooling area

1)  

R

thJC  

R

thJA  

R

thJA  

–
–
–
0.2  
K/W  
K/W  
K/W  
–
–
–
–
–
40  

1)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm

2

(one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  

2)

See figure 3 for more detailed information  

3)

See figure 13 for more detailed information  
Final Data Sheet  
4
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
60  
Typ.  
–
Max.  
–
Drain-source breakdown voltage  
Gate threshold voltage  
V

(BR)DSS  

V

GS(th)  

V
V
V

GS

=0ꢀV,ꢀ
I

D

=1ꢀmA  
2.1  
2.8  
3.3  
V

DS

=
V

GS

,ꢀ
I

D

=280ꢀµA  
–
–
0.5  
10  
1
100  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=25ꢀ°C  
V

DS

=60ꢀV,ꢀ
V

GS

=0ꢀV,ꢀ
T

j

=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
I

DSS  

µA  
nA  
I

GSS  

–
10  
100  
V

GS

=20ꢀV,ꢀ
V

DS

=0ꢀV  
–
–
0.66  
0.85  
0.75  
1
V

GS

=10ꢀV,ꢀ
I

D

=150ꢀA  
V

GS

=6ꢀV,ꢀ
I

D

=75ꢀA  
R

DS(on)  

m
Ω  
Gate resistance  
R

G  

g

fs  

–
1.8  
2.7  
–
Ω
–
Transconductance  
160  
320  
S
|
V

DS

|>2|
I

D

|
R

DS(on)max

,ꢀ
I

D

=100ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
C

iss  

C

oss  

C

rss  

–
–
–
16000 21280 pF  
3400 4522 pF  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
V

GS

=0ꢀV,ꢀ
V

DS

=30ꢀV,ꢀ
f
=1ꢀMHz  
Output capacitance  
Reverse transfer capacitance  
229  
38  
458  
–
pF  
ns  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

=1.8ꢀ
Ω  
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
–
–
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

=1.8ꢀ
Ω  
18  
76  
22  
–
–
–
ns  
ns  
ns  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

=1.8ꢀ
Ω  
Turn-off delay time  
Fall time  
V

DD

=30ꢀV,ꢀ
V

GS

=10ꢀV,ꢀ
I

D

=100ꢀA,  
R

G,ext

=1.8ꢀ
Ω  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics

ꢀ1)

ꢀ  
Values  
Typ.  
67  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Q

gs  

–
–
–
–
–
–
–
–
–
nC  
nC  
nC  
nC  
nC  
V
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DD

=30ꢀV,ꢀ
I

D

=100ꢀA,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
V

DS

=0.1ꢀV,ꢀ
V

GS

=0ꢀtoꢀ10ꢀV  
Q

g(th)  

Q

gd  

47  
–
39  
–
Q

sw  

58  
–
Gate charge total  
Q

g  

216  
4.2  
287  
Gate plateau voltage  
Gate charge total, sync. FET  
Output charge  
V

plateau  

Q

g(sync)  

Q

oss  

–
192  
227  
255  
–
nC  
–
V

DD

=30ꢀV,ꢀ
V

GS

=0ꢀV  

1)

See
″
Gate charge waveforms
″
for parameter definition  
Final Data Sheet  
5
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
–
Max.  
300  
1200  
1
Diode continuous forward current  
Diode pulse current  
I

S  

–
–
–
–
–
A
T

C

=25ꢀ°C  
I

S,pulse  

V

SD  

t

rr  

–
A
T

C

=25ꢀ°C  
Diode forward voltage  
0.87  
87  
V
V

GS

=0ꢀV,ꢀ
I

F

=150ꢀA,ꢀ
T

j

=25ꢀ°C  
V

R

=30ꢀV,ꢀ
I

F

=100A,ꢀd
i

F

/d
t
=100ꢀA/µs  
V

R

=30ꢀV,ꢀ
I

F

=100A,ꢀd
i

F

/d
t
=100ꢀA/µs  
Reverse recovery time  
Reverse recovery charge  
174  
–
ns  
nC  
Q

rr  

144  
Final Data Sheet  
6
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
5ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
400  
350  
300  
250  
200  
150  
100  
50  
350  
300  
250  
200  
150  
100  
50  
0
0
0
25  
50  
75  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
200  
T

C

ꢀ[°C]  
T

C

ꢀ[°C]  
P

tot

=f(
T

C

)  
I

D

=f(
T

C

);ꢀ
V

GS

≥
10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
10

4  

10

0  

1 µs  
10

3  

10

2  

10

1  

10

0  

10

-1  

10 µs  
0.5  
10

-1  

0.2  
100 µs  
0.1  
0.05  
0.02  
1 ms  
10 ms  
DC  
10

-2  

0.01  
single pulse  
10

-3  

10

-1  

10

0  

10

1  

10

2  

10

-6  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

V

DS

ꢀ[V]  
t

p

ꢀ[s]  
I

D

=f(
V

DS

);ꢀ
T

C

=25ꢀ°C;ꢀ
D
=0;ꢀparameter:ꢀ
t

p  

Z

thJC

=f(
t

p

);ꢀparameter:ꢀ
D
=
t

p

/
T  
Final Data Sheet  
7
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
1200  
3.0  
6 V  
10 V  
7 V  
1000  
800  
600  
400  
200  
0
2.5  
5 V  
2.0  
1.5  
1.0  
0.5  
0.0  
5.5 V  
5.5 V  
6 V  
5 V  
7 V  
10 V  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
200  
400  
600  
800  
1000  
1200  
V

DS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

DS

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

R

DS(on)

=f(
I

D

);ꢀ
T

j

=25ꢀ°C;ꢀparameter:ꢀ
V

GS  

Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
1200  
450  
400  
350  
300  
250  
200  
150  
100  
50  
1000  
800  
600  
400  
200  
175 °C  
25 °C  
0
0
0
2
4
6
8
0
50  
100  
150  
200  
V

GS

ꢀ[V]  
I

D

ꢀ[A]  
I

D

=f(
V

GS

);ꢀ|
V

DS

|>2|
I

D

|
R

DS(on)max

;ꢀparameter:ꢀ
T

j  

g

fs

=f(
I

D

);ꢀ
T

j

=25ꢀ°C  
Final Data Sheet  
8
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
1.6  
4
1.2  
3
2
1
0
2800 µA  
280 µA  
max  
0.8  
typ  
0.4  
0.0  
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
T

j

ꢀ[°C]  
R

DS(on)

=f(
T

j

);ꢀ
I

D

=150ꢀA;ꢀ
V

GS

=10ꢀV  
V

GS(th)

=f(
T

j

);ꢀ
V

GS

=
V

DS  

Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
10

5  

10

4  

25 °C  
175 °C  
25 °C, 98%  
175 °C, 98%  
Ciss  
10

4  

10

3  

10

2  

10

1  

10

3  

10

2  

10

1  

10

0  

Coss  
Crss  
0
20  
40  
60  
0.0  
0.5  
1.0  
1.5  
2.0  
V

DS

ꢀ[V]  
V

SD

ꢀ[V]  
C
=f(
V

DS

);ꢀ
V

GS

=0ꢀV;ꢀ
f
=1ꢀMHz  
I

F

=f(
V

SD

);ꢀparameter:ꢀ
T

j  

Final Data Sheet  
9
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
10

3  

12  
10  
8
30 V  
12 V  
48 V  
10

2  

125 °C  
25 °C  
100 °C  
6
10

1  

4
2
10

0  

0
10

0  

10

1  

10

2  

10

3  

0
50  
100  
150  
200  
250  
t

AV

ꢀ[µs]  
Q

gate

ꢀ[nC]  
I

AS

=f(
t

AV

);ꢀ
R

GS

=25ꢀ
Ω
;ꢀparameter:ꢀ
T

j(start)  

V

GS

=f(
Q

gate

);ꢀ
I

D

=100ꢀAꢀpulsed;ꢀparameter:ꢀ
V

DD  

Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Gate charge waveforms  
68  
66  
64  
62  
60  
58  
56  
54  
52  
-60  
-20  
20  
60  
100  
140  
180  
T

j

ꢀ[°C]  
V

BR(DSS)

=f(
T

j

);ꢀ
I

D

=1ꢀmA  
Final Data Sheet  
10  
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
6ꢀꢀꢀꢀꢀPackageꢀOutlines  
1) partially covered with Mold Flash  
MILLIMETERS  
INCHES  
DIM  
MIN  
2.20  
0.70  
9.70  
0.42  
0.40  
MAX  
2.40  
0.90  
9.90  
0.50  
0.60  
10.58  
MIN  
MAX  
0.094  
0.035  
0.390  
0.020  
0.024  
0.416  
DOCUMENT NO.  
Z8B00169619  
A
b
0.087  
0.028  
0.382  
0.017  
0.016  
0.405  
b1  
b2  
c
0
SCALE  
D
10.28  
2
D2  
E
3.30  
0.130  
9.70  
10.10  
0.382  
0.398  
0
2
E1  
E4  
E5  
e
7.50  
8.50  
0.295  
0.335  
4mm  
9.46  
1.20 (BSC)  
0.372  
0.047 (BSC)  
EUROPEAN PROJECTION  
H
11.48  
6.55  
11.88  
6.75  
0.452  
0.258  
0.468  
0.266  
H1  
H2  
H3  
H4  
N
7.15  
3.59  
3.26  
8
0.281  
0.141  
0.128  
8
ISSUE DATE  
20-02-2014  
K1  
L
4.18  
0.165  
1.60  
1.00  
2.10  
1.30  
0.063  
0.039  
0.083  
0.051  
L1  
L2  
L4  
0.70  
0.60  
0.028  
0.024  
REVISION  
02  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOF-8-1,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
11  
Rev.ꢀ2.1,ꢀꢀ2014-02-20  

OptiMOS

TM

ꢀPower-Transistor,ꢀ60ꢀV  
IPT007N06N  
RevisionꢀHistory  
IPT007N06N  
Revision:ꢀ2014-02-20,ꢀRev.ꢀ2.1  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
Release of final version  
Update Diagram 12  
2014-02-06  
2014-02-20  
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Final Data Sheet  
12  
Rev.ꢀ2.1,ꢀꢀ2014-02-20