Infineon-Technologies-IRF1407PBF
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PD – 95485A
IRF1407PbF
Typical Applications
HEXFET
®
Power MOSFET
Industrial Motor Drive
D
Benefits
V
DSS
= 75V
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
R
DS(on)
= 0.0078
Ω
G
I
D
= 130A
S
Repetitive Avalanche Allowed up to Tjmax
Description
This Stripe Planar design of HEXFET
®
Power MOSFETs
utilizes the lastest processing techniques to achieve
extremely low
on-resistance per silicon area.
Additional
features of this HEXFET power MOSFET are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating. These benefits
combine to make this design an extremely efficient and
reliable device for use in a wide variety of applications.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
130
92
520
Units
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
A
P
D
@T
C
= 25°C
Power Dissipation
330
W
W/°C
V
Linear Derating Factor
2.2
V
GS
E
AS
I
AR
Gate-to-Source Voltage
± 20
390
Single Pulse Avalanche Energy
Avalanche Current
mJ
See Fig.12a, 12b, 15, 16
A
E
AR
dv/dt
T
J
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
mJ
4.6
V/ns
-55 to
+ 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
–––
0.50
–––
Max.
Units
R
θ
JC
R
θ
CS
R
θ
JA
0.45
–––
62
°C/W
1
07/14/10
IRF1407PbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
75 –––
–––
Conditions
V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
––– 0.09
––– V/°C
Reference to 25°C, I
D
= 1mA
R
DS(on)
V
GS(th)
g
fs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– –––
0.0078
Ω
V
S
V
GS
= 10V, I
D
= 78A
V
DS
= 10V, I
D
= 250µA
V
DS
= 25V, I
D
= 78A
V
DS
= 75V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 150°C
V
GS
= 20V
2.0
74
––– 4.0
––– –––
Forward Transconductance
––– ––– 20
––– –––
250
––– –––
200
––– –––
-200
––– 160
250
I
DSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
I
GSS
V
GS
= -20V
Q
g
I
D
= 78A
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
35
54
52
81
nC V
DS
= 60V
V
GS
= 10V
V
DD
= 38V
11 –––
––– 150
–––
––– 150
–––
––– 140
–––
I
D
= 78A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
R
G
= 2.5
Ω
V
GS
= 10V
D
S
Between lead,
4.5
L
D
L
S
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
6mm (0.25in.)
nH
G
from package
7.5
and center of die contact
C
iss
Input Capacitance
––– 5600
–––
––– 890
–––
––– 190
–––
––– 5800
–––
––– 560
–––
––– 1100
–––
V
GS
= 0V
C
oss
Output Capacitance
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
Output Capacitance
ƒ = 1.0KHz, See Fig. 5
C
oss
V
GS
= 0V,
V
DS
= 1.0V,
ƒ = 1.0KHz
V
GS
= 0V,
V
DS
= 60V,
ƒ = 1.0KHz
V
GS
= 0V, V
DS
= 0V to 60V
C
oss
Output Capacitance
C
oss
eff.
Effective Output Capacitance
ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
D
I
S
MOSFET symbol
––– –––
130
showing the
A
G
I
SM
Pulsed Source Current
(Body Diode)
integral reverse
––– –––
520
S
p-n junction diode.
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 110 170
––– 390 590
V
T
J
= 25°C, I
S
= 78A, V
GS
= 0V
ns
T
J
= 25°C, I
F
= 78A
Q
rr
t
on
nC di/dt
= 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating;
pulse width limited by
max. junction temperature. (See fig. 11).
Starting T
J
= 25°C, L = 0.13mH
R
G
= 25
Ω
, I
AS
= 78A. (See Figure 12).
I
SD
≤
78A, di/dt
≤
320A/µs, V
DD
≤
V
(BR)DSS
T
J
≤
175°C
ꢀ
C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
,
Pulse width
≤
400µs; duty cycle
≤
2%.
2
IRF1407PbF
1000
100
10
1000
100
10
VGS
15V
10V
VGS
15V
10V
TOP
TOP
8.0V
8.0V
7.0V
6.0V
5.5V
5.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
Tj = 25°C
20µs PULSE WIDTH
Tj = 175°C
1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
3.0
1000.00
100.00
10.00
130A
=
I
D
T
= 25°C
2.5
2.0
1.5
1.0
0.5
0.0
J
T =
175°C
J
V
= 15V
DS
20µs PULSE WIDTH
V
= 10V
GS
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
°
3.0
5.0
7.0
9.0
11.0
13.0
T ,
Junction Temperature
( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
vs. Temperature
3
IRF1407PbF
15
12
9
100000
D
I
=
78A
V
C
= 0V,
f = 1 MHZ
GS
V
V
V
= 60V
= 37V
= 15V
DS
DS
DS
= C
+ C
,
C
ds
SHORTED
iss
gs
gd
C
= C
rss
gd
C
= C
+ C
ds gd
oss
10000
1000
100
Ciss
6
Coss
Crss
3
0
0
40
Q
80
120
160
200
1
10
100
,
T
otal Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6.
Typical Gate Charge vs.
Fig 5.
Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000.00
100.00
10.00
1.00
10000
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
1000
100
10
J
100µsec
1msec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
10msec
100
GS
1
0.10
1
10
1000
0.0
1.0
2.0
3.0
V
, Drain-toSource Voltage (V)
V
, Source-toDrain Voltage (V)
DS
SD
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRF1407PbF
140
120
100
80
R
D
V
DS
LIMITED BY PACKAGE
V
GS
10V
D.U.T.
R
G
+
V
DD
–
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
60
Fig 10a.
Switching Time Test Circuit
40
V
20
DS
90%
0
25
50
75
100
125
150
175
°
( C)
T
, Case Temperature
C
10%
V
GS
Fig 9.
Maximum Drain Current vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b.
Switching Time Waveforms
1
D = 0.50
0.20
0.10
0.1
0.05
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
P
DM
0.01
t
1
t
2
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRF1407PbF
650
520
390
260
130
0
15V
I
D
TOP
32A
55A
78A
BOTTOM
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
–
I
A
20V
0.01
Ω
t
p
Fig 12a.
Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
( C)
Starting T
, Junction Temperature
J
I
AS
Fig 12c.
Maximum Avalanche Energy
Fig 12b.
Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
3.5
V
G
3.0
2.5
2.0
1.5
I
= 250µA
D
Charge
Fig 13a.
Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.
T
.
50K
Ω
.2
µ
F
12V
.3
µ
F
+
V
DS
D.U.
T
.
–
V
GS
-75 -50 -25
0
25 50 75
100 125 150 175 200
3mA
T ,
Temperature ( °C )
J
I
I
D
G
Current Sampling Resistors
Fig 14.
Threshold Voltage vs. Temperature
Fig 13b.
Gate Charge Test Circuit
6
IRF1407PbF
1000
100
10
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming
Tj = 25°C due to
∆
avalanche losses
0.05
0.10
1
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15.
Typical Avalanche Current vs.Pulsewidth
400
300
200
100
0
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
D (ave)
= Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
av
= Allowable avalanche current.
TOP
BOTTOM 10%
Duty Cycle
= 78A
Single Pulse
I
D
7.
∆
T
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as 25°C in Figure 15, 16).
t
av =
Average time in avalanche.
25
50
75
100
125
150
175
D = Duty cycle in avalanche =
t
av
·f
Starting T
, Junction Temperature (°C)
Z
thJC
(D, t
av
) = Transient thermal resistance, see figure 11)
J
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
D
T/ Z
thJC
I
av
= 2
D
T/ [1.3·BV·Z
th
]
Fig 16.
Maximum Avalanche Energy
E
AS (AR)
= P
D (ave)
·t
av
vs. Temperature
7
IRF1407PbF
Peak Diode Recovery dv/dt Test Circuit
+
–
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
D.U.T
*
+
–
–
+
R
G
•
dv/dt controlled by R
G
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
+
–
V
DD
V
GS
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple
≤
5%
***
V
GS
= 5.0V for Logic Level and 3V Drive Devices
Fig 17.
For N-channel
HEXFET
®
power MOSFETs
8
IRF1407PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EX
A
M
P
LE: TH
I
S
IS
A
N I
R
F1010
L
O
T CO
D
E 1789
P
A
R
T
N
U
M
B
ER
IN
T
ER
N
A
T
I
O
N
A
L
RE
C
T
I
FIER
L
O
GO
A
S
SE
M
B
LED
O
N WW
1
9, 2000
IN
T
H
E
A
S
SE
M
B
LY LINE “
C
”
DAT E
CODE
YE
A
R 0 =
2000
W
E
EK 19
Note: “P” in
a
s
s
e
mb
l
y lin
e
p
o
s
i
t
ion
ind
i
c
a
t
es “Le
a
d –
F
r
e
e”
AS S E MB L Y
L
O
T CODE
LI
N
E C
TO-220 package is not recommended for Surface Mount Application.
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
9
