Infineon-Technologies-IRF530NPBF
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PD – 94962
IRF530NPbF
HEXFET
®
Power MOSFET
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Dynamic dv/dt Rating
l
175°C Operating Temperature
l
Fast Switching
D
V
DSS
= 100V
R
DS(on)
= 90m
Ω
G
l
Fully Avalanche Rated
l
Lead-Free
I
D
= 17A
S
Description
Advance
d
H
EXFET
®
Powe
r
M
OSFET
s
f
ro
m
I
nternational
Rectifie
r
u
tiliz
e
a
dvance
d
p
rocessin
g
t
echnique
s
t
o
a
chieve
extremel
y
l
o
w
o
n-resistanc
e
p
e
r
s
ilico
n
a
rea. Thi
s
b
enefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
know
n
f
or
,
p
rovide
s
t
h
e
d
esigne
r
w
it
h
a
n
e
xtremel
y
e
fficient
an
d
r
eliabl
e
d
evic
e
f
o
r
u
s
e
i
n
a
w
id
e
v
ariet
y
o
f
a
pplications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts.
The low thermal
resistance and low package cost of the TO-220 contribute
to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
Units
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
17
12
A
60
70
P
D
@T
C
= 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.47
V
GS
I
AR
Gate-to-Source Voltage
± 20
Avalanche Current
9.0
A
E
AR
dv/dt
T
J
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
7.0
mJ
V/ns
7.4
-55 to
+ 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
–––
0.50
–––
Max.
Units
R
θ
JC
R
θ
CS
R
θ
JA
2.15
–––
62
°C/W
1
01/30/04
IRF530NPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 –––
–––
Conditions
V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
––– 0.11
––– V/°C
Reference to 25°C, I
D
= 1mA
R
DS(on)
V
GS(th)
g
fs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 90
m
Ω
V
GS
= 10V, I
D
= 9.0A
2.0
12
––– 4.0
––– –––
V
S
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 50V, I
D
= 9.0A
V
DS
= 100V, V
GS
= 0V
Forward Transconductance
––– ––– 25
––– –––
250
––– –––
100
––– –––
-100
––– ––– 37
––– ––– 7.2
––– ––– 11
I
DSS
Drain-to-Source Leakage Current
µA
nA
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
V
GS
= 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
I
GSS
V
GS
= -20V
Q
g
I
D
= 9.0A
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
Rise Time
nC V
DS
= 80V
V
GS
= 10V, See Fig. 6 and 13
–––
–––
–––
–––
9.2 –––
22 –––
35 –––
25 –––
V
DD
= 50V
I
D
= 9.0A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
R
G
= 12
Ω
V
GS
= 10V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
V
GS
= 0V
D
S
4ꢀ5
L
D
L
S
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
nH
G
7ꢀ5
C
iss
C
oss
C
rss
E
AS
Input Capacitance
––– 920
–––
––– 130
–––
Output Capacitance
V
DS
= 25V
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
–––
19 –––
pF
ƒ = 1.0MHz, See Fig. 5
––– 340
ꢀ
93
mJ I
AS
= 9.0A, L = 2.3mH
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
I
S
17
60
––– –––
––– –––
showing the
A
G
I
SM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
S
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.3
––– 93 140
––– 320 480
V
T
J
= 25°C, I
S
= 9.0A, V
GS
= 0V
T
J
= 25°C, I
F
= 9.0A
ns
Q
rr
t
on
nC di/dt
= 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating;
pulse width limited by
Pulse width
≤
400µs; duty cycle
≤
2%.
ꢀ
This is a typical value at device destruction and represents
operation outside rated limits.
max. junction temperature. (See fig. 11)
Starting T
J
= 25°C, L = 2.3mH
This is a calculated value limited to T
J
= 175°C .
R
G
= 25
Ω
, I
AS
= 9.0A, V
GS
=10V (See Figure 12)
I
SD
≤
9.0A
,
di/d
t
≤
410A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
2
IRF530NPbF
100
10
1
100
10
1
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
°
T =
175 C
J
20µs PULSE WIDTH
°
T =
25 C
J
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
3.5
15A
=
I
D
3.0
2.5
2.0
1.5
1.0
0.5
0.0
°
T =
25 C
J
°
T =
175 C
J
V
= 50V
DS
V
=
1
0V
GS
20µs PULSE WIDTH
10
4.0
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
°
5.0
6.0
7.0 8.0
T ,
Junction Temperature (
C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
3
IRF530NPbF
20
16
12
8
1600
I =
9.0A
D
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
C
= C
+ C
iss
gs
gd ,
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
= C
rss
gd
C
= C
+ C
oss
ds
gd
1200
800
400
0
C
iss
C
oss
4
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
10
20
30
40
V
, Drain-to-Source Voltage (V)
Q ,
Total Gate Charge (nC)
DS
G
Fig 6.
Typical Gate Charge Vs.
Fig 5.
Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
°
T =
175 C
J
10
100µsec
1msec
1
1
°
T =
25 C
J
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
1.2
0.1
0.2
0.1
0.4
0.6
0.8
1.0
1.4
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-toSource Voltage (V)
DS
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRF530NPbF
20
16
12
8
R
D
V
DS
V
GS
DꢀUꢀTꢀ
R
G
+
V
DD
–
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10aꢀ
Switching Time Test Circuit
4
V
DS
90%
0
25
50
75
100
125
150
175
°
T ,
Case Temperature
( C)
C
10%
V
GS
Fig 9.
Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10bꢀ
Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
0.1
0.01
t
1
t
2
Notes:
1. Duty factor D =
t /
t
1
2. Peak T
=
P
x Z
+ T
thJC C
J
DM
0.00001
0.0001
0.001
0.01
0.1
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRF530NPbF
200
160
120
80
I
15V
D
TOP
3.7A
6.4A
BOTTOM 9.0A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
–
I
A
V
G
S
Ω
0.01
t
p
Fig 12aꢀ
Unclamped Inductive Test Circuit
40
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
°
Starting T
, Junction Temperature (
C)
J
Fig 12cꢀ
Maximum Avalanche Energy
Vs# Drain Current
I
AS
Fig 12bꢀ
Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.
T
.
50K
Ω
.2
µ
F
12V
.3
µ
F
Q
G
+
V
GS
V
DS
D.U.
T
.
–
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13bꢀ
Gate Charge Test Circuit
Fig 13aꢀ
Basic Gate Charge Waveform
6
IRF530NPbF
Peak Diode Recovery dv/dt Test Circuit
+
–
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
DꢀUꢀT
*
+
–
–
+
R
G
•
dv/dt controlled by R
G
•
I
SD
controlled by Duty Factor “D”
•
DꢀUꢀTꢀ – Device Under Test
+
–
V
DD
V
GS
*
Reverse Polarity of DꢀUꢀT for P-Channel
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple
≤
5%
***
V
GS
= 5ꢀ0V for Logic Level and 3V Drive Devices
Fig 14ꢀ
For N-channel
HEXFET
®
power MOSFETs
7
IRF530NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
– B –
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
– A –
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAM
P
LE:
THIS IS
A
N
I
RF1010
L
O
T CO
D
E 1789
P
A
R
T NU
M
B
ER
AS S
E
M
B
LED
O
N WW 19, 1997
IN T
H
E
A
S
S E M
B
LY LINE
“
C”
IN
T
ERN
A
T
I
ONAL
RE
C
T
I
F
I
E
R
L
O
GO
Note:
“P” in assembly line
position indicates “Lead-Free”
D
A
T
E
C
O
D
E
Y
E
A
R 7 =
1
997
W
E
EK
1
9
AS
S
E
M
B
LY
L
O
T CODE
L
I
NE C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
8
Note: For
the most current drawings please refer to the IR website at:
