Infineon-Technologies-IRF7480MTRPBF

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Infineon-Technologies-IRF7480MTRPBF
Strong
IR
FET™  
IRF7480MTRPbF  
DirectFET

®

N-Channel Power MOSFET
 
Application  
Brushed Motor drive applications  
BLDC Motor drive applications  

Battery powered circuits  
Half-bridge and full-bridge topologies  
Synchronous rectifier applications  
Resonant mode power supplies  
OR-ing and redundant power switches  
DC/DC and AC/DC converters  
DC/AC Inverters  
V

DSS  

R

DS(on)

typ.  
max  
40V  
0.95m
  
1.20m
  
217A  
I

D (Silicon Limited)  

I

D (double-sided cooling)  

330A  
S
S
S
S
S
Benefits  
D
D
Improved Gate,
 
Avalanche and Dynamic dv/dt Ruggedness  
Fully Characterized Capacitance and Avalanche SOA  
Enhanced body diode dv/dt and di/dt Capability  
Lead-Free, RoHS Compliant  
G

ME  
Standard Pack  
Form  
Base part number  
Package Type  
Orderable Part Number  
Quantity  
IRF7480MPbF  
DirectFET

®

ME  
Tape and Reel  
4800  
IRF7480MTRPbF  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
225  
200  
175  
150  
125  
100  
75  
I
= 132A  
D
T
= 125°C  
J
50  
25  
T
= 25°C  
J
0
4
6
8
10 12 14 16 18 20  
25  
50  
75  
100  
125  
150  
T
, Case Temperature (°C)  
C
V
Gate -to -Source Voltage
 
(V)  
GS,  
Fig 2.
 
Maximum Drain Current vs. Case Temperature  
Fig 1.
 
Typical On-Resistance vs. Gate Voltage  
1
2016-5-4  

IRF7480MTRPbF  
Absolute Maximum Ratings  
Symbol  
Parameter  
Max.  
Units  
I

D

@ T

C

(top)= 25°C  
Continuous Drain Current, V

GS

@ 10V (double-sided cooling)  
330  
T

C

(bottom)= 25°C  
I

D

@ T

C

= 25°C  
I

D

@ T

C

= 100°C  
I

DM  

Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Pulsed Drain Current
  
217
  
137
  
868  
A
P

D

@T

C

= 25°C  
Maximum Power Dissipation  
96  
W
W/°C  
V
Linear Derating Factor  
0.77  
V

GS  

T

J  

T

STG  

Gate-to-Source Voltage  
± 20  
Operating Junction and  
Storage Temperature Range  
-55 to
 
+ 150  
°C  
Avalanche Characteristics  
E

AS (Thermally limited)  

Single Pulse Avalanche Energy
  
Single Pulse Avalanche Energy
 
  
Avalanche Current
  
81  
mJ  
E

AS (Thermally limited)  

206  
I

AR  

A
See Fig.15,16, 23a, 23b  
E

AR  

Repetitive Avalanche Energy
  
mJ  
Thermal Resistance  
Symbol  
R

JA  

Parameter  
Junction-to-Ambient
  
Junction-to-Ambient
  
Junction-to-Ambient
  
Junction-to-Case
  
Typ.  
–––  
12.5  
20  
Max.  
45  
Units  
–––  
–––  
1.3  
R

JA  

°C/W  
R

JA  

R

JC  

–––  
0.75  
Junction-to-PCB Mounted  
–––  
R

J-PCB  

Static @ T

J

= 25°C (unless otherwise specified)  
Symbol  
V

(BR)DSS  

Parameter  
Min. Typ. Max. Units  
Conditions  
V

GS

= 0V, I

D

= 250µA  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
40  
––– –––  
V
–––  
30 –––
 
mV/°C Reference to 25°C, I

D

= 1.0mA
  
V

(BR)DSS

/
T

J  

R

DS(on)  

––– 0.95 1.20  
––– 1.60 –––  
V

GS

= 10V, I

D

= 132A
  
m
  
V

GS

= 6.0V, I

D

= 66A
  
V

DS

= V

GS

, I

D

= 150µA  
V

GS(th)  

I

DSS  

Gate Threshold Voltage  
2.1  
3.0  
3.9  
V
––– ––– 1.0  
––– ––– 150  
––– ––– 100  
––– –––
 
-100  
––– 0.81 –––  
V

DS

= 40V, V

GS

= 0V  
Drain-to-Source Leakage Current  
µA  
V

DS

= 40V, V

GS

= 0V, T

J

= 125°C  
I

GSS  

Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
V

GS

= 20V  

GS

= -20V  
nA  
V
R

G  

Notes:  
Mounted on minimum footprint full size board with metalized  
back and with small clip heatsink.  
TC measured with thermocouple mounted to top (Drain) of part.  
Used double sided cooling , mounting pad with large heatsink.  
Mounted to a PCB with small clip  
heatsink (still air)  
Mounted on minimum footprint full size  
board with metalized back and with  
small clip heatsink (still air)  
Surface mounted on 1 in. square Cu  
board (still
 
air).  
2
2016-5-4  

IRF7480MTRPbF  
Dynamic @ T

J

= 25°C (unless otherwise specified)  
Symbol  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max.
 
Units  
Conditions  

DS

= 10V, I

D

= 132A  
gfs  
Q

g  

370 ––– –––  
––– 123 185  
S
V
I

D

= 132A  
Q

gs  

Q

gd  

Q

sync  

t

d(on)  

t

r  

Gate-to-Source Charge  
Gate-to-Drain (“Miller”) Charge  
Total Gate Charge Sync. (Q

g

– Q

gd

)  
Turn-On Delay Time  
Rise Time  
Turn-Off Delay Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
31  
44  
79  
21  
70  
68  
58  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
V

DS

=20V  
nC  
V

GS

= 10V
  
I

D

= 132A, V

DS

=0V, V

GS

= 10V  
V

DD

= 20V  
I

D

= 30A  
R

G

= 2.7
  
ns  
t

d(off)  

t

f  

Fall Time  
V

GS

= 10V
  
C

iss  

C

oss  

C

rss  

Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
––– 6680 –––  
––– 1035 –––  
––– 700 –––  
V

GS

= 0V  
V

DS

= 25V  
ƒ = 1.0MHz  
pF  
C
C

oss

eff. (ER)
 
Effective Output Capacitance (Energy Related)
 
––– 1240 –––  

oss

eff. (TR)
 
Effective Output Capacitance (Time Related)
 
––– 1515 –––  
V

GS

= 0V, V

DS

= 0V to 32V
  
V

GS

= 0V, V

DS

= 0V to 32V
  
Diode Characteristics  
Symbol Parameter  
Min. Typ. Max.
 
Units  
Conditions  
D
I

S  

Continuous Source Current  
(Body Diode)  
Pulsed Source Current  
(Body Diode)
  
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
––– –––  
––– –––  
87  
A
V
G
I

SM  

868  
S
V

SD  

Diode Forward Voltage  
––– ––– 1.2  
T

J

= 25°C,I

S

=132A, V

GS

= 0V
  
dv/dt  
Peak Diode Recovery
  
T

J

=150°C,I

S

=132A,  
V

DS

= 40V  
––– 2.4 –––
 
V/ns  
t

rr  

Reverse Recovery Time  
–––  
–––  
–––  
–––  
44  
46  
56  
63  
–––  
–––  
–––  
–––  
T

J

= 25° C
 
V

R

= 34V,  
ns  
I

F

= 132A  
T

J

= 125°C  
T

J

= 25°C  
T

J

= 125°C  
T

J

= 25°C  
di/dt = 100A/µs
  
Q

rr  

I

RRM  

Reverse Recovery Charge  
Reverse Recovery Current  
nC  
A
––– 2.1 –––  
Notes:  
Repetitive rating;
 
pulse width limited by max. junction temperature.  
Limited by T

J

max, starting T

J

= 25°C, L = 0.009mH, R

G

= 50
, I

AS

= 132A, V

GS

=10V.  
I

SD

≤
132A, di/dt
≤
920A/µs, V

DD

≤
V(

BR)DSS

, T

J

≤
150°C.  
Pulse width
≤
400µs; duty cycle
≤
2%.  
C

oss

eff. (TR) is a fixed capacitance that gives the same charging time as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

.
C

oss

eff. (ER) is a fixed capacitance that gives the same energy as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

.
When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer  
R

is measured at T

J

approximately 90°C.  
Limited by T

Jmax

, starting T

J

= 25°C, L = 1mH, R

G

= 50
, I

AS

= 20A, V

GS

=10V.  
3
2016-5-4  

IRF7480MTRPbF  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60µs PULSE WIDTH  
60µs PULSE WIDTH  
Tj = 25°C  
Tj = 150°C  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 3.
 
Typical Output Characteristics  
Fig 4.
 
Typical Output Characteristics  
1000  
100  
10  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I
= 132A  
= 10V  
D
V
GS  
T
= 150°C  
J
T
= 25°C  
J
V
= 10V  
DS  
60µs PULSE WIDTH  
1.0  
2
3
4
5
6
7
8
-60 -40 -20  
T
0
20 40 60 80
 
100 120 140 160  
, Junction Temperature (°C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 6.
 
Normalized On-Resistance vs. Temperature  
Fig 5.
 
Typical Transfer Characteristics  
14.0  
100000  
10000  
1000  
V
C
= 0V,  
f = 1 MHZ  
GS  
I
= 132A  
= C
 
+ C
 
, C
 
SHORTED  
D
iss  
gs  
gd ds  
12.0  
10.0  
8.0  
C
= C  
V
V
= 32V  
= 20V  
rss  
gd  
DS  
DS  
C
= C
 
+ C  
oss  
ds  
gd  
C
iss  
C
oss  
C
rss  
6.0  
4.0  
2.0  
0.0  
100  
0
20 40 60 80
 
100 120 140 160  
, Total
 
Gate Charge (nC)  
1
10  
100  
Q
V
, Drain-to-Source Voltage (V)  
G
DS  
Fig 7.
 
Typical Capacitance vs. Drain-to-Source Voltage  
Fig 8.
 
Typical Gate Charge vs. Gate-to-Source Voltage  
4
2016-5-4  

IRF7480MTRPbF  
1000  
100  
10  
1000  
100  
10  
100µsec  
T
= 150°C  
J
OPERATION IN THIS AREA  
LIMITED BY R
 
(on)  
DS  
1msec  
1
T
= 25°C  
= 0V  
J
10msec  
1
Tc = 25°C  
0.1  
0.01  
DC  
Tj = 150°C  
Single Pulse  
V
GS  
0.1  
0.1  
1
10  
0.2  
0.4  
0.6  
0.8  
1.0  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Source-to-Drain Voltage (V)  
SD  
Fig 10.
 
Maximum Safe Operating Area  
Fig 9.
 
Typical Source-Drain Diode Forward Voltage  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
48  
Id = 1.0mA  
47  
46  
45  
44  
43  
42  
41  
40  
-5  
0
5
10 15 20 25 30 35 40  
-60 -40 -20  
0
20 40 60 80
 
100 120 140 160  
, Temperature ( °C )  
T
V
Drain-to-Source Voltage (V)  
J
DS,  
Fig 12.
 
Typical C

oss

Stored Energy  
Fig 11.
 
Drain-to-Source Breakdown Voltage  
4.5  
Vgs = 5.5V  
Vgs = 6.0V  
4.0  
Vgs = 7.0V  
Vgs = 8.0V  
Vgs = 10V  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
20 40 60 80
 
100 120 140 160 180 200  
, Drain Current (A)  
I
D
Fig 13.
 
Typical On-Resistance vs. Drain Current  
5
2016-5-4  

IRF7480MTRPbF  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
0.1  
0.02  
0.01  
0.01  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 14.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming
Tj = 125°C and  
Tstart =25°C (Single Pulse)  
1
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming

j = 25°C and  
Tstart = 125°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15.
Avalanche Current vs. Pulse Width  
100  
80  
60  
40  
20  
0
TOP  
Single Pulse  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.irf.com)  
1.Avalanche failures assumption:  
BOTTOM 1.0%
 
Duty Cycle  
I
= 132A  
D
Purely a thermal phenomenon and failure occurs at a  
temperature far in excess of T

jmax

. This is validated for every  
part type.  
2. Safe operation in Avalanche is allowed as long asT

jmax

is not  
exceeded.  
3. Equation below based on circuit and waveforms shown in Figures  
23a, 23b.  
4. P

D (ave)

= Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage  
increase during avalanche).  
6. I

av

= Allowable avalanche current.  
7.
T = Allowable rise in junction temperature, not to exceed T

jmax  

(assumed as 25°C in Figure 14, 15).  
t

av

= Average time in avalanche.  
D = Duty cycle in avalanche =
 
tav ·f  
25  
50  
75  
100  
125  
150  
Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 13)  
Starting T
 
, Junction Temperature (°C)  
J
PD (ave) = 1/2 ( 1.3·BV·I

av

) =
T/ Z

thJC  

I

av

= 2
T/ [1.3·BV·Z

th

]  
Fig 16.
Maximum Avalanche Energy vs. Temperature  
E

AS (AR)

= P

D (ave)· av  

t
6
2016-5-4  

IRF7480MTRPbF  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
9
8
7
6
5
4
3
2
I
= 88A  
= 34V  
F
V
R
T =
 
25°C  
J
T =
 
125°C  
J
I
I
I
I
= 150µA  
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
D
-75 -50 -25  
0
25 50 75
 
100 125 150  
100  
200  
300  
400  
500  
600  
700  
T
, Temperature ( °C )  
di /dt
 
(A/µs)  
J
F
Fig 17.
 
Threshold Voltage vs. Temperature  
Fig 18.
 
Typical Recovery Current vs. dif/dt  
200  
9
8
7
6
5
4
3
2
I
= 88A  
= 34V  
I
= 132A  
= 34V  
F
F
V
V
180  
160  
140  
120  
100  
80  
R
R
T =
 
25°C  
T =
 
25°C  
J
J
T =
 
125°C  
J
T =
 
125°C  
J
100  
200  
300  
400  
500  
600  
700  
100  
200  
300  
400  
500  
600  
700  
di /dt
 
(A/µs)  
di /dt
 
(A/µs)  
F
F
Fig 20.
 
Typical Stored Charge vs. dif/dt  
Fig 19.
 
Typical Recovery Current vs. dif/dt  
200  
I
= 132A  
= 34V  
F
V
R
T =
 
25°C  
J
160  
120  
80  
T =
 
125°C  
J
40  
100  
200  
300  
400  
500  
600  
700  
di /dt
 
(A/µs)  
F
Fig 21.
 
Typical Stored Charge vs. dif/dt  
7
2016-5-4  

IRF7480MTRPbF  
Fig 22.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET

®

Power MOSFETs  
V
(BR)DSS  
t
p
15V  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
–
I
A
20V  
I
0.01  
t
AS  
p
Fig 23a.
 
Unclamped Inductive Test Circuit  
Fig 23b.
 
Unclamped Inductive Waveforms  
Fig 24a.
 
Switching Time Test Circuit  
Fig 24b.
 
Switching Time Waveforms  
Id  
Vds  
Vgs  
VDD  
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 25b.
 
Gate Charge Waveform  
Fig 25a.
 
Gate Charge Test Circuit  
8
2016-5-4  

IRF7480MTRPbF  
DirectFET

®

Board Footprint, ME Outline  
(Medium Size Can, E-Designation)  
Please see DirectFET

®

application note AN-1035 for all details regarding the assembly of DirectFET

®

.  
This includes all recommendations for stencil and
 
substrate designs.  
G = GATE  
D = DRAIN  
S = SOURCE  
D
D
D
D
G
S
S
S
S
S
Note: For the most current drawing please refer to IR website at

9
2016-5-4  

IRF7480MTRPbF  
DirectFET

®

Outline Dimension, ME Outline  
(Medium Size Can, E-Designation)  
Please see DirectFET

®

application note AN-1035 for all details regarding the assembly of DirectFET

®

. This includes  
all recommendations for stencil and
 
substrate designs.  
DIMENSIONS  
METRIC  
IMPERIAL  
CODE MIN
 
MAX  
MIN  
MAX  
0.250  
0.199  
0.156  
0.018  
0.024  
0.044  
0.038  
0.052  
0.017  
0.024  
0.036  
0.083  
0.144  
0.028  
A
B
6.25  
4.80  
3.85  
0.35  
0.58  
1.08  
0.93  
1.28  
0.38  
0.58  
0.88  
2.08  
3.63  
0.59  
0.02  
0.08  
6.35  
5.05  
3.95  
0.45  
0.62  
1.12  
0.97  
1.32  
0.42  
0.62  
0.92  
2.12  
3.67  
0.70  
0.246  
0.189  
0.152  
0.014  
0.023  
0.043  
0.037  
0.050  
0.015  
0.023  
0.035  
0.082  
0.143  
0.023  
C
D
E
F
G
H
J
J1  
K
L
L1  
M
N
P
0.08 0.0008 0.003  
0.17 0.003 0.007  
Dimensions are shown in  
millimeters (inches)  
DirectFET

®

Part Marking  
LOGO  
GATE MARKING  
PART NUMBER  
BATCH NUMBER  
DATE CODE  
Line above the last character of  
the date code indicates “Lead-Free”  
Note: For the most current drawing please refer to IR website at

10  
2016-5-4  

IRF7480MTRPbF  
DirectFET

®

Tape & Reel Dimension (Showing component orientation).  
NOTE: Controlling dimensions in mm  
Std reel quantity is 4800 parts. (ordered as IRF7480MTRPBF). For 1000 parts on 7″  
reel, order
 
IRF7480MTR1PBF  
REEL DIMENSIONS  
STANDARD OPTION
(QTY 4800)  
METRIC  
IMPERIAL  
MIN  
MAX  
TR1 OPTION
(QTY 1000)  
METRIC  
IMPERIAL  
CODE  
MIN  
12.992  
0.795  
0.504  
0.059  
3.937  
N.C  
MAX  
N.C  
MIN  
6.9  
MAX  
N.C  
N.C  
0.50  
N.C  
N.C  
0.53  
N.C  
N.C  
MIN  
MAX  
N.C  
A
B
C
D
E
F
330.0  
20.2  
12.8  
1.5  
N.C  
N.C  
13.2  
N.C  
N.C  
18.4  
14.4  
15.4  
177.77  
19.06  
13.5  
1.5  
0.75  
0.53  
0.059  
2.31  
N.C  
N.C  
N.C  
0.520  
N.C  
12.8  
N.C  
100.0  
N.C  
58.72  
N.C  
N.C  
N.C  
0.724  
0.567  
0.606  
13.50  
12.01  
12.01  
G
H
0.488  
0.469  
0.47  
0.47  
12.4  
11.9  
11.9  
11.9  
LOADED TAPE FEED DIRECTION  
DIMENSIONS  
METRIC  
IMPERIAL  
NOTE: CONTROLLING  
DIMENSIONS IN MM  
CODE  
MIN  
MAX  
MIN  
7.90  
3.90  
11.90  
5.45  
5.10  
6.50  
1.50  
1.50  
MAX  
8.10  
4.10  
12.30  
5.55  
5.30  
6.70  
N.C  
A
B
C
D
E
F
0.311  
0.154  
0.469  
0.215  
0.201  
0.256  
0.059  
0.059  
0.319  
0.161  
0.484  
0.219  
0.209  
0.264  
N.C  
G
H
0.063  
1.60  
Note: For the most current drawing please refer to IR website at

11  
2016-5-4  

IRF7480MTRPbF  
Qualification Information

†  

Qualification Level  
Industrial *  
(per JEDEC JESD47F

††

guidelines)  
MSL1  
DFET 1.5  
Moisture Sensitivity Level  
RoHS Compliant  
(per JEDEC J-STD-020D

††)  

Yes  
†
Qualification standards can be found at International Rectifier’s web site  
††  
Applicable version of JEDEC standard at the time of product release.  
* Industrial qualification standards except autoclave test conditions.  
Revision History  
Date  
Comments  

Updated E

AS (L =1mH)
 

= 206mJ
 
on page 2  

Updated note 9
 
“Limited by T

Jmax

, starting T

J

= 25°C, L = 1mH, R

G

= 50
, I

AS

= 20A, V

GS

=10V” on page 3  

Updated R
JA from
 
“60°C/W” to “45°C/W”
 
on page 2.  
11/07/2014  

Updated registered trademark from
 
DirectFET

TM

to DirectFET

®

on page 1,9 and 10.  
05/14/2015  
05/04/2016  

Updated datasheet with corporate template.  

Added ID (double- sided
 
cooling) = 300A on pages1 and 2.  
Published by  
Infineon Technologies AG  
81726 München, Germany  
©
Infineon Technologies AG 2015  
All Rights Reserved.  
IMPORTANT NOTICE  
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics  
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any  
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and  
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third  
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this  
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of  
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of  
customer’s technical departments to evaluate the suitability of the product for the intended application and the  
completeness of the product information given in this document with respect to such application.  
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies office (

).  
WARNINGS  
Due to technical requirements products may contain dangerous substances. For information on the types in question  
please contact your nearest Infineon Technologies office.  
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized  
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12  
2016-5-4