Infineon-Technologies-IRF7490TRPBF
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PD – 95284
IRF7490PbF
HEXFET
®
Power MOSFET
Applications
l
High frequency DC-DC converters
l
Lead-Free
V
DSS
100V
R
DS(on)
max
39m
W
@V
GS
=10V
Q
g
37nC
Benefits
l
Low Gate-to-Drain Charge to Reduce
Switching Losses
l
Fully Characterized Capacitance Including
Effective C
OSS
to Simplify Design, (See
App. Note AN1001)
A
A
D
1
2
3
4
8
7
S
S
S
G
D
6
5
D
D
l
Fully Characterized Avalanche Voltage
and Current
SO-8
Top View
Absolute Maximum Ratings
Symbol
Parameter
Max.
Units
V
DS
Drain-Source Voltage
100
V
V
GS
Gate-to-Source Voltage
± 20
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
5.4
4.3
A
43
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
Maximum Power Dissipation
Maximum Power Dissipation
Linear Derating Factor
2.5
1.6
W
20
mW/°C
°C
T
J
Operating Junction and
-55 to
+ 150
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Thermal Resistance
Symbol
R
θ
JL
R
θ
JA
Parameter
Junction-to-Drain Lead
Junction-to-Ambient
Typ.
–––
Max.
20
50
Units
–––
°C/W
Notes
through
are on page 9
1
09/15/04
IRF7490PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 –––
–––
––– 0.11
––– V/°C
Reference to 25°C, I
D
= 1mA
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
V
GS
= 0V, I
D
= 250µA
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
33
39
m
Ω
V
GS
= 10V, I
D
= 3.2A
––– 4.0
V
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 100V, V
GS
= 0V
V
DS
= 80V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
––– ––– 20
––– –––
250
––– –––
200
––– –––
-200
I
DSS
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
I
GSS
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
V
DS
= 50V, I
D
= 3.2A
I
D
= 3.2A
g
fs
8.0
–––
–––
–––
–––
–––
–––
–––
––– –––
S
Q
g
37
8.0
10
56
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
Rise Time
nC V
DS
= 50V
V
GS
= 10V,
13 –––
4.2 –––
51 –––
11 –––
V
DD
= 100V
I
D
= 3.2A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
R
G
= 9.1
Ω
V
GS
= 10V
V
GS
= 0V
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Input Capacitance
––– 1720
–––
––– 220
–––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
V
DS
= 25V
–––
25 –––
pF
ƒ = 1.0MHz
––– 1650
–––
––– 130
–––
––– 250
–––
V
GS
= 0V,
V
DS
= 1.0V,
ƒ = 1.0MHz
V
GS
= 0V,
V
DS
= 80V,
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 80V
ꢀ
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
Max.
91
Units
mJ
E
AS
I
AR
Avalanche Current
–––
3.2
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
I
S
Continuous Source Current
(Body Diode)
MOSFET symbol
2.3
43
––– –––
––– –––
showing the
A
G
I
SM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
S
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
––– ––– 1.3
––– 67 100
––– 220 330
V
T
J
= 25°C, I
S
= 3.2A, V
GS
= 0V
ns
T
J
= 25°C, I
F
= 3.2A
Q
rr
2
nC di/dt
= 100A/µs
IRF7490PbF
100
10
1
100
10
V
GS
15V
10V
7.0V
5.0V
4.5V
4.3V
4.0V
V
GS
15V
10V
7.0V
5.0V
4.5V
4.3V
4.0V
TOP
TOP
BOTTOM 3.7V
BOTTOM 3.7V
1
0
.
1
3.7V
3.7V
0
.
0
1
0
.
0
01
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0
.
1
0
.
1
1
10
100
0
.
1
1
10
100
V
, Dra
i
n
-to-Source Voltage (V)
V
, Dra
i
n
-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100.00
10.00
1.00
2
.
5
I
= 5.4A
D
T
= 150°C
J
V
= 10V
GS
2
.
0
1
.
5
1
.
0
0
.
5
T
= 25°C
J
0.10
V
= 50V
DS
20µs PULSE WIDTH
0.01
3.0
4.0
5.0 6.0
-60 -40 -20
T
0
20 40 60 80
100 120 140 160
V
, Gate-to-Source Voltage (V)
, Junction Temperature (°C)
GS
J
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
3
IRF7490PbF
20
16
12
8
100000
V
= 0V,
f = 1 MHZ
I =
3.2A
D
GS
C
= C
+ C
,
C
SHORTED
iss
gs
gd
ds
V
= 80V
DS
C
= C
rss
gd
VDS= 50V
VDS= 20V
C
= C
+ C
10000
1000
100
oss
ds
gd
Ciss
Coss
Cr
s
s
4
0
10
0
10
Q
20
30
40
50
60
1
10
100
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6.
Typical Gate Charge Vs.
Fig 5.
Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
100.0
10.0
1.0
O
P
ERATI
O
N
I
N THIS AREA
LIMITED BY R
(on)
DS
T
= 150°C
J
100µsec
1msec
1
T
= 25°C
V
J
Tc = 25°C
10msec
Tj = 150°C
= 0V
GS
Single Pulse
0.1
0.1
1
10
100
1000
0.2
0.4
0.6
0.8
1.0
1.2
V
, Drain-toSource Voltage (V)
V
, Source-toDrain Voltage (V)
DS
SD
Fig 7.
Typical Source-Drain Diode
Fig 8.
Maximum Safe Operating Area
Forward Voltage
4
IRF7490PbF
6
5
4
3
2
1
0
R
D
V
DS
V
GS
10V
D.U.T.
R
G
+
V
DD
–
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
V
DS
90%
25
50
T
75
100
125
150
, Case Temperature (°C)
C
10%
Fig 9.
Maximum Drain Current Vs.
V
GS
Ambient Temperature
t
t
r
t
t
f
d(on)
d(off)
Fig 10b.
Switching Time Waveforms
100
D = 0.50
0.20
0.10
0.05
0.02
0.01
10
1
0.1
SIN
G
L
E PULSE
( THERMAL RESPONSE )
0
.
01
1E-005
0
.
0
001
0
.
001
0
.
0
1
0.1
1
10
100
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
5
IRF7490PbF
0.045
0
.
0
6
0
.
0
5
0
.
0
4
0
.
0
3
0.040
V
= 10V
GS
0.035
0.030
I
= 3.2A
D
4
.
0
8
.
0
12.0
16
.
0
0
10
20
30
40
50
V
Gate -to -Source Voltage
(V)
I
, Dra
i
n Cu
r
rent (A)
G
S
,
D
Fig 12.
On-Resistance Vs. Drain Current
Fig 13.
On-Resistance Vs. Gate Voltage
Current Regulator
Same Type as D.U.
T
.
Q
G
50K
Ω
.3
µ
F
V
GS
.2
µ
F
12V
Q
Q
GD
GS
+
V
240
DS
D.U.
T
.
–
V
G
I
D
V
GS
1.4A
2.6A
3.2A
TOP
3mA
Charge
200
160
120
80
I
I
D
G
BOTTOM
Current Sampling Resistors
Fig 14a&b.
Basic Gate Charge Test Circuit
and Waveform
15V
40
V
(BR)DSS
DRIVER
+
L
t
p
V
DS
0
D.U.T
AS
R
G
V
25
50
75
100
125
150
DD
–
I
A
20V
Starting T
, Junction Temperature (°C)
Ω
0.01
t
p
J
I
AS
Fig 15c.
Maximum Avalanche Energy
Fig 15a&b.
Unclamped Inductive Test circuit
Vs. Drain Current
and Waveforms
6
IRF7490PbF
Driver Gate Drive
P.W.
P
.
W.
D =
Period
D.U.T
Period
+
*
=10V
V
GS
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
–
D.U.
T
. I
W
aveform
SD
+
–
Reverse
Recovery
Current
Body Diode Forward
Current
–
+
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
V
DD
Re-Applied
Voltage
•
dv/dt controlled by R
G
R
G
+
–
Body Diode
Forward Drop
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 16.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
Id
Vds
Vgs
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 17.
Gate Charge Waveform
7
IRF7490PbF
SO-8 Package Outline
INCHES
MIL L IME T E RS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
M
I
N
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
5
A
E
A1
.
0040
b
c
.013
8
1
7
2
6
3
5
.0075
.189
.0098
.1968
.1574
6
H
D
E
e
0.25 [.010]
A
.1497
4
.050 B
A
S
I
C
1.27 B
A
S
I
C
e 1
.025 B
A
S
I
C
0.635 B
A
S
I
C
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
e
6X
e1
K x 45°
A
C
y
0.10 [.004]
8X c
A1
B
8X L
8X b
0.25 [.010]
7
C
A
FOO
T
P
R
INT
8X 0.72
[.028]
NO
T
ES :
1. D
I
MENSIONING
& TOLERANC
I
N
G PER
A
S
M
E Y
1
4.5
M
-1994.
2. CON
T
ROLLING
DIMENSI
O
N:
M
ILLIMETER
3. D
I
ME
N
S
I
O
NS
ARE S
HOWN
I
N MIL
L IME T E RS [IN
C
HE S ].
4. OUT
L
I
NE CONF OR MS
T O
J
E
D
E C
OUT L
I
N
E MS -012
A
A.
5
6
7
DIME NS ION
DOE S
NOT INCL
U DE MOL
D PR
OT R U S IONS .
M
O
L
D
P
R
O
T
RUS
I
O
NS NOT
T
O EX
C
EED 0.15 [.006].
6.46 [.255]
DIME NS ION
DOE S
NOT INCL
U DE MOL
D PR
OT R U S IONS .
M
O
L
D
P
R
O
T
RUS
I
O
NS NOT
T
O EX
C
EED 0.25 [.010].
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A S
U
BSTR
A
TE.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
E
X
AM
P
L
E
: THIS IS AN IR
F
7101 (
M
O
SFE
T
)
D
A
TE
C
ODE (
Y
WW)
P =
DE S IGNAT E S L
E AD-F R E E
PRODUCT (OPT
I
O
N
A
L)
Y =
LA
S
T D
I
G
I
T
O
F
T
HE
Y
E
A
R
XXXX
F7101
WW =
WE E K
INTERNATI
O
N
A
L
RECTIFIER
LOGO
A =
A
S S E MB L Y S IT E
C
ODE
L
O
T CODE
P
A
RT NUMBER
8
IRF7490PbF
SO-8 Tape and Reel
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
Repetitive rating;
pulse width limited by
When mounted on 1 inch square copper board
max. junction temperature.
ꢀ
C
oss
eff. is a fixed capacitance that gives the same charging time
Starting T
J
= 25°C, L = 17mH
R
G
= 25
Ω
, I
AS
= 3.2A.
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
Pulse width
≤
300µs; duty cycle
≤
2%.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
9
