Infineon-Technologies-IRFB3004PBF

Part #Infineon-Technologies-IRFB3004PBF
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Infineon-Technologies-IRFB3004PBF
PD – 97377  
IRFB3004PbF  
IRFS3004PbF  
IRFSL3004PbF  
HEXFET

®

Power MOSFET  
Applications  
D
l
High Efficiency Synchronous Rectification in SMPS  
l
Uninterruptible Power Supply  
l
High Speed Power Switching  
l
Hard Switched and High Frequency Circuits  
V

DSS  

R

DS(on)

typ.  
max.  
40V  
1.4m  
1.75m  
Ω
Ω
G
I

D  

340A  
c
(Silicon Limited)  
Benefits  
I

D  

195A  
S
(Package Limited)  
l
Improved Gate,
 
Avalanche and Dynamic
 
dV/dt  
Ruggedness  
l
Fully Characterized Capacitance and Avalanche  
D
D
D
SOA  
l
Enhanced body diode dV/dt and dI/dt Capability  
l
Lead-Free  
S
S
S
D
D
G
G
G
D

2

Pak  
IRFS3004PbF  
TO-220AB  
IRFB3004PbF  
TO-262  
IRFSL3004PbF  
G
D
S
Gate  
Drain  
Source  
Absolute Maximum Ratings  
Symbol  
I

D

@ T

C

= 25°C  
I

D

@ T

C

= 100°C  
I

D

@ T

C

= 25°C  
I

DM  

Parameter  
Max.  
340
c
 
240
c  
195  
Units  
A
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Silicon Limited)  
Continuous Drain Current, V

GS

@ 10V (Wire Bond Limited)  
Pulsed Drain Current
d  
1310  
P

D

@T

C

= 25°C  
380  
W
Maximum Power Dissipation  
2.5  
Linear Derating Factor  
W/°C  
V
V

GS  

± 20  
Gate-to-Source Voltage  
4.4  
Peak Diode Recovery
f  
dv/dt  
T

J  

V/ns  
-55 to
 
+ 175  
Operating Junction and  
T

STG  

°C  
Storage Temperature Range  
300  
Soldering Temperature, for 10 seconds (1.6mm from case)  
Mounting torque, 6-32 or M3 screw  
10lbf
x
in (1.1N
x
m)  
Avalanche Characteristics  
Single Pulse Avalanche Energy
e  
E

AS (Thermally limited)  

300  
mJ  
A
Avalanche Current
ꢀd  
I

AR  

See Fig. 14, 15, 22a, 22b  
Repetitive Avalanche Energy
d  
E

AR  

mJ  
Thermal Resistance  
Symbol  
Parameter  
Junction-to-Case
kl  
Typ.  
–––  
Max.  
0.40  
–––  
62  
Units  
R

θ
JC  

R

θ
CS  

R

θ
JA  

R

θ
JA  

0.50  
–––  
Case-to-Sink, Flat Greased Surface, TO-220  
°C/W  
Junction-to-Ambient, TO-220  
2
–––  
40  
Junction-to-Ambient (PCB Mount) , D Pak  
j
1
02/26/09  

IRFB/S/SL3004PbF  
Static @ T

J

= 25°C (unless otherwise specified)  
Symbol  
V

(BR)DSS  

∆
V

(BR)DSS

/
∆
T

J  

R

DS(on)  

Parameter  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
Min. Typ. Max.
 
Units  
40 –––
 
–––  
––– 0.037 –––
 
V/°C Reference
 
to 25°C, I

D

= 5mA
d
 
Conditions  
V

GS

= 0V, I

D

= 250µA  
V
–––  
2.0  
1.4 1.75  
V

GS

= 10V, I

D

= 195A
g
 
V

DS

= V

GS

, I

D

= 250µA  

DS

= 40V, V

GS

= 0V  
V

DS

= 40V, V

GS

= 0V, T

J

= 125°C  
m
Ω  
V
V

GS(th)  

–––  
4.0  
20  
I

DSS  

Drain-to-Source Leakage Current  
––– –––  
µA  
V
––– ––– 250  
––– ––– 100  
––– –––
 
-100  
I

GSS  

Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
nA  
V

GS

= 20V  

GS

= -20V  
V
R

G  

–––  
2.2  
–––  
Ω
Dynamic @ T

J

= 25°C (unless otherwise specified)  
Symbol  
gfs  
Parameter  
Forward Transconductance  
Min. Typ. Max.
 
Units  
Conditions  
V

DS

= 10V, I

D

= 195A  
1170 –––
 
–––  
S
Q

g  

Total Gate Charge  
––– 160 240  
nC I

D

= 187A  
V

DS

=20V  
Q

gs  

Q

gd  

Q

sync  

t

d(on)  

t

r  

Gate-to-Source Charge  
Gate-to-Drain (“Miller”) Charge  
Total Gate Charge Sync. (Q

g

– Q

gd

)  
Turn-On Delay Time  
Rise Time  
–––  
–––  
–––  
–––  
40  
68  
92  
23  
–––  
–––  
–––  
–––  
V

GS

= 10V
g  
I

D

= 187A, V

DS

=0V, V

GS

= 10V  
ns  
V

DD

= 26V  
––– 220 –––  
––– 90 –––  
I

D

= 195A  
t

d(off)  

t

f  

Turn-Off Delay Time  
Fall Time  
R

G

= 2.7
Ω  
V

GS

= 10V
g  
––– 130 –––  
––– 9200 –––  
––– 2020 –––  
––– 1340 –––  
––– 2440 –––  
––– 2690 –––  
C

iss  

C

oss  

C

rss  

Input Capacitance  
pF  
V

GS

= 0V  
Output Capacitance  
Reverse Transfer Capacitance  
V

DS

= 25V  
ƒ = 1.0 MHz,
 
See Fig. 5  
C

oss

eff. (ER)  
Effective Output Capacitance (Energy Related)  
V

GS

= 0V, V

DS

= 0V to 32V
i
, See Fig. 11  

GS

= 0V, V

DS

= 0V to 32V
h  
iꢀ  
C

oss

eff. (TR)  
V
Effective Output Capacitance (Time Related)  
h
Diode Characteristics  
Symbol  
Parameter  
Min. Typ. Max.
 
Units  
Conditions  
D
I

S  

Continuous Source Current  
––– –––  
A
MOSFET symbol  
340  
c
(Body Diode)  
Pulsed Source Current  
(Body Diode)
ꢀ
d  
showing the  
integral reverse  
G
I

SM  

––– –––
 
1310  
A
S
p-n junction diode.  
V

SD  

t

rr  

Diode Forward Voltage  
Reverse Recovery Time  
––– –––  
1.3  
–––  
–––  
–––  
–––  
–––  
V
T

J

= 25°C, I

S

= 195A, V

GS

= 0V
g  
T

J

= 25°C  
T

J

= 125°C  
T

J

= 25°C  
T

J

= 125°C  
T

J

= 25°C  
V

R

= 34V,  
–––  
–––  
–––  
–––  
–––  
27  
31  
18  
41  
1.2  
ns  
I

F

= 195A  
di/dt = 100A/µs
g  
Q

rr  

Reverse Recovery Charge  
nC  
A
I

RRM  

t

on  

Reverse Recovery Current  
Forward Turn-On Time  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  

Calculated continuous current based on maximum allowable junction  
„
I

SD

≤
195A, di/dt
≤
930A/µs, V

DD

≤
V

(BR)DSS

, T

J

≤
175°C.  
ꢀ
Pulse width
≤
400µs; duty cycle
≤
2%.  
†
C

oss

eff. (TR) is a fixed capacitance that gives the same charging time  
temperature. Bond wire current limit is 195A. Note that current  
limitations arising from heating of the device leads may occur with  
some lead mounting arrangements.
(Refer to AN-1140)  
‚
Repetitive rating;
 
pulse width limited by max. junction  
temperature.  
as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

‡
C

oss

eff. (ER) is a fixed capacitance that gives the same energy as  
C

oss

while V

DS

is rising from 0 to 80% V

DSS  

ˆ
When mounted on 1″ square PCB (FR-4 or G-10 Material).
 
For recom  
.
.
ƒ
Limited by T

Jmax

, starting T

J

= 25°C, L = 0.016mH  
mended footprint and soldering techniques refer to application note #AN-994.  
‰
R

θ

is measured at T

J

approximately 90°C.  
Š
R

θ
JC

value shown is at time zero.  
R

G

= 25
Ω
, I

AS

= 195A, V

GS

=10V. Part not recommended for use  
above this value .  
2

IRFB/S/SL3004PbF  
10000  
1000  
100  
10000  
1000  
100  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
4.8V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
4.8V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60µs PULSE WIDTH  
≤
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
≤
10  
10  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 1.
 
Typical Output Characteristics  
Fig 2.
 
Typical Output Characteristics  
1000  
100  
10  
2.0  
1.5  
1.0  
0.5  
I
= 195A  
= 10V  
D
V
GS  
T
= 175°C  
J
T
= 25°C  
J
1
V
= 25V  
DS  
≤
60µs PULSE WIDTH  
0.1  
1
2
3
4
5
6
7
8
-60 -40 -20
 
0 20
 
40 60 80
 
100120140160180  
, Junction Temperature (°C)  
T
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 4.
 
Normalized On-Resistance vs. Temperature  
Fig 3.
 
Typical Transfer Characteristics  
100000  
10000  
1000  
14.0  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I =
 
187A  
D
C
C
C
+ C
 
, C  
SHORTED  
iss  
gs  
gd  
ds  
12.0  
= C  
rss  
oss  
gd  
V
V
= 32V  
= 20V  
= C
 
+ C  
DS  
DS  
ds  
gd  
10.0  
8.0  
6.0  
4.0  
2.0  
0.0  
C
iss  
C
oss  
C
rss  
100  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
50  
100  
150  
200  
V
Q ,
 
Total Gate Charge (nC)  
DS  
G
Fig 5.
 
Typical Capacitance vs. Drain-to-Source Voltage  
Fig 6.
 
Typical Gate Charge vs. Gate-to-Source Voltage  
3

IRFB/S/SL3004PbF  
1000  
10000  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R
 
(on)  
DS  
T
= 175°C  
J
100  
10  
1
100µsec  
1msec  
T
= 25°C  
J
10msec  
DC  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
GS  
0.1  
1
0.0  
0.5  
1.0  
1.5  
2.0  
1
10  
, Drain-to-Source Voltage (V)  
100  
V
, Source-to-Drain Voltage (V)  
V
SD  
DS  
Fig 8.
 
Maximum Safe Operating Area  
Fig 7.
 
Typical Source-Drain Diode  
Forward Voltage  
350  
300  
250  
200  
150  
100  
50  
50  
48  
46  
44  
42  
40  
Id = 5mA  
Limited By Package  
0
25  
50  
75  
100  
125  
150  
175  
-60 -40 -20  
0
20 40 60 80
 
100120140160180  
T
, Case Temperature (°C)  
T ,
 
Temperature ( °C )  
C
J
Fig 9.
 
Maximum Drain Current vs.  
Fig 10.
 
Drain-to-Source Breakdown Voltage  
Case Temperature  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
1400  
I
D
TOP  
30A  
54A  
BOTTOM 195A  
1200  
1000  
800  
600  
400  
200  
0
-5  
0
5
10 15 20 25 30 35 40 45  
Drain-to-Source Voltage (V)  
25  
50  
75  
100  
125  
150  
175  
Starting T
 
, Junction Temperature (°C)  
J
V
DS,  
Fig 11.
 
Typical C

OSS

Stored Energy  
Fig 12.
 
Maximum Avalanche Energy vs. DrainCurrent  
4

IRFB/S/SL3004PbF  
1
D = 0.50  
0.1  
0.20  
0.10  
0.05  
R

1  

R

1  

R

2  

R

2  

R

3  

R

3  

R

4  

R

4  

Ri (°C/W)
 
τ
i (sec)  
0.00646 0.000005  
τ
τ

J

τ

J  

C

τ  
0.10020 0.000124  
0.18747 0.001374  
0.10667 0.008465  
τ
τ

1

τ

1  

Ci=
τ
i
/
Ri  
τ
τ

2

τ

2  

3

τ

3  

4

τ

4  

0.02  
0.01  
0.01  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 13.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Duty Cycle = Single Pulse  
Allowed avalanche Current vs avalanche  
∆
pulsewidth, tav, assuming
 
Tj = 150°C and  
0.01  
Tstart =25°C (Single Pulse)  
0.05  
0.10  
Allowed avalanche Current vs avalanche  
∆Τ  
pulsewidth, tav, assuming  
Tstart = 150°C.  
j = 25°C and  
1
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14.
 
Typical Avalanche Current vs.Pulsewidth  
320  
280  
240  
200  
160  
120  
80  
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of T

jmax

. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asT

jmax

is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. P

D (ave)

= Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
TOP  
BOTTOM 1.0%
 
Duty Cycle  
= 195A  
Single Pulse  
I
D
6. I

av

= Allowable avalanche current.  
7.
∆
T
=
Allowable rise in junction temperature, not to exceed T

jmax

(assumed as  
25°C in Figure 14, 15).  
t

av =

Average time in avalanche.  
D = Duty cycle in avalanche =
 
t

av

·f  
Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 13)  
40  
0
P

D (ave)

= 1/2 ( 1.3·BV·I

av

) =
D
T/ Z

thJC  

25  
50  
75  
100  
125  
150  
175  
I

av

= 2
D
T/ [1.3·BV·Z

th

]  
Starting T
 
, Junction Temperature (°C)  
E

AS (AR)

= P

D (ave)

·t

av  

J
Fig 15.
 
Maximum Avalanche Energy vs. Temperature  
5

IRFB/S/SL3004PbF  
4.5  
4.0  
3.5  
3.0  
2.5  
10  
9
I =
 
78A  
F
V
= 34V  
R
T =
 
25°C  
J
8
T =
 
125°C  
J
7
6
I
I
I
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
5
2.0  
1.5  
1.0  
4
3
2
-75 -50 -25  
0
25 50 75
 
100 125 150 175 200  
, Temperature ( °C )  
100  
200  
300  
400  
500  
T
J
di /dt
 
(A/µs)  
F
Fig. 17
– Typical Recovery Current vs. di

f

/dt  
Fig 16.
 
Threshold Voltage vs. Temperature  
350  
11  
I =
 
78A  
I =
 
117A  
F
F
10  
V
= 34V  
V
= 34V  
R
300  
250  
200  
150  
100  
50  
R
9
8
7
6
5
4
3
2
1
T =
 
25°C  
T =
 
25°C  
J
J
T =
 
125°C  
J
T =
 
125°C  
J
100  
200  
300  
400  
500  
100  
200  
300  
400  
500  
di /dt
 
(A/µs)  
F
di /dt
 
(A/µs)  
F
Fig. 18
– Typical Recovery Current vs. di

f

/dt  
Fig. 19
– Typical Stored Charge vs. di

f

/dt  
400  
I =
 
117A  
F
V
350  
300  
250  
200  
150  
100  
50  
= 34V  
R
T =
 
25°C  
J
T =
 
125°C  
J
0
100  
200  
300  
400  
500  
di /dt
 
(A/µs)  
F
Fig. 20
– Typical Stored Charge vs. di

f

/dt  
6

IRFB/S/SL3004PbF  
Driver Gate Drive  
P.W.  
P
.
W.  
D =  
Period  
D.U.T  
Period  
+
*
=10V  
V
GS  
ƒ
Circuit Layout Considerations  
•
Low Stray Inductance  
•
Ground Plane  
•
Low Leakage Inductance  
Current Transformer  
–
D.U.
T
. I
 
W
aveform  
SD  
+
‚
–
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
–
+
D.U.
T
. V
 
W
aveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
V

DD  

Re-Applied  
Voltage  
•
dv/dt controlled by R

G  

R

G  

+
–
Body Diode  
Forward Drop  
•
Driver same type as D.U.T.  
•
I

SD

controlled by Duty Factor “D”  
•
D.U.T. – Device Under Test  
Inductor Current  
I
SD  
Ripple
≤
5%  
*
V

GS

= 5V for Logic Level Devices  
Fig 21.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel  
HEXFET

®

Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
–
I
A
V
2
GS  
0.01
Ω  
t
p
I
AS  
Fig 22b.
 
Unclamped Inductive Waveforms  
Fig 22a.
 
Unclamped Inductive Test Circuit  
R

D  

V

DS  

V
DS  
90%  
V

GS  

D.U.T.  
R

G  

+
V

DD  

–
V

GS  

10%  
Pulse Width
≤ 1
µs  
Duty Factor
≤ 0.1 %  
V
GS  
t
t
r
t
t
f
d(on)  
d(off)  
Fig 23a.
 
Switching Time Test Circuit  
Fig 23b.
 
Switching Time Waveforms  
Id  
Current Regulator  
Same Type as D.U.
T
.  
Vds  
Vgs  
50K
Ω  
.2
µ
F  
12V  
.3
µ
F  
+
V
DS  
D.U.
T
.  
–
Vgs(th)  
V
GS  
3mA  
I
I
D
G
Qgs1  
Qgs2  
Qgd  
Qgodr  
Current Sampling Resistors  
Fig 24a.
 
Gate Charge Test Circuit  
Fig 24b.
 
Gate Charge Waveform  
7

IRFB/S/SL3004PbF  
TO-220AB Package Outline  
Dimensions are shown in millimeters (inches)  
TO-220AB Part Marking Information  
(;$03/(ꢇ
 
7+,6ꢀ,6ꢀ$1ꢀ,5)ꢃꢁꢃꢁꢀ
 
/27ꢀ&2′(ꢀꢃꢅꢆꢄ
 
3$57ꢀ180%(5
 
,17(51$7,21$/
 
5(&7,),(5
 
/2*2
 
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TO-220AB packages are not recommended for Surface Mount Application.  
8

IRFB/S/SL3004PbF  
TO-262 Package Outline  
Dimensions are shown in millimeters (inches)  
TO-262 Part Marking Information  
25  
9

IRFB/S/SL3004PbF  
D

2

Pak (TO-263AB) Package Outline  
Dimensions are shown in millimeters (inches)  
D

2

Pak (TO-263AB) Part Marking Information  
25  
10  

IRFB/S/SL3004PbF  
D

2

Pak (TO-263AB)
T
a
pe & Reel Information  
Dimensions are shown in millimeters (inches)  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
1.50 (.059)  
4.10 (.161)  
3.90 (.153)  
0.368 (.0145)  
0.342 (.0135)  
FEED DIRECTION  
1.85 (.073)  
11.60 (.457)  
11.40 (.449)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
TRL  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS
 
TO EIA-418.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
3. DIMENSION
 
MEASURED @ HUB.  
4. INCLUDES
 
FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
11