Infineon-Technologies-IRFB7734PBF
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Strong
IR
FET™
IRFB7734PbF
IRFS7734PbF
IRFSL7734PbF
HEXFET
®
Power MOSFET
Application
Brushed motor drive applications
BLDC motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC inverters
V
DSS
R
DS(on)
typ.
max
75V
2.8m
3.5m
183A
I
D
D
D
S
Benefits
S
S
D
G
Improved gate,
avalanche and dynamic dV/dt ruggedness
Fully characterized capacitance and avalanche SOA
Enhanced body diode dV/dt and dI/dt capability
Lead-free, RoHS compliant
D
G
G
G
D
S
Gate
Drain
Source
Base part number
Package Type
Standard Pack
Form
Orderable Part Number
Quantity
50
IRFB7734PbF
IRFSL7734PbF
IRFS7734PbF
TO-220
TO-262
D2-Pak
Tube
IRFB7734PbF
IRFSL7734PbF
IRFS7734PbF
Tube
50
Tube
50
Tape and Reel Left
800
IRFS7734TRLPbF
200
160
120
80
10
8
I
= 100A
D
T
= 125°C
= 25°C
J
6
4
40
T
J
0
2
25
50
75
100
125
150
175
4
6
8
10 12 14 16 18 20
T
, Case Temperature (°C)
C
V
Gate -to -Source Voltage
(V)
GS,
Fig 2.
Maximum Drain Current vs. Case Temperature
Fig 1.
Typical On-Resistance vs. Gate Voltage
1
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
Absolute Maximum Rating
Symbol
Parameter
Max.
183
Units
A
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V
130
I
DM
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
650
290
2.0
P
D
@T
C
= 25°C
W
W/°C
V
V
GS
Gate-to-Source Voltage
± 20
T
J
T
STG
Operating Junction and
Storage Temperature Range
-55 to
+ 175
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics
Symbol
E
AS (Thermally limited)
E
AS (Thermally limited)
I
AR
Max.
350
670
Units
mJ
Parameter
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
A
mJ
See Fig 15, 16, 23a, 23b
E
AR
Repetitive Avalanche Energy
Thermal Resistance
Symbol
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.51
–––
62
Units
Junction-to-Case
R
JC
R
CS
R
JA
R
JA
Case-to-Sink, Flat Greased Surface (TO-220)
Junction-to-Ambient (TO-220)
°C/W
Junction-to-Ambient (PCB
Mount) (D
2
Pak)
40
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ.
Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
75
––– –––
V
V
GS
= 0V, I
D
= 250µA
–––
–––
–––
2.1 –––
––– –––
––– ––– 150
––– ––– 100
––– –––
-100
50
2.8
3.5
––– mV/°C
Reference to 25°C, I
D
= 1mA
V
(BR)DSS
/
T
J
R
DS(on)
3.5
–––
3.7
1.0
V
GS
= 10V, I
D
= 100A
m
V
V
GS
= 6.0V, I
D
= 50A
V
DS
= V
GS
, I
D
= 250µA
V
GS(th)
I
DSS
Gate Threshold Voltage
V
V
V
V
DS
=75 V, V
GS
= 0V
DS
=75V,V
GS
= 0V,T
J
=125°C
GS
= 20V
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
I
GSS
R
G
nA
GS
= -20V
–––
2.0
–––
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 70µH, R
G
= 50
, I
AS
= 100A, V
GS
=10V.
I
SD
100A, di/dt
950A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
400µs; duty cycle
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
R
is measured at T
J
approximately 90°C.
Limited by T
Jmax
, starting T
J
= 25°C, L = 1mH, R
G
= 50
, I
AS
= 37A, V
GS
=10V.
When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
2
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
Dynamic Electrical
Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min.
250
–––
–––
–––
–––
–––
–––
Typ. Max.
Units
Conditions
V
DS
= 10V, I
D
=100A
I
D
= 100A
–––
180
45
–––
270
–––
–––
–––
–––
–––
S
Q
g
Q
gs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
V
DS
= 38V
nC
Q
gd
55
V
GS
= 10V
Q
sync
t
d(on)
t
r
125
20
V
DD
= 38V
I
D
= 100A
Rise Time
123
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
–––
–––
124
100
–––
–––
R
G
= 2.7
V
GS
= 10V
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 10150 –––
V
GS
= 0V
–––
–––
816
500
–––
–––
V
DS
= 25V
ƒ = 1.0MHz
pF
Effective Output Capacitance
(Energy Related)
C
oss eff.(ER)
C
oss eff.(TR)
–––
–––
707
916
–––
–––
V
GS
= 0V, VDS = 0V to 60V
V
GS
= 0V, VDS = 0V to 60V
Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min.
Typ. Max.
Units
Conditions
MOSFET symbol
D
Continuous Source Current
(Body Diode)
I
S
–––
–––
183
showing the
A
G
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
I
SM
–––
–––
–––
–––
650
1.2
S
V
SD
Diode Forward Voltage
V
T
J
= 25°C,I
S
= 100A,V
GS
= 0V
dv/dt
Peak Diode Recovery dv/dt
–––
–––
–––
–––
–––
–––
5.1
47
51
76
96
2.8
––– V/ns
T
J
= 175°C,I
S
=100A,V
DS
= 64V
–––
–––
–––
–––
–––
T
J
= 25°C
V
DD
= 64V
I
F
= 100A,
t
rr
Reverse Recovery Time
ns
T
J
= 125°C
T
J
= 25°C
di/dt = 100A/µs
Q
rr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
T
J
= 125°C
T
J
= 25°C
I
RRM
3
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
Tj = 25°C
60µs PULSE WIDTH
Tj = 175°C
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4.
Typical Output Characteristics
Fig 3.
Typical Output Characteristics
1000
100
10
2.4
2.0
1.6
1.2
0.8
0.4
I
= 100A
D
V
= 10V
GS
T =
175°C
J
T =
25°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
0.1
2.0
3.0
4.0
5.0
6.0
7.0
-60 -40 -20
0 20
40 60 80
100120140160180
V
, Gate-to-Source Voltage (V)
T ,
Junction Temperature (°C)
GS
J
Fig 6.
Normalized On-Resistance vs. Temperature
Fig 5.
Typical Transfer Characteristics
100000
10000
1000
14.0
V
= 0V,
f = 1 MHZ
GS
I =
100A
D
C
C
C
= C
+ C
, C
SHORTED
iss
gs
gd
ds
12.0
= C
rss
oss
gd
V
V
V
= 60V
DS
= 38V
DS
= 15V
DS
= C
+ C
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
oss
C
rss
100
1
10
100
0
50
100
150
200
250
V
, Drain-to-Source Voltage (V)
DS
Q ,
Total Gate Charge (nC)
G
Fig 8.
Typical Gate Charge vs.
Fig 7.
Typical Capacitance vs. Drain-to-Source Voltage
Gate-to-Source Voltage
4
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
1000
100
10
100µsec
1msec
100
10
1
T =
175°C
J
OPERATION
IN THIS
AREA
LIMITED BY
R
(on)
DS
10msec
T =
25°C
J
DC
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
1.0
0.1
0.0
0.4
0.8
1.2
1.6
2.0
0.1
1
10
V
, Source-to-Drain Voltage (V)
SD
V
, Drain-to-Source Voltage (V)
DS
Fig 10.
Maximum Safe Operating Area
Fig 9.
Typical Source-Drain Diode Forward Voltage
2.0
95
Id = 1.0mA
1.5
1.0
0.5
0.0
90
85
80
75
-10
0
10 20 30 40 50 60 70 80
-60 -40 -20
0
20 40 60 80
100120140160180
, Temperature ( °C )
T
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11.
Drain-to-Source Breakdown Voltage
Fig 12.
Typical C
oss
Stored Energy
3.6
Vgs = 5.5V
Vgs = 6.0V
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
3.4
3.2
3.0
2.8
0
20 40 60 80
100 120 140 160 180 200
, Drain Current (A)
I
D
Fig 13.
Typical On-Resistance vs. Drain Current
5
November 5, 2014
IRFB/S/SL7734PbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 14.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj = 150°C and
Tstart = 25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
Fig 15.
Avalanche Current vs. Pulse Width
400
300
200
100
0
TOP
BOTTOM 1.0%
Duty Cycle
= 100A
Single Pulse
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. I
av
= Allowable avalanche current.
7.
T = Allowable rise in junction temperature, not to exceed T
jmax
(assumed as 25°C in Figure 15, 16).
t
av
= Average time in avalanche.
D = Duty cycle in avalanche =
tav ·f
25
50
75
100
125
150
175
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
Starting T
, Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·I
av
) =
T/ Z
thJC
I
av
= 2
T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)· av
t
Fig 16.
Maximum Avalanche Energy vs. Temperature
6
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
15
10
5
I =
60A
F
V
= 64V
R
T =
25°C
J
T =
125°C
J
I
= 150µA
= 250µA
= 1.0mA
= 1.0A
D
I
D
I
D
I
D
0
-75 -50 -25
0
25 50 75
100 125 150 175
0
200
400
600
800
1000
T ,
Temperature ( °C )
di /dt
(A/µs)
J
F
Fig 17.
Threshold Voltage vs. Temperature
Fig 18.
Typical Recovery Current vs. dif/dt
400
20
I =
60A
I =
100A
F
F
V
= 64V
V
= 64V
R
R
T =
25°C
J
T =
125°C
J
T =
25°C
J
T =
125°C
J
300
200
100
0
15
10
5
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt
(A/µs)
di /dt
(A/µs)
F
F
Fig 19.
Typical Recovery Current vs. dif/dt
Fig 20.
Typical Stored Charge vs. dif/dt
400
I =
100A
F
V
= 64V
R
T =
25°C
J
T =
125°C
J
300
200
100
0
0
200
400
600
800
1000
di /dt
(A/µs)
F
Fig 21.
Typical Stored Charge vs. dif/dt
7
November 5, 2014
IRFB/S/SL7734PbF
Fig 22.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET
®
Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
–
I
A
20V
I
0.01
t
p
AS
Fig 23a.
Unclamped Inductive Test Circuit
Fig 23b.
Unclamped Inductive Waveforms
Fig 24a.
Switching Time Test Circuit
Fig 24b.
Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b.
Gate Charge Waveform
Fig 25a.
Gate Charge Test Circuit
8
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
TO-220AB Package Outline
(Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
E X A M
P L E :
T H
I
S IS A
N IR
F 1 0 1 0
L O
C O D E
1 7 8 9
A S S E M
B L E D
IN T
H E
A S S E M
B L Y
L IN E
“C ”
P A R T
N U M B E R
D A T E
C O D E
T
IN T
E R N A T IO N A L
R E C T
I
F IE R
L O
G O
O
N
W
W
1 9 ,
2 0 0 0
Y E A R
E E K
1 9
L
I
N E
0
=
2 0 0 0
N o t
e :
“
P “
in a
s s e m
b ly
lin e
p o s it
io n
in d ic a t
e s
“L e a d
F r
e e ”
A S S E M
B L Y
W
–
L O
T C
O D E
C
TO-220AB packages are not recommended for Surface Mount Application
.
9
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
TO-262 Package Outline
(Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS
IS AN IRL3103L
LOT COD
E
1
789
PART NUMBER
INTERNATIONAL
ASSEMBLED ON W
W
1
9, 1997
RECTIFIER
IN
T
HE ASSEMBLY LINE “C”
LOGO
DATE CODE
YEA
R
7 =
1
997
WEEK 19
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P =
D
ESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 =
1997
ASSEMBLY
LOT CODE
WEEK 19
A =
A
SSEMBLY SITE CODE
10
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
D
2
Pak (TO-263AB) Package Outline
(Dimensions are shown in millimeters (inches))
D
2
Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE “L”
F530S
DATE CODE
YEAR 0 =
2000
WEEK 02
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P =
DESIGNATES LEAD – FREE
PRODUCT (OPTIONAL)
ASSEMBLY
LOT CODE
YEAR 0 =
2000
WEEK 02
A =
ASSEMBLY SITE CODE
11
© 2014 International Rectifier
November 5, 2014
IRFB/S/SL7734PbF
D
2
Pak (TO-263AB) Tape & Reel Information
(Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS
TO EIA-418.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
MEASURED @ HUB.
4. INCLUDES
FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Qualification Information
†
Industrial
(per JEDEC JESD47F)
††
Qualification Level
TO-220
D
2
Pak
N/A
MSL1
N/A
Moisture Sensitivity Level
RoHS Compliant
TO-262
Yes
†
Qualification standards can be found at International Rectifier’s web site:
http://www.irf.com/product-info/reliability/
†† Applicable
version of JEDEC standard at the time of product release.
Revision History
Date
Comments
Updated E
AS (L =1mH)
= 670mJ
on page 2
Updated note 8
“Limited by T
Jmax
, starting T
J
= 25°C, L = 1mH, R
G
= 50
, I
AS
= 37A, V
GS
=10V”. on
page 2
Updated package outline on page 9,10,11.
11/5/2014
IR WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245, USA
12
© 2014 International Rectifier
November 5, 2014
