Infineon-Technologies-IRFH6200TRPBF
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IRFH6200TRPbF
HEXFET
®
Power MOSFET
V
DS
20
V
R
DS(on) max
(@V
GS
= 4.5V)
(@V
GS
= 2.5V)
0.99
m
Ω
1.50
155
1.3
Q
g (typical)
R
G (typical)
nC
Ω
I
D
100
A
(@T
mb
= 25°C)
PQFN 5X6 mm
Applications
•
Charge and discharge switch for battery application
•
Load switch for 12V (typical) bus
•
Hot-Swap Switch
Features
Benefits
Low R
DSon
(
≤
0.99m
Ω)
Lower Conduction Losses
Enable better thermal dissipation
Increased Power Density
Multi-Vendor Compatibility
Easier Manufacturing
Low Thermal Resistance to PCB (
≤
0.8°C/W)
Low Profile (
≤
0.9 mm)
results in
Industry-Standard Pinout
⇒
Compatible with Existing Surface Mount Techniques
RoHS Compliant, Halogen-Free
Environmentally Friendlier
Standard Pack
Form
Tape and Reel
Tape and Reel
Base Part Number
Package Type
Orderable part number
Note
Quantity
4000
400
PQFN 5mm x 6mm
PQFN 5mm x 6mm
I
R
FH6200TRPbF
I
R
FH6200TR2PbF
I
R
FH6200PbF
EOL Notice #259
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 4.5V
Continuous Drain Current, V
GS
@ 4.5V
Continuous Drain Current, V
GS
@ 4.5V
Continuous Drain Current, V
GS
@ 4.5V
Pulsed Drain Current
Max.
20
±12
49
Units
V
DS
V
GS
V
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
D
@ T
mb
= 25°C
I
D
@ T
mb
= 100°C
I
DM
40
100
100
400
3.6
156
A
Power Dissipation
Power Dissipation
P
D
@T
A
= 25°C
P
D
@T
mb
= 25°C
W
Linear Derating Factor
Operating Junction and
Storage Temperature Range
0.029
-55 to
+ 150
W/°C
°C
T
J
T
S
T
G
Notes
through
are on page 9
1
May 19, 2015
IRFH6200TRPbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max.
Units
Conditions
BV
D
S
S
ΔΒ
Drain-to-Source Breakdown Voltage
20
–––
–––
V
V
GS
= 0V, I
D
= 250
μ
A
Δ
V
DSS
/ T
J
Breakdown Voltage Temp. Coefficient
–––
–––
–––
–––
0.5
6.4
––– mV/°C
Reference to 25°C, I
D
= 1mA
0.75
0.80
1.10
0.8
0.95
0.99
1.50
1.1
V
V
GS
= 10V, I
D
= 50A
GS
= 4.5V, I
D
= 50A
R
DS(on)
Static Drain-to-Source On-Resistance
m
Ω
V
GS
= 2.5V, I
D
= 50A
V
GS(th)
Gate Threshold Voltage
V
V
DS
= V
GS
, I
D
= 150
μ
A
Δ
V
GS(th)
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
260
–––
–––
–––
–––
-6.6
–––
–––
–––
–––
–––
155
22
––– mV/°C
I
DSS
1.0
V
V
V
V
DS
= 16V, V
GS
= 0V
DS
= 16V, V
GS
= 0V, T
J
= 125°C
GS
= 12V
μ
A
150
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
100
nA
-100
GS
= -12V
g
f
s
Q
g
–––
230
–––
–––
S
V
DS
= 10V, I
D
= 50A
V
DS
= 10V
nC
Q
gs
Q
gd
R
G
Gate-to-Source Charge
Gate-to-Drain Charge
V
GS
= 4.5V
53
I
D
= 50A (See Fig.17 & 18)
Gate Resistance
1.3
Ω
–––
–––
–––
–––
–––
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
14
74
V
DD
= 10V, V
GS
= 4.5V
I
D
= 50A
ns
Ω
Turn-Off Delay Time
Fall Time
140
160
R
G
=1.0
See Fig.15
V
GS
= 0V
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 10890 –––
pF
–––
–––
2890
2180
–––
–––
V
DS
= 10V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
Typ.
–––
–––
Max.
Units
mJ
Single Pulse Avalanche Energy
Avalanche Current
E
AS
I
AR
780
30
A
Diode Characteristics
Parameter
Continuous Source Current
Min. Typ. Max.
Units
Conditions
MOSFET symbol
D
S
I
S
–––
–––
100
(Body Diode)
showing the
A
G
I
SM
Pulsed Source Current
integral reverse
–––
–––
400
(Body Diode)
p-n junction diode.
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
–––
–––
–––
–––
86
1.2
130
525
V
T
T
= 25°C, I
= 50A, V
= 0V
GS
J
J
S
ns
= 25°C, I
= 50A, V
DD
= 10V
F
Q
rr
Reverse Recovery Charge
350
nC di/dt
= 260A/
μ
s
Thermal Resistance
Parameter
Junction-to-Mounting Base
Junction-to-Case
Typ.
Max.
0.8
15
Units
R
θ
0.5
–––
–––
–––
J
C
-mb
R
θ
J
C
(Top)
°C/W
Junction-to-Ambient
Junction-to-Ambient
R
θ
35
JA
R
θ
J
A
(<10s)
22
2
May 19, 2015
IRFH6200TRPbF
1000
100
10
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
4.5V
3.5V
2.5V
2.0V
1.8V
1.5V
1.3V
4.5V
3.5V
2.5V
2.0V
1.8V
1.5V
1.3V
BOTTOM
BOTTOM
1.3V
1.3V
60
μ
s PULSE WIDTH
≤
60
μ
s PULSE WIDTH
≤
Tj = 150°C
Tj = 25°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2.
Typical Output Characteristics
Fig 1.
Typical Output Characteristics
1000
1.6
1.4
1.2
1.0
0.8
0.6
I
= 50A
D
V
= 4.5V
GS
100
T
= 175°C
J
T
V
= 25°C
= 10V
J
10
DS
≤
60
μ
s PULSE WIDTH
1.0
0.5
1.0
1.5
2.0
2.5
-60 -40 -20
0
20 40 60 80
100 12
0
1
40 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 4.
Normalized On-Resistance vs. Temperature
Fig 3.
Typical Transfer Characteristics
14.0
100000
V
= 0V,
= C
f = 1 MHZ
GS
I =
50A
D
C
C
C
+ C
, C
SHORTED
ds
iss
gs
gd
12.0
= C
rss
oss
gd
= C
+ C
V
V
= 16V
= 10V
DS
DS
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
10000
C
oss
C
rss
1000
0
100
200
300
400
1
10
, Drain-to-Source Voltage (V)
100
Q ,
Total Gate Charge (nC)
V
DS
G
Fig 5.
Typical Capacitance vs.Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.Gate-to-Source Voltage
3
May 19, 2015
IRFH6200TRPbF
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
10msec
T
= 150°C
J
100
μ
sec
1msec
T
= 25°C
J
DC
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
1.0
1
0.1
1
10
100
0.0
0.2
V
0.4
0.6
0.8
1.0
1.2
V
, Drain-to-Source Voltage (V)
, Source-to-Drain Voltage (V)
DS
SD
Fig 7.
Typical Source-Drain Diode Forward Voltage
Fig 8.
Maximum Safe Operating Area
400
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Limited By Package
300
200
100
0
I
I
I
I
= 150
μ
A
= 500
μ
A
= 1.0mA
= 1.0A
D
D
D
D
25
50
T
75
100
125
150
-75 -50 -25
0
25 50 75
100 125 150
, Case Temperature (°C)
C
T ,
Temperature ( °C )
J
Fig 9.
Maximum Drain Current vs.
Fig 10.
Threshold Voltage vs. Temperature
Cas
e
T
emperature
10
1
D = 0.50
0.20
0.1
0.01
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Mounting Base
4
May 19, 2015
IRFH6200TRPbF
4
3
2
1
0
3500
3000
2500
2000
1500
1000
500
I
D
I
= 50A
D
TOP
19A
21A
BOTTOM 30A
T
= 125°C
J
T
= 25°C
6
J
0
0
2
4
8
10
12
25
50
75
100
125
150
Starting T
, Junction Temperature (°C)
J
V
Gate -to -Source Voltage
(V)
GS,
Fig 13.
Maximum Avalanche Energy vs. Drain Current
Fig 12.
On-Resistance vs. Gate Voltage
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Δ
Tj = 125°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Δ
Τ
j = 25°C and
Tstart = 125°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.
Pulsewidth
5
May 19, 2015
IRFH6200TRPbF
Driver Gate Drive
P.W.
P
.
W.
D =
D.U.T
Period
Period
+
–
*
=10V
V
GS
Circui
t
L
ayou
t
C
onsiderations
•
Lo
w
S
tra
y
I
nductance
•
Ground Plane
•
Lo
w
L
eakag
e
I
nductance
Current Transformer
D.U.
T
. I
W
aveform
SD
+
–
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
–
+
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
V
DD
Re-Applied
Voltage
•
dv/d
t
c
ontrolle
d
b
y
R
G
R
G
+
–
Body Diode
Forward Drop
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 15.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
–
I
A
AS
20V
I
AS
Ω
0.01
t
p
Fig 16b.
Unclamped Inductive Waveforms
Fig 16a.
Unclamped Inductive Test Circuit
R
D
V
DS
90%
V
DS
V
GS
D.U.T.
R
G
+
V
DD
–
10%
V
GS
V
GS
Puls
e
W
idth
≤ 1
µs
Dut
y
F
acto
r
≤ 0.1
t
d(on)
t
d(off)
t
r
t
f
Fig 17b.
Switching Time Waveforms
Fig 17a.
Switching Time Test Circuit
Id
Vds
Vgs
L
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 18a.
Gate Charge Test Circuit
Fig 18b.
Gate Charge Waveform
6
IRFH6200TRPbF
PQFN 5×6 Outline “B” Package Details
PQFN 5×6 Outline “G” Package Details
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:
7
May 19, 2015
IRFH6200TRPbF
PQFN 5×6 Part Marking
INTERNATIONAL
RECTIFIER LOGO
DATE CODE
PART NUMBER
XXXX
XYWWX
XXXXX
(“4 or 5 digits”)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
MARKING CODE
(Per Marking Spec)
PIN 1
IDENTIFIER
LOT CODE
(Eng Mode – Min last 4 digits of EATI#)
(Prod Mode – 4 digits of SPN code)
PQFN 5×6 Tape and Reel
REEL DIMENSIONS
TAPE DIMENSIONS
CODE
Ao
D
E
S
C
R
IPTI
O
N
Dim
e
ns
i
o
n des
i
gn to accommodate the component width
Dim
e
n
s
i
o
n des
i
gn to accommodate the component lenght
Dimen
s
i
o
n des
i
gn to accommodate the component th
i
c
k
n
e
s s
Ove
r
a
l
l
w
i
d
th of the ca
r
ri
e
r tape
Bo
Ko
W
P
1
Pi
t
ch between s ucces s
i
ve
c
av
i
t
y cente
r
s
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
N
o
te: A
l
l
d
i
m
ens
i
on
a
r
e nominal
P
a
ckage
T
y
pe
R
e
el
Di
a
meter
(Inch)
QT Y
R
e
el
Width
W1
Ao
(mm)
Bo
(mm)
Ko
(mm)
P1
(mm)
W
(mm)
Pin 1
Qu
a
d
r
a
nt
(
m
m)
5 X 6 PQ
F
N
13
4000
12.4
6.300
5.300
1.20
8.00
12
Q1
8
May 19, 2015
IRFH6200TRPbF
Qualification information
†
I
n
du
s
t
r
i
a
l
Qualification level
(
p
er
J
E
D
E
C JES
D
47F
††
g
u
i
d
e
l
i
n
es )
MS L 1
Moisture Sensitivity Level
RoHS
c
ompliant
PQFN 5mm x 6mm
(
p
er
J
E
D
E
C J-ST
D
-020D
††
)
Yes
Qualification standards can be found at International Rectifier’s web site
Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating;
pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 1.7mH, R
G
= 25
Ω
, I
AS
= 30A.
Pulse width
≤
400
μ
s; duty cycle
≤
2%.
R
is measured at
T
J
of approximately 90°C.
θ
ꢀ
When mounted on 1 inch square
2 oz copper pad on 1.5×1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production test capability.
Revision History
Date
Comments
•
Ω
Ω
Improve the Rdson at 4.5V max from 1.2m
to 0.99m
.
1/28/2013
•
•
•
•
•
•
•
Added Rdson 10V (Absolute Maximum Rating table still based on Rdson max at 4.5V gate drive voltage) on page 1 & 2.
Formatted the data sheet using the IR Corporate template.
Updated ordering information to reflect the End-Of-Life (EOL) of the mini-reel option (EOL notice #259)
Updated package outline for “option B” and
added package outline for “option G” on page 7
Updated tape and reel on page 8.
12/02/2014
4/28/2015
5/19/2015
Updated package outline for “option G” on page 7.
Updated “IFX logo” on page 1 and page 9.
IR WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245, USA
9
May 19, 2015
