Infineon-Technologies-IRFHM8363TRPBF
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IRFHM8363PbF
HEXFET
®
Power MOSFET
V
DS
30
V
V
V
gs max
± 20
R
DS(on) max
(@V
GS
= 10V)
G
S
14.9
G
m
Ω
S
D
D
(@V
GS
= 4.5V)
20.4
6.7
D
D
D
D
Q
g typ
nC
A
PQFN Dual 3.3X3.3 mm
I
D
10
(@T
c(Bottom)
= 25°C)
Applications
•
Power Stage for high frequency buck converters
•
Battery Protection charge and discharge switches
Feature
s
a
n
d
B
enefits
Features
Benefits
Low Thermal Resistance to PCB (< 6.7°C/W)
Low Profile (<1.0mm)
Enable better thermal dissipation
results in
Increased Power Density
Industry-Standard Pinout
Compatible with Existing Surface Mount Techniques
Multi-Vendor Compatibility
Easier Manufacturing
⇒
RoHS Compliant Containing no Lead, no Bromide and no Halogen
MSL1, Industrial Qualification
Environmentally Friendlier
Increased Reliability
Orderable part number
Package Type
Standard Pack
Note
Form
Tape and Reel
Tape and Reel
Quantity
4000
IRFHM8363TRPBF
IRFHM8363TR2PBF
PQFN Dual 3.3mm x 3.3mm
PQFN Dual 3.3mm x 3.3mm
400
EOL notice #259
Absolute Maximum Ratings
Parameter
Max.
30
Units
V
DS
Drain-to-Source Voltage
Gate-to-Source Voltage
V
V
± 20
11
GS
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
I
I
I
I
I
I
@ T
A
= 25°C
D
D
D
D
D
@ T
A
= 70°C
8.6
29
@ T
C(Bottom)
= 25°C
@ T
C(Bottom)
= 100°C
@ T
C
= 25°C
A
18
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
10
116
2.7
19
DM
P
P
@T
A
= 25°C
Power Dissipation
Power Dissipation
D
D
W
@T
C(Botto
m
)
= 25°C
Linear Derating Factor
Operating Junction and
0.02
W/°C
°C
T
T
-55 to
+ 150
J
Storage Temperature Range
STG
Notes
through
are on page 9
1
February 6, 2014
IRFHM8363PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max.
Units
Conditions
V
GS
= 0V, I
D
= 250µA
BV
DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
30
–––
–––
V
∆Β
V
DSS
/
∆
T
J
R
DS(on)
––– 0.022
–––
V/°C Reference
to 25°C, I
D
= 1.0mA
–––
–––
1.35
–––
–––
–––
–––
–––
20
12.2
16.3
1.8
-6.3
–––
–––
–––
–––
–––
15
14.9
20.4
2.35
V
GS
= 10V, I
D
= 10A
m
Ω
V
GS
= 4.5V, I
D
= 8.0A
V
GS(th)
Gate Threshold Voltage
V
V
DS
= V
GS
, I
D
= 25µA
∆
V
GS(th)
I
DSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
1.0
µA
V
DS
= 24V, V
GS
= 0V
150
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
100
nA
-100
V
GS
= -20V
gfs
Q
g
Q
g
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
V
DS
= 10V, I
D
= 10A
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
nC V
GS
= 10V, V
DS
= 15V, I
D
= 10A
Total Gate Charge
6.7
2.1
1.0
2.0
1.6
3.0
7.6
1.6
14
Q
gs1
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
V
DS
= 15V
Q
gs2
Q
gd
V
GS
= 4.5V
nC
I
D
= 10A
Q
godr
Q
sw
Q
oss
R
G
nC V
DS
= 24V, V
GS
= 0V
Ω
Gate Resistance
–––
–––
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
V
DD
= 15V, V
GS
= 4.5V
Rise Time
94
–––
–––
–––
–––
–––
–––
I
D
= 10A
ns
Ω
R
G
=1.8
Turn-Off Delay Time
12
Fall Time
33
C
iss
C
oss
C
rss
Input Capacitance
V
GS
= 0V
1165
260
100
pF
Output Capacitance
V
DS
= 10V
ƒ = 1.0MHz
Reverse Transfer Capacitance
Avalanche Characteristics
Parameter
Typ.
–––
–––
Max.
Units
mJ
Single Pulse Avalanche Energy
E
AS
I
AR
29
10
Avalanche Current
A
Diode Characteristics
Parameter
Min. Typ. Max.
Units
Conditions
D
I
S
Continuous Source Current
MOSFET symbol
–––
–––
10
showing the
integral reverse
(Body Diode)
Pulsed Source Current
A
G
I
SM
–––
–––
116
S
p-n junction diode.
(Body Diode)
V
SD
t
rr
T =
25°C, I
= 10A, V
= 0V
Diode Forward Voltage
–––
–––
–––
–––
17
1.3
26
36
V
J
S
GS
T =
25°C, I
= 10A, V
DD
= 15V
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns
nC
J
F
Q
rr
t
on
di/dt = 280A/µs
24
Time is dominated by parasitic Inductance
Thermal Resistance
Parameter
Typ.
–––
–––
–––
–––
Max.
6.7
72
Units
Junction-to-Case
R
θ
JC
(Bottom)
R
θ
JC
(Top)
R
θ
JA
Junction-to-Case
°C/W
Junction-to-Ambient
Junction-to-Ambient
47
R
θ
JA
(<10s)
32
2
February 6, 2014
IRFHM8363PbF
1000
100
10
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
7.0V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
7.0V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
BOTTOM
BOTTOM
2.5V
1
1
2.5V
60µs PULSE WIDTH
Tj = 150°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
1.6
1.4
1.2
1.0
0.8
0.6
I
= 10A
D
V
= 10V
GS
100
10
T
= 150°C
J
T
= 25°C
J
V
= 15V
DS
≤
60µs PULSE WIDTH
1.0
1
2
3
4
5
6
7
-60 -40 -20
0
20 40 60 80
100 12
0
1
40 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 4.
Normalized On-Resistance vs. Temperature
Fig 3.
Typical Transfer Characteristics
10000
1000
100
14.0
V
= 0V,
= C
f = 1 MHZ
GS
I =
10A
D
C
C
C
+ C
, C
SHORTED
ds
iss
gs
gd
12.0
= C
rss
oss
gd
= C
+ C
V
V
V
= 24V
= 15V
= 6.0V
DS
DS
DS
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
C
iss
oss
C
rss
10
1
10
, Drain-to-Source Voltage (V)
100
0
2
4
6
8
10 12 14 16 18 20
V
Q , Total
Gate Charge (nC)
DS
G
Fig 5.
Typical Capacitance vs.Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.Gate-to-Source Voltage
3
February 6, 2014
IRFHM8363PbF
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100µsec
1msec
10msec
T
= 150°C
J
Limited by source
bonding technology
T
= 25°C
J
1
1
DC
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
0.1
0.1
0
1
10
100
0.0
0.5
1.0
1.5
2.0
2.5
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 7.
Typical Source-Drain Diode Forward Voltage
Fig 8.
Maximum Safe Operating Area
30
2.8
Limited by source
bonding technology
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
25
20
15
10
5
I
I
I
I
= 25µA
= 250µA
= 1.0mA
= 1.0A
D
D
D
D
0
25
50
T
75
100
125
150
-75 -50 -25
0
25 50 75
100 125 150
, Case Temperature (°C)
T ,
Temperature ( °C )
C
J
Fig 9.
Maximum Drain Current vs.
Fig 10.
Threshold Voltage vs. Temperature
Cas
e
(
Bottom
)
T
emperature
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
0.1
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
4
February 6, 2014
IRFHM8363PbF
35
30
25
20
15
10
120
100
80
60
40
20
0
I
I
= 10A
D
D
TOP
2.3A
4.7A
BOTTOM 10A
T
= 125°C
J
T
V
= 25°C
5
J
0
10
15
20
25
50
75
100
125
150
Starting T
, Junction Temperature (°C)
J
Gate -to -Source Voltage
(V)
GS,
Fig 13.
Maximum Avalanche Energy vs. Drain Current
Fig 12.
On-Resistance vs. Gate Voltage
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
–
I
A
I
AS
20V
Ω
0.01
t
p
Fig 14b.
Unclamped Inductive Waveforms
Fig 14a.
Unclamped Inductive Test Circuit
R
D
V
DS
V
DS
90%
V
GS
D.U.T.
R
G
+
V
DD
–
10%
V
GS
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1
t
d(on)
t
d(off)
t
r
t
f
Fig 15a.
Switching Time Test Circuit
Fig 15b.
Switching Time Waveforms
5
February 6, 2014
IRFHM8363PbF
Driver Gate Drive
P.W.
P
.
W.
D =
D.U.T
Period
Period
+
*
=10V
V
GS
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
–
D.U.
T
. I
W
aveform
SD
+
–
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
–
+
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
V
DD
Re-Applied
Voltage
•
dv/dt controlled by R
G
R
G
+
–
Body Diode
Forward Drop
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 16.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 18.
Gate Charge Waveform
Fig 17.
Gate Charge Test Circuit
6
February 6, 2014
IRFHM8363PbF
PQFN Dual 3.3 x 3.3 Package Details
For more information on board mounting, including footprint and stencil recommendation, please refer to
For more information on package inspection techniques, please refer to application note AN-1154:
PQFN Dual 3.3 x 3.3 Part Marking
7
February 6, 2014
IRFHM8363PbF
PQFN Dual 3.3×3.3 Tape and Reel
8
February 6, 2014
IRFHM8363PbF
Qualification information
†
I
n
du
s
t
r
i
a
l
(
p
er
J
E
D
E
C
JES
D
47F
†††
g
u
i
d
e
l
i
n
es )
MS
L
1
(
p
er
J
E
D
E
C
J-
S
T
D
-020D
††
)
Q
u
alification level
Moisture Sensitivity Level
RoHS compliant
PQFN Dual 3.3mm x 3.3mm
Yes
Qualification standards can be found at International Rectifier’s web site
Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating;
pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.58mH, R
G
= 50
Ω
, I
AS
= 10A.
Pulse width
≤
400µs; duty cycle
≤
2%.
R
is measured at
T
J
of approximately 90°C.
θ
ꢀ
When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:
Calculated continuous current based on maximum allowable junction temperature.
Current is limited to 10A by source bonding technology.
Revision History
Date
Comment
1/9/2014
Updated ordering information to reflect the End-Of-Life (EOL) of the mini-reel option (EOL notice #259).
Updated data sheet with the new IR corporate template.
Change the qualification level from Consumer to Industrial, on pages 1 & 9.
•
•
•
2/4/2014
IR WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245, USA
9
February 6, 2014
