Infineon-Technologies-IRFHS8342TRPBF
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IRFHS8342PbF
HEXFET
®
Power MOSFET
V
DS
30
20
V
V
T
O
P V
I
EW
V
GS max
±
D
D
D
G
1
2
3
6
5
4
D
D
S
R
DS(on) max
(@V
GS
= 10V)
D
16.0
4.2
m
Ω
G
D
D
Q
g(typical)
(@V
GS
= 4.5V)
D
nC
A
D
S
S
S
I
D
2mm x 2mm PQFN
8.5
(@T
c(Bottom)
= 25°C)
Applications
•
Control MOSFET for Buck Converters
•
System/Load Switch
Feature
s
a
n
d
B
enefits
Features
Resulting Benefits
Low R
DSon
(
≤
16.0m
Ω)
Low Thermal Resistance to PCB (
13°C/W)
Low Profile (
≤
1.0 mm)
Compatible with Existing Surface Mount Techniques
Lower Conduction Losses
Enable better thermal dissipation
Increased Power Density
Easier Manufacturing
≤
results in
Environmentally Friendlier
Increased Reliability
RoHS Compliant Containing no Lead, no Bromide and no Halogen
MSL1, Industrial Qualification
Standard Pack
Form
Orderable part number
Package Type
Note
Quantity
IRFHS8342TRPbF
IRFHS8342TR2PbF
PQFN 2mm x 2mm
PQFN 2mm x 2mm
Tape and Reel
Tape and Reel
4000
400
EOL notice # 259
Absolute Maximum Ratings
Parameter
Max.
30
±20
8.8
7.1
19
Units
V
DS
Drain-to-Source Voltage
Gate-to-Source Voltage
V
V
GS
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
I
I
I
I
I
I
@ T
A
= 25°C
D
D
D
D
D
@ T
A
= 70°C
@ T
C(Bottom)
= 25°C
@ T
C(Bottom)
= 70°C
@ T
C(Bottom)
= 25°C
A
15
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
8.5
76
DM
Power Dissipation
P
D
P
D
@T
A
= 25°C
@T
A
= 70°C
2.1
1.3
W
Power Dissipation
Linear Derating Factor
Operating Junction and
Storage Temperature Range
0.02
-55 to
+ 150
W/°C
°C
T
T
J
STG
Notes
through
ꢀ
are on page 2
1
December 17, 2013
IRFHS8342PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ. Max.
Units
Conditions
BV
DSS
ΔΒ
R
D
S
(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
30
–––
–––
V
V
GS
= 0V, I
D
= 250
μ
A
Δ
V
DSS
/ T
J
–––
–––
–––
1.35
–––
–––
–––
–––
–––
18
22
––– mV/°C
Reference to 25°C, I
D
= 1mA
13
16
25
V
GS
= 10V, I
D
= 8.5A
Ω
m
20
V
GS
= 4.5V, I
D
= 6.8A
V
GS(th)
Δ
V
GS(th)
I
DSS
Gate Threshold Voltage
1.8
-5.8
–––
–––
–––
–––
–––
4.2
8.7
1.5
1.3
3.0
1.9
5.9
15
2.35
V
V
DS
= V
GS
, I
D
= 25
μ
A
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
1.0
μ
A
V
DS
= 24V, V
GS
= 0V
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
150
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
100
nA
-100
V
GS
= -20V
gfs
Q
g
–––
–––
–––
–––
–––
–––
S
V
DS
= 10V, I
D
= 8.5A
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
nC V
GS
= 4.5V, V
DS
= 15V, I
D
= 8.5A
V
DS
= 15V
nC
Q
g
Total Gate Charge
Q
gs
Q
gd
Q
oss
R
G
t
d(on)
t
r
t
d(off)
t
f
Gate-to-Source Charge
Gate-to-Drain Charge
Output Charge
V
GS
= 10V
I
D
= 8.5A
(See Fig. 6 & 16)
nC V
DS
= 16V, V
GS
= 0V
Ω
Gate Resistance
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
V
DD
= 15V, V
GS
= 4.5V
I
D
= 8.5A
R
G
=1.8
Ω
See Fig.17
V
GS
= 0V
ns
Turn-Off Delay Time
Fall Time
5.2
5.0
600
100
46
–––
–––
–––
–––
C
iss
C
oss
C
r
s
s
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
pF
V
DS
= 25V
ƒ = 1.0MHz
Diode Characteristics
Parameter
Min.
Typ. Max.
Units
Conditions
D
I
S
Continuous Source Current
MOSFET symbol
–––
–––
–––
8.5
76
(Body Diode)
Pulsed Source Current
showing the
integral reverse
A
G
I
SM
–––
S
(Body Diode)
p-n junction diode.
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
11
1.0
17
20
V
T
J
= 25°C, I
S
= 8.5A
, V
GS
= 0V
ns T
J
= 25°C, I
F
= 8.5A
, V
DD
= 15V
di/dt = 330A/
μ
s
nC
Q
rr
t
on
13
Time is dominated by parasitic Inductance
Thermal Resistance
Parameter
Typ.
–––
–––
–––
–––
Max.
13
90
60
42
Units
Junction-to-Case
Junction-to-Case
R
θ
JC
(Bottom)
R
θ
JC
(Top)
°C/W
Junction-to-Ambient
R
θ
JA
Junction-to-Ambient (<10s)
R
θ
JA
Notes:
Repetitive rating;
pulse width limited by max. junction temperature.
Current limited by package.
Pulse width
≤
400
μ
s; duty cycle
≤
2%.
When mounted on 1 inch square copper board
ꢀ
R
is measured at
T
J
of approximately 90°C.
θ
2
December 17, 2013
IRFHS8342PbF
100
10
1
100
10
1
VGS
VGS
10V
TOP
10V
TOP
7.0V
5.0V
4.5V
3.5V
3.3V
2.8V
2.5V
7.0V
5.0V
4.5V
3.5V
3.3V
2.8V
2.5V
BOTTOM
BOTTOM
2.5V
1
2.5V
1
60
μ
s PULSE WIDTH
≤
60
μ
s PULSE WIDTH
≤
Tj = 150°C
Tj = 25°C
0.1
0.1
10
100
0.1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2.
Typical Output Characteristics
Fig 1.
Typical Output Characteristics
100
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
= 8.5A
D
V
= 10V
GS
T
= 150°C
J
10
T
= 25°C
J
V
= 15V
DS
60
μ
s PULSE WIDTH
≤
1.0
2.0
3.0
4.0
5.0
6.0
-60 -40 -20
T
0
20 40 60 80
10
0
1
20 140 160
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4.
Normalized On-Resistance vs. Temperature
Fig 3.
Typical Transfer Characteristics
14
10000
V
C
= 0V,
f = 1 MHZ
GS
I =
8.5A
D
V
V
V
= 24V
= 15V
= 6.0V
= C
+ C
, C
SHORTED
DS
DS
DS
iss
gs
gd ds
12
10
8
C
= C
rss
gd
C
= C
+ C
oss
ds
gd
1000
100
10
C
iss
6
C
oss
4
C
rss
2
0
0
2
4
6
8
10
12
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5.
Typical Capacitance vs.Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.Gate-to-Source Voltage
3
December 17, 2013
IRFHS8342PbF
100
10
1
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 150°C
J
100
μ
sec
T
= 25°C
J
10msec
DC
Limited by
Wire Bond
1
1msec
10
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.1
1
100
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
V
DS
SD
Fig 7.
Typical Source-Drain Diode Forward Voltage
Fig 8.
Maximum Safe Operating Area
20
2.2
2.0
1.8
1.6
1.4
1.2
1.0
LIMITED BY PACKAGE
16
12
8
I
= 25
μ
A
D
4
0
25
50
T
75
100
125
150
-75 -50 -25
0
25 50 75
100 125 150
, Case
Temperature (°C)
C
T
, Temperature ( °C )
J
Fig 9.
Maximum Drain Current vs.
Fig 10.
Threshold Voltage vs. Temperature
Cas
e
(
Bottom
)
T
emperature
100
10
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.1
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
4
December 17, 2013
IRFHS8342PbF
35
30
25
20
15
10
5
30
25
20
15
10
5
I
= 8.5A
D
Vgs = 4.5V
T
= 125°C
J
Vgs = 10V
T
= 25°C
15
J
0
5
10
20
0
10
20
30
40
50
60
70
I ,
Drain Current (A)
V
Gate -to -Source Voltage
(V)
D
GS,
Fig 13.
Typical On-Resistance vs. Drain Current
Fig 12.
On-Resistance vs. Gate Voltage
600
500
400
300
200
100
0
1E-5
1E-4
1E-3
1E-2
1E-1
1E+0
Time (sec)
Fig 14.
Typical Power vs. Time
Driver Gate Drive
P.W.
P
.
W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circui
t
L
ayou
t
C
onsiderations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
–
D.U.
T
. I
W
aveform
SD
+
–
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
–
+
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
V
DD
Re-Applied
Voltage
•
dv/d
t
c
ontrolle
d
b
y
R
G
R
G
+
–
Body Diode
Forward Drop
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 15.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
5
December 17, 2013
IRFHS8342PbF
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 16b.
Gate Charge Waveform
Fig 16a.
Gate Charge Test Circuit
R
D
V
DS
V
DS
90%
V
GS
D.U.T.
R
G
+
V
DD
–
10%
V
GS
V
GS
Puls
e
W
idth
≤ 1
µs
Dut
y
F
acto
r
≤ 0.1
t
d(on)
t
d(off)
t
r
t
f
Fig 17a.
Switching Time Test Circuit
Fig 17b.
Switching Time Waveforms
6
December 17, 2013
IRFHS8342PbF
PQFN 2×2 Outline Package Details
For footprint and stencil design recommendations, please refer to application note AN-1154 at
PQFN 2×2 Outline
Part Marking
8342
7
December 17, 2013
IRFHS8342PbF
PQFN 2×2 Outline
Tape and Reel
8
December 17, 2013
IRFHS8342PbF
Qualification information
†
I
n
du
s
t
r
i
a
l
†
(
p
er
J
E
D
E
C JES
D
47F
††
g
u
i
d
e
l
in
e
s )
MS L 1
Qualification le
v
e
l
Moisture Sensitivity Level
RoHS
c
o
m
pliant
PQFN 2mm x 2mm
(
p
er
J
E
D
E
C
J-ST
D
-020D
††
)
Yes
Qualification standards can be found at International Rectifier’s web site
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
•
Updated data sheet with new IR corporate template.
9/9/2013
•
•
•
Updated Trr/Qrr test condition from “V
DD
= 13V” to “V
DD
= 15V” on page 2
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option
(EOL notice #259)
Updated Qual level from “Consumer” to “Industrial” on page 1, 9
12/17/2013
IR WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245, USA
9
December 17, 2013
