Infineon-Technologies-IRFPS3815PBF

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Infineon-Technologies-IRFPS3815PBF
PD – 95896  
IRFPS3815PbF  
HEXFET

®

Power MOSFET  
l
Advanced Process Technology  
l
Ultra Low On-Resistance  
l
Dynamic dv/dt Rating  
l
175°C Operating Temperature  
l
Fast Switching  
D
V

DSS

= 150V  
R

DS(on)

= 0.015
Ω  
G
l
Fully Avalanche Rated  
l
Lead-Free  
I

D

= 105A  
S
Description  
The HEXFET

®

Power MOSFETs from International  
Rectifier utilize advanced processing techniques to  
achieve extremely low
 
on-resistance per silicon area.  
This benefit, combined with the fast switching speed  
and ruggedized device design that HEXFET power  
MOSFETs are well known for, provides the designer  
with an extremely efficient and reliable device for use in  
a wide variety of applications.  
Super
–
247™  
Absolute Maximum Ratings  
Parameter  
Max.  
105  
74  
Units  
I

D

@ T

C

= 25°C  
I

D

@ T

C

= 100°C  
I

DM  

Continuous Drain Current, V

GS

@ 10V  
Continuous Drain Current, V

GS

@ 10V  
Pulsed Drain Current
  
A
390  
441  
2.9  
P

D

@T

C

= 25°C  
Powe
r
D
issipation  
W
W/°C  
V
Linea
r
D
eratin
g
F
actor  
V

GS  

E

AS  

I

AR  

Gate-to-Sourc
e
V
oltage  
± 30  
1610  
58  
Single Pulse Avalanche Energy
‚  
Avalanch
e
C
urrent
  
mJ  
A
E

AR  

dv/dt  
T

J  

Repetitiv
e
A
valanch
e
E
nergy
  
Peak Diode Recovery dv/dt
ƒ  
Operatin
g
J
unctio
n
a
nd  
38  
mJ  
V/ns  
3.0  
-55 to
 
+ 175  
T

STG  

Storage Temperature Range  
Solderin
g
T
emperature, fo
r
1
0
s
econds  
300 (1.6mm from case )  
Thermal Resistance  
Parameter  
Junction-to-Case  
Typ.  
–––  
Max.  
Units  
R

θ
JC  

R

θ
CS  

R

θ
JA  

0.34  
–––  
40  
Case-to-Sink, Flat, Greased Surface  
Junction-to-Ambient  
0.24  
–––  
°C/W  
1
09/13/04  

IRFPS3815PbF  
Electrical Characteristics @ T

J

= 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
150 –––
 
–––  
Conditions  
V

GS

= 0V, I

D

= 250µA  
V

(BR)DSS  

Drain-to-Source Breakdown Voltage  
V
∆
V

(BR)DSS

/
∆
T

J

Breakdown Voltage Temp. Coefficient
 
––– 0.18
 
––– V/°C
 
Reference to 25°C, I

D

= 1mA  
R

DS(on)  

V

GS(th)  

g

fs  

Stati
c
D
rain-to-Sourc
e
O
n-Resistance  
Gat
e
T
hreshol
d
V
oltage  
––– –––
 
0.015  
Ω
V
S
V

GS

= 10V, I

D

= 63A
„  
V

DS

= 10V, I

D

= 250µA  
V

DS

= 50V, I

D

= 58A  
V

DS

= 100V, V

GS

= 0V  
V

DS

= 80V, V

GS

= 0V, T

J

= 150°C  
V

GS

= 30V  
3.0  
47  
––– 5.0  
––– –––  
Forward Transconductance  
––– ––– 25  
––– –––
 
250  
––– –––
 
100  
––– –––
 
-100  
––– 260
 
390  
I

DSS  

Drain-to-Source Leakage Current  
µA  
nA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
I

GSS  

V

GS

= -30V  
Q

g  

I

D

= 58A  
Q

gs  

Q

gd  

t

d(on)  

t

r  

Gate-to-Source Charge  
Gate-to-Drain (“Miller”) Charge  
Turn-On Delay Time  
Rise Time  
–––  
––– 150
 
230  
––– 22
 
–––  
––– 130
 
–––  
53  
80  
nC V

DS

= 120V  
V

GS

= 10V
„  
V

DD

= 75V  
I

D

= 58A  
ns  
t

d(off)  

t

f  

Turn-Off Delay Time  
Fall Time  
–––  
–––  
51 –––  
60 –––  
R

G

= 1.03
Ω  
V

GS

= 10V
„  
D
Between lead,  
5.0  
L

D  

L

S  

Internal Drain Inductance  
Internal Source Inductance  
–––  
–––  
–––  
–––  
6mm (0.25in.)  
nH  
G
from package  
13  
and center of die contact  
S
C

iss  

Input Capacitance  
––– 6810
 
–––  
––– 1570
 
–––  
––– 480
 
–––  
––– 9820
 
–––  
––– 670
 
–––  
––– 1270
 
–––  
V

GS

= 0V  
C

oss  

Output Capacitance  
pF  
V

DS

= 25V  
C

rss  

Reverse Transfer Capacitance  
Output Capacitance  
ƒ = 1.0MHz, See Fig. 5  
C

oss  

V

GS

= 0V,
 
V

DS

= 1.0V,
 
ƒ = 1.0MHz  
V

GS

= 0V,
 
V

DS

= 120V,
 
ƒ = 1.0MHz  
V

GS

= 0V, V

DS

= 0V to 120V  
C

oss  

Output Capacitance  
C

oss

eff.  
Effective Output Capacitance
ꢀ  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
D
I

S  

MOSFET symbol  
105  
––– –––  
showing the  
A
G
I

SM  

Pulsed Source Current  
(Body Diode)
  
integral reverse  
––– –––
 
390  
S
p-n junction diode.  
V

SD  

t

rr  

Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.3  
––– 270 410  
V
T

J

= 25°C, I

S

= 58A, V

GS

= 0V
 
„  
ns  
T

J

= 25°C, I

F

= 58A  
Q

rr  

t

on  

––– 2990
 
4490 nC di/dt
 
= 100A/µs
 
„  
Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

)  
Notes:  

Repetitive rating;
 
pulse width limited by  
„
Pulse width
≤
300µs; duty cycle
≤
2%.  
max. junction temperature. (See fig. 11)  
ꢀ
C

oss

eff. is a fixed capacitance that gives the same charging time  
‚
Starting T

J

= 25°C, L = 0.96mH  
R

G

= 25
Ω
, I

AS

= 58A. (See Figure 12)  
as C

oss

while V

DS

is rising from 0 to 80% V

DSS  

ƒ
I

SD

≤
58A, di/dt
≤
450A/µs, V

DD

≤
V

(BR)DSS  

T

J

≤
175°C  
,
2

IRFPS3815PbF  
1000  
100  
10  
1000  
100  
10  
VGS  
VGS  
15V  
12V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
TOP  
15V  
12V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
TOP  
BOTTOM 5.0V  
BOTTOM 5.0V  
5.0V  
1
5.0V  
0.1  
0.01  
50µs PULSE WIDTH  
T =
 
25 C  
J
50µs PULSE WIDTH  
T =
 
175 C  
J
°
°
1
0.1  
0.1  
1
10  
100  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1.
 
Typical Output Characteristics  
Fig 2.
 
Typical Output Characteristics  
1000  
3.0  
97A  
=
I
D
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
°
T =
 
175 C  
J
100  
10  
1
°
T =
 
25 C  
J
V
= 50V  
DS  
50µs PULSE WIDTH  
V
=
1
0V  
GS  
-60 -40 -20  
0
20 40 60 80
 
100 120 140 160 180  
°
5
6
7
8
9
10 11  
12  
T ,
 
Junction Temperature (
 
C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 3.
 
Typical Transfer Characteristics  
Fig 4.
 
Normalized On-Resistance  
Vs. Temperature  
3

IRFPS3815PbF  
20  
16  
12  
8
12000  
I
D
= 58A  
V
= 0V,  
f = 1 MHZ  
GS  
V
V
V
= 120V  
= 75V  
= 30V  
C
= C
 
+ C  
,
C
ds  
SHORTED  
DS  
DS  
DS  
iss  
gs  
gd  
C
= C  
10000  
8000  
6000  
4000  
2000  
0
rss  
gd  
C
= C
 
+ C  
Ciss  
oss  
ds  
gd  
Coss  
Crss  
4
FOR TEST CIRCUIT  
SEE FIGURE 13  
0
0
100  
200  
300  
400  
1
10  
100  
1000  
Q ,
 
Total Gate Charge (nC)  
G
V
DS  
, Drain-to-Source Voltage (V)  
Fig 6.
 
Typical Gate Charge Vs.  
Fig 5.
 
Typical Capacitance Vs.  
Gate-to-Source Voltage  
Drain-to-Source Voltage  
10000  
1000  
100  
10  
1000  
OPERATION IN THIS AREA LIMITED  
BY R  
DS(on)  
100  
10  
1
°
T =
 
175 C  
J
10us  
100us  
°
T =
 
25 C  
J
1ms  
10ms  
°
T =
 
25 C  
C
°
T =
 
175 C  
Single Pulse  
J
V
= 0 V  
GS  
1.6  
0.1  
0.0  
1
0.4  
0.8  
1.2  
2.0  
1
10  
100  
1000  
V
,Source-to-Drain Voltage (V)  
V
, Drain-to-Source Voltage (V)  
SD  
DS  
Fig 8.
 
Maximum Safe Operating Area  
Fig 7.
 
Typical Source-Drain Diode  
Forward Voltage  
4

IRFPS3815PbF  
120  
100  
80  
60  
40  
20  
0
R

D  

V

DS  

V

GS  

D.U.T.  
R

G  

+

V

DD  

–
10V  
Pulse Width
≤ 1
µs  
Duty Factor
≤ 0.1 %  
V
DS  
90%  
25  
50  
75  
100  
125  
150  
175  
°
T ,
 
Case Temperature
 
( C)  
C
10%  
V
GS  
Fig 9.
 
Maximum Drain Current Vs.  
t
t
r
t
t
f
d(on)  
d(off)  
Case Temperature  
1
D = 0.50  
0.1  
0.20  
0.10  
0.05  
P
DM  
0.02  
0.01  
0.01  
SINGLE PULSE  
(THERMAL RESPONSE)  
t
1
t
2
Notes:  
1. Duty factor D =  
2. Peak T
 
=
P  
t /
 
t  
1
2
x Z  
+ T  
C
J
DM  
thJC  
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t ,
 
Rectangular Pulse Duration (sec)  
1
Fig 11.
 
Maximum Effective Transient Thermal Impedance, Junction-to-Case  
5

IRFPS3815PbF  
4000  
3000  
2000  
1000  
0
15V  
I
D
TOP  
24A  
41A  
BOTTOM 58A  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
–
I
A
20V  
0.01  
Ω
t
p
Fig 12a.
 
Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
150  
175  
°
Starting T
 
, Junction Temperature (
 
C)  
J
Fig 12c.
 
Maximum Avalanche Energy  
Vs. Drain Current  
I
AS  
Fig 12b.
 
Unclamped Inductive Waveforms  
Current Regulator  
Same Type as D.U.
T
.  
Q
G
50K
Ω  
.2
µ
F  
12V  
10 V  
.3
µ
F  
Q
Q
GD  
GS  
+
V
DS  
D.U.
T
.  
–
V
GS  
V
G
3mA  
I
I
D
G
Charge  
Current Sampling Resistors  
Fig 13a.
 
Basic Gate Charge Waveform  
Fig 13b.
 
Gate Charge Test Circuit  
6

IRFPS3815PbF  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
•
Low Stray Inductance  
•
Ground Plane  
•
Low Leakage Inductance  
Current Transformer  
D.U.T
*  
ƒ
–
+
‚
–
„
–
+

R

G  

•
dv/dt controlled by R

G  

•
I

SD

controlled by Duty Factor “D”  
•
D.U.T. – Device Under Test  
+
–
V

DD  

V

GS  

*
Reverse Polarity of D.U.T for P-Channel  
Driver Gate Drive  
P
.
W.  
Period  
Period  
D =  
P.W.  
V
[
=10V  
] ***  
GS  
D.U.
T
. I
 
W
aveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.
T
. V
 
W
aveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
]
[
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
[
]
SD  
Ripple
≤
5%  
***
V

GS

= 5.0V for Logic Level and 3V Drive Devices  
Fig 14.
For N-channel
HEXFET

®

power MOSFETs  
7

IRFPS3815PbF  
Case Outline and Dimensions — Super-247  
Super-247 (TO-274AA) Part Marking Information  
EXAMPLE: THIS IS AN IRFPS37N50A WITH  
ASSEMBLY LOT CODE 1789  
ASSEMBLED ON WW 19, 1997  
IN THE ASSEMBLY LINE “C”  
PART NUMBER  
INTERNATIONAL RECTIFIER  
LOGO  
IRFPS37N50A  
719C  
17  
89  
DATE CODE  
YEAR 7 = 1997  
WEEK 19  
LINE C  
ASSEMBLY LOT CODE  
Note: “P” in assembly line position  
indicates “Lead-Free”  
TOP  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
8