Infineon-Technologies-IRFR3518TRPBF
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PD – 95510A
IRFR3518PbF
IRFU3518PbF
HEXFET
®
Power MOSFET
Applications
l
High frequency DC-DC converters
l
Lead-Free
V
DSS
80V
R
DS(on)
max
I
D
30A
29m
W
Benefits
l
Low Gate-to-Drain Charge to Reduce
Switching Losses
l
Fully Characterized Capacitance Including
Effective C
OSS
to Simplify Design, (See
App. Note AN1001)
l
Fully Characterized Avalanche Voltage
and Current
D-Pak
IRFR3518
I-Pak
IRFU3518
Absolute Maximum Ratings
Parameter
Max.
Units
V
DS
Drain-to-Source Voltage
80
± 20
V
V
GS
Gate-to-Source Voltage
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
38
27
A
150
P
D
@T
C
= 25°C
Power Dissipation
110
W
Linear Derating Factor
0.71
W/°C
V/ns
dv/dt
T
J
Peak Diode Recovery dv/dt
Operating Junction and
5.2
-55 to
+ 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θ
JC
R
θ
JA
R
θ
JA
Junction-to-Case
–––
–––
–––
1.4
40
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
°C/W
110
Notes
through
are on page 10
1
12/03/04
IRFR/U3518PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
80 –––
–––
––– 0.09
––– V/°C
Reference to 25°C, I
D
= 1mA
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
V
GS
= 0V, I
D
= 250µA
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
24
29
m
Ω
V
GS
= 10V, I
D
= 18A
––– 4.0
V
V
DS
= V
GS
, I
D
= 250µA
––– ––– 20
––– ––– 250
––– –––
200
––– –––
-200
V
DS
= 80V, V
GS
= 0V
I
DSS
Drain-to-Source Leakage Current
µA
V
DS
= 64V, V
GS
= 0V, T
J
= 150°C
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V
GS
= 20V
nA
I
GSS
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
g
fs
34
––– –––
37 56
S
V
DS
= 25V, I
D
= 18A
I
D
= 18A
Q
g
–––
–––
–––
–––
–––
–––
–––
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
Rise Time
11 –––
12 –––
12 –––
25 –––
37 –––
13 –––
nC V
DS
= 40V
V
GS
= 10V
V
DD
= 40V
I
D
= 18A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
R
G
= 9.1
Ω
V
GS
= 10V
V
GS
= 0V
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Input Capacitance
––– 1710
–––
––– 270
–––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
V
DS
= 25V
–––
33 –––
pF
ƒ = 1.0MHz
––– 1780
–––
––– 170
–––
––– 330
–––
V
GS
= 0V,
V
DS
= 1.0V,
ƒ = 1.0MHz
V
GS
= 0V,
V
DS
= 64V,
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 64V
ꢀ
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
160
18
Units
mJ
E
AS
I
AR
Avalanche Current
A
E
AR
Repetitive Avalanche Energy
11
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
I
S
Continuous Source Current
(Body Diode)
MOSFET symbol
38
––– –––
showing the
A
G
I
SM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
––– –––
150
S
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 77 –––
––– 210 –––
V
T
J
= 25°C, I
S
= 18A, V
GS
= 0V
ns
T
J
= 25°C, I
F
= 18A
Q
rr
t
on
nC di/dt
= 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
2
IRFR/U3518PbF
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1000
100
10
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
BOTTOM
BOTTOM
4.5V
4.5V
1
1
0.1
0.01
20µs PULSE WIDTH
°
T =
25
J
C
20µs PULSE WIDTH
°
T =
175
J
C
0.1
1
10
100
0.1
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000.00
100.00
10.00
3.0
38A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
T
= 25°C
J
T
= 175°C
J
V
= 25V
DS
20µs PULSE WIDTH
V
= 10V
GS
1.00
4.0
6.0
V
8.0
10.0
12.0
14.0
16.0
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
Tj, Junction Temperature (
°
C)
, Gate-to-Source Voltage (V)
GS
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
3
IRFR/U3518PbF
100000
12
10
8
V
C
= 0V,
f = 1 MHZ
GS
I =
18A
D
= C
+ C
, C
SHORTED
iss
gs gd
ds
V
= 40V
= 64V
= 16V
DS
C
= C
gd
rss
V
C
= C
+ C
DS
oss
ds gd
10000
1000
100
V
DS
C
iss
6
C
oss
4
2
C
rss
0
10
1
10
100
0
10
20
30
40
V
, Drain-to-Source Voltage (V)
Q
Total Gate Charge (nC)
DS
G
Fig 6.
Typical Gate Charge Vs.
Fig 5.
Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
10
1
°
T =
175
C
J
100µsec
1msec
°
T =
25
J
C
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
100
V
= 0 V
GS
0.1
0.1
0.0
0.5
1.0
1.5
2.0
1
10
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-to-Source Voltage (V)
DS
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRFR/U3518PbF
R
D
40
30
20
10
0
V
DS
LIMITED BY PACKAGE
V
GS
D.U.T.
R
G
+
V
DD
–
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature
( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9.
Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b.
Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
t
1
SINGLE PULSE
0.02
0.01
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRFR/U3518PbF
320
240
160
80
15V
I
D
TOP
7.3A
13A
18A
BOTTOM
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
–
I
A
20V
0.01
Ω
t
p
Fig 12a.
Unclamped Inductive Test Circuit
V
(BR)DSS
0
t
25
50
75
100
125
°
( C)
150
175
p
Starting Tj, Junction Temperature
Fig 12c.
Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b.
Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.
T
.
Q
G
50K
Ω
.2
µ
F
12V
.3
µ
F
Q
Q
GD
GS
+
V
DS
D.U.
T
.
–
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a.
Basic Gate Charge Waveform
Fig 13b.
Gate Charge Test Circuit
6
IRFR/U3518PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
D.U.T
–
+
–
–
+
R
G
•
dv/dt controlled by R
G
+
–
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
V
DD
Driver Gate Drive
P.W.
P
.
W.
Period
Period
D =
V
=10V
*
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 14.
For N-Channel HEXFET
®
Power MOSFETs
7
IRFR/U3518PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
E
X
AM
P
L
E
: THIS
IS AN IRFR
1
20
P
A
R
T NUMBER
WITH A
S
S
E
MBLY
L
O
T CODE 1234
INTERNATI
O
N
A
L
RECTIFIER
L
O
GO
DAT E
C
ODE
Y
E
AR 9 =
1
999
WE E K
1
6
IRFU120
916A
A
S
SE
M
BLED ON WW 16, 1999
IN THE A
S
SE
M
BL
Y
L
INE
“
A”
12
34
LINE A
N
o
te:
“
P
“
i
n
a
ssemb
l
y li
n
e pos
i
ti
o
n
AS S E MB L Y
L
O
T CODE
i
n
d
i
c
ates
“
L
e
ad
–
F
r
e
e”
OR
P
A
R
T NUMBER
DAT E
C
ODE
P =
DE S IGNAT E S
L E AD-F RE E
P
R
O
DUCT (OPT
I
O
N
A
L)
INTERNATI
O
N
A
L
RECTIFIER
L
O
GO
IRFU120
12 34
Y
E
AR 9 =
1
999
AS S E MB L Y
L
O
T CODE
W
E
EK 16
A =
A
S S E MB L Y S IT E
C
ODE
8
IRFR/U3518PbF
I-Pak (TO-251AA) Package Outline
(Dimensions are shown in millimeters (inches) )
I-Pak (TO-251AA) Part Marking Information
P
A
RT NUMBER
E
X
AM
P
L
E
:
T
HIS
IS AN IR
F
U120
WIT H AS S E MBL Y
I
N
TERNATIONAL
RECTIFIER
L
O
GO
D
A
TE
C
ODE
Y
E
A
R 9 =
1
999
WE EK
19
IRFU120
919A
78
L
O
T CODE 5678
AS
S
EMBLED
ON WW 19, 1999
56
IN THE AS
S
E
MBLY
LINE
“
A”
LINE A
AS S E MB L Y
LOT CODE
Note:
“
P
”
i
n
a
ssemb
l
y li
n
e
pos
i
t
i
o
n
i nd
i
c
ates
“
L
e
ad-F r ee”
OR
P
A
R
T NUMBER
D
A
TE
C
O
D
E
INTERNATI
O
N
A
L
RECTIFIER
L
O
GO
IRFU120
P =
DES
I
G
N
A
TES LEAD-FREE
PRODUCT (OP
T
I
O
N
A
L)
56
78
Y
E
A
R 9 =
1
999
A
S
S
E
MBLY
LOT
C
O
D
E
W
E
EK 19
A =
A
S
S
E
MBL
Y
S
I
TE
C
O
D
E
9
IRFR/U3518PbF
D-Pak (TO-252AA)
T
a
pe & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating;
pulse width limited by
max. junction temperature.
Starting T
J
= 25°C, L = 0.99mH
R
G
= 25
Ω
, I
AS
= 18A.
ꢀ
C
oss
eff. is a fixed capacitance that gives the same
charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1″ square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer
to application note #AN-994.
I
SD
≤
18A, di/dt
≤
360A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C.
Pulse width
≤
300µs; duty cycle
≤
2%.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
10
Note: For
the most current drawings please refer to the IR website at:
