Infineon-Technologies-IRFR48ZTRPBF
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PD – 95950A
IRFR48ZPbF
IRFU48ZPbF
Features
Advanced Process Technology
HEXFET
®
Power MOSFET
Ultr
a
L
o
w
O
n-Resistance
175°
C
O
peratin
g
T
emperature
Fast Switching
D
V
DSS
= 55V
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
R
DS(on)
= 11m
Ω
G
Description
I
D
= 42A
S
Thi
s
H
EXFET
®
Powe
r
M
OSFE
T
u
tilize
s
t
h
e
l
atest
processing techniques to achieve extremely low
on-resistanc
e
p
e
r
s
ilico
n
a
rea
.
A
dditiona
l
f
eatures
of this design
are a 175°C junction operating
temperature, fast switching speed and improved
repetitiv
e
a
valanch
e
r
ating
.
T
hes
e
f
eature
s
c
ombine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
I-Pak
IRFU48ZPbF
D-Pak
IRFR48ZPbF
Absolute Maximum Ratings
Parameter
Max.
Units
Continuous Drain Current, V
GS
@ 10V
(Silicon Limited)
I
I
I
I
@ T
= 25°C
C
62
D
D
D
Continuous Drain Current, V
GS
@ 10V
@ T
= 100°C
C
44
42
A
(Package Limited)
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
@ T
= 25°C
C
250
91
DM
P
@T =
25°C Power
Dissipation
W
D
C
Linear Derating Factor
0.61
± 20
W/°C
V
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy
GS
E
AS (Thermally limited)
74
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
E
AS
(Tested )
110
I
AR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
Operating Junction and
E
AR
mJ
T
J
-55 to
+ 175
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf
in (1.1N
m)
Thermal Resistance
Parameter
Typ.
–––
Max.
1.64
40
Units
Junction-to-Case
R
θ
R
θ
R
θ
JC
JA
JA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
–––
°C/W
–––
110
HEXFET
®
i
s
a
r
egistere
d
t
rademar
k
o
f
I
nternationa
l
R
ectifier.
1
09/27/10
IRFR/U48ZPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max.
Units
55 –––
–––
Conditions
V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
V
∆
∆
V
(BR)DSS
/ T
J
Breakdown Voltage Temp. Coefficient
––– 0.054 –––
V/°C Reference
to 25°C, I
D
= 1mA
m
Ω
V
R
DS(on)
V
GS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
8.86
–––
–––
–––
–––
–––
11
4.0
–––
20
V
GS
= 10V, I
D
= 37A
V
DS
= V
GS
, I
D
= 50µA
V
DS
= 25V, I
D
= 37A
Forward Transconductance
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
I
DSS
Drain-to-Source Leakage Current
µA V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
250
200
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
––– -200
Q
g
Q
gs
Q
gd
t
d(on)
t
r
40
11
15
15
61
40
35
4.5
60
I
D
= 37A
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
nC V
DS
= 44V
V
GS
= 10V
V
DD
= 28V
Rise Time
I
D
= 37A
t
d(off)
t
f
Turn-Off Delay Time
ns R
G
= 12
Ω
V
GS
= 10V
Fall Time
L
D
Internal Drain Inductance
Between lead,
D
nH 6mm
(0.25in.)
from package
G
L
S
Internal Source Inductance
–––
7.5
–––
S
and center of die contact
V
GS
= 0V
DS
= 25V
pF ƒ
= 1.0MHz
C
iss
Input Capacitance
––– 1720 –––
C
oss
C
rss
C
oss
C
oss
Output Capacitance
–––
–––
290
160
–––
–––
V
Reverse Transfer Capacitance
Output Capacitance
––– 1000 –––
V
GS
= 0V,
V
DS
= 1.0V,
ƒ = 1.0MHz
V
GS
= 0V,
V
DS
= 44V,
ƒ = 1.0MHz
Output Capacitance
–––
–––
230
360
–––
–––
C
oss
eff.
Effective Output Capacitance
V
GS
= 0V, V
DS
= 0V to 44V
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max.
Units
Conditions
I
Continuous Source Current
–––
–––
37
MOSFET symbol
S
(Body Diode)
A
showing the
I
Pulsed Source Current
–––
–––
250
integral reverse
SM
(Body Diode)
p-n junction diode.
V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
20
1.3
40
28
V
T =
25°C, I
= 37A, V
= 0V
J S GS
SD
t
ns T
= 25°C, I
= 37A, V
DD
= 28V
J F
rr
di/dt = 100A/µs
Q
14
nC
rr
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
IRFR/U48ZPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
BOTTOM
4.5V
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
Tj = 25°C
≤
≤
60µs PULSE WIDTH
Tj = 175°C
1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
60
50
40
30
20
10
0
T
= 25°C
J
100
10
1
T
= 175°C
J
T
= 175°C
J
T
= 25°C
J
V
= 10V
V
= 25V
DS
380µs PULSE WIDTH
DS
≤
60µs PULSE WIDTH
10 12
, Gate-to-Source Voltage (V)
0.1
2
4
6
8
0
20
40
60
80
I ,Drain-to-Source
Current (A)
D
V
GS
Fig 3.
Typical Transfer Characteristics
Fig 4.
Typical Forward Transconductance
vs. Drain Current
3
IRFR/U48ZPbF
10000
20
16
12
8
V
= 0V,
= C
f = 1 MHZ
GS
I =
37A
D
C
C
C
+ C
, C
SHORTED
iss
gs
gd
ds
V
= 44V
DS
= C
rss
oss
gd
= C
+ C
VDS= 28V
VDS= 11V
ds
gd
C
iss
1000
C
oss
C
4
rss
0
100
0
10
20
30
40
50
60
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6.
Typical Gate Charge vs.
Fig 5.
Typical Capacitance vs.
Gate-to-Sourc
e
V
oltage
Drain-to-Sourc
e
V
oltage
1000.00
100.00
10.00
1.00
1000
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
10
1
T
= 175°C
100µsec
J
1msec
10msec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
DC
V
= 0V
GS
0.1
0.10
1
10
, Drain-toSource Voltage (V)
100
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
, Source-to-Drain Voltage (V)
V
V
DS
SD
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRFR/U48ZPbF
2.5
2.0
1.5
1.0
0.5
70
60
50
40
30
20
10
0
I
= 37A
LIMITED BY PACKAGE
D
V
= 10V
GS
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
T
, Case Temperature (°C)
C
T
, Junction Temperature (°C)
J
Fig 10.
Normalized On-Resistance
Fig 9.
Maximum Drain Current vs.
vs
.
T
emperature
Cas
e
T
emperature
10
1
D = 0.50
0.20
0.10
0.05
R
1
R
1
R
2
R
2
R
3
R
3
Ri (°C/W)
τ
i (sec)
0.1
0.01
τ
J
τ
J
τ
τ
C
τ
0.7206
0.6009
0.3175
0.000326
0.001810
0.014886
0.02
0.01
τ
1
τ
1
τ
2
τ
2
3
τ
3
Ci=
τ
i
/
Ri
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRFR/U48ZPbF
300
250
200
150
100
50
15V
I
D
TOP
4.3A
6.3A
37A
DRIVER
+
L
V
DS
BOTTOM
D.U.T
AS
R
G
V
DD
–
I
A
2
V
0
G
V
S
Ω
0.01
t
p
Fig 12a.
Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T
, Junction Temperature (°C)
J
I
AS
Fig 12c.
Maximum Avalanche Energy
Fig 12b.
Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
G
Charge
I
I
I
I
I
= 1.0A
Fig 13a.
Basic Gate Charge Waveform
D
D
D
D
D
= 50µA
= 150µA
= 250µA
= 1.0mA
L
VCC
DUT
0
1K
-75 -50 -25
0
25 50 75
100 125 150 175
, Temperature ( °C )
T
J
Fig 14.
Threshold Voltage vs. Temperature
Fig 13b.
Gate Charge Test Circuit
6
IRFR/U48ZPbF
1000
100
10
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
∆
assuming
Tj = 25°C due to
avalanche losses
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15.
Typical Avalanche Current vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
80
60
40
20
0
TOP
BOTTOM 1%
Duty Cycle
= 37A
Single Pulse
I
D
4. P
D (ave)
= Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆
T
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as 25°C in Figure 15, 16).
t
av =
Average time in avalanche.
25
50
75
100
125
150
175
D = Duty cycle in avalanche =
t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see figure 11)
Starting T
, Junction Temperature (°C)
J
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
D
T/ Z
thJC
Fig 16.
Maximum Avalanche Energy
I
av
= 2
D
T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
vs
.
T
emperature
7
IRFR/U48ZPbF
Driver Gate Drive
P.W.
P
.
W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
–
D.U.
T
. I
W
aveform
SD
+
–
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
–
+
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
V
DD
Re-Applied
Voltage
•
dv/dt controlled by R
G
R
G
+
–
Body Diode
Forward Drop
•
Driver same type as D.U.T.
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fig 17.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
R
D
V
DS
V
GS
D.U.T.
R
G
+
V
DD
–
10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 18a.
Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b.
Switching Time Waveforms
8
IRFR/U48ZPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
E
X
AMP
L
E: T
H
IS
IS
A
N
I
RFR120
P
A
R
T NU
M
B
ER
W
I
T H
A
S S
E
M
B L Y
L
O
T CODE 1234
A
S
SE
M
B
LED
O
N W
W
1
6, 2001
IN
T
HE
A
S
SE
M
B
LY LI
N
E “A”
INTERN
A
T
I
O
NAL
RE
C
T
I
FIER
L
O
GO
DAT E
CODE
Y
E
A
R 1 =
2
001
W
E
E K
16
IRFR
1
20
116A
12
34
LI
N
E A
Note: “
P
” in
a
s
s
e
mb
l
y
l
in
e
p
o
s
i
t
ion
AS S E MB L Y
L
O
T CO
D
E
ind
i
c
ates “L
ead
–
Fr
e
e”
“P” in
a
s
s
e
mb
l
y
l
in
e
p
o
s
i
ti
o
n
i
n
d
i
c
ates
“L
e
ad
–
F r
e
e” qua
l
ifi
c
at
i
o
n to the cons ume
r
-l
e
vel
P
A
R
T NU
M
B
ER
DA
T
E
C
ODE
P =
DESI
G
N
A
T
ES LE
A
D-
F
REE
PR
O
D
U
C
T (O
P
TI
O
N
A
L
)
I
N
T
ER
N
A
T
I
O
NAL
RE
C
T
I
FIER
OR
IR
F
R
120
12 34
L
O
GO
P =
DESI
G
N
A
T
ES LE
A
D-
F
REE
PR
O
D
U
C
T Q
U
A
L
IFIED T
O
T
H
E
CO
N
S
U
M
E
R LE
V
E
L
(
O
P
TI
O
N
A
L
)
AS S
E
M
B L Y
L
O
T CO
D
E
Y
E
A
R 1 =
2
001
W
E
EK 16
A =
A
S S E MB L Y S
I
T E
C
O
D
E
Notes:
9
IRFR/U48ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
P
A
R
T NUMBER
EX
A
M
P
LE: THIS
IS
A
N
I
RFU
1
20
INTERN
A
T
I
O
NAL
W
I
TH
A
S
SE
M
B
LY
D
A
T
E
C
ODE
YE
A
R 1 =
2
001
W
E
EK
1
9
RE
C
T
I
FIER
L
O
GO
IRFU120
119A
78
L
O
T CODE
5
678
AS S E MB L E D ON WW 1
9
, 2001
IN
T
H
E
A
S
SE
M
B
LY LI
N
E “A”
56
L
I
NE A
AS S E MB L Y
L
O
T CODE
Note: “P” in
a
s
s
e
mbly
l
ine po
s
i
t
i
o
n
indic
a
t
e
s
L
e
ad-
F
r
e
e”
OR
P
A
R
T NUMBER
D
A
T
E
C
ODE
P =
D
E
SI
G
N
A
T
ES LE
A
D
-FREE
PR
O
DUCT (OP
T
I
O
NA
L
)
INTERN
A
T
I
O
NAL
RE
C
T
I
F
I
E
R
L
O
GO
IRFU120
56 78
YE
A
R 1 =
2
001
AS S E MB L Y
L
O
T CODE
W
E
EK
1
9
A=
A
S
SE
M
B
LY
SITE
C
ODE
Notes:
10
IRFR/U48ZPbF
D-Pak (TO-252AA)
T
a
pe & Reel Information
Dimensions are shown in millimeters
TR
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
C
oss
eff. is a fixed capacitance that gives the same charging time
Repetitive rating;
pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.11mH
R
G
= 25
Ω
, I
AS
= 37A, V
GS
=10V. Part not
recommended for use above this value.
Pulse width
≤
1.0ms; duty cycle
≤
2%.
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
ꢀ
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1″ square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
R
θ
is measured at T
J
approximately 90°C
Data and specifications subject to change without notice.
This product has been designed
for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
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