Infineon-Technologies-IRFR5305TRLPBF
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PD-95025A
IRFR5305PbF
IRFU5305PbF
HEXFET
®
Power MOSFET
l
Ultra Low On-Resistance
l
Surface Mount (IRFR5305)
l
Straight Lead (IRFU5305)
l
Advanced Process Technology
l
Fas
t
S
witching
D
V
DSS
= -55V
R
DS(on)
= 0.065
Ω
l
Fully Avalanche Rated
l
Lead-Free
G
I
D
= -31A
S
Description
Fift
h
G
eneratio
n
H
EXFET
s
f
ro
m
I
nternationa
l
R
ectifie
r
u
tilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area.
This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET
®
Power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable device
for use in a wide variety of applications.
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
D-Pak
IRFR5305
I-Pak
IRFU5305
Absolute Maximum Ratings
Parameter
Max.
Units
I
D
@ T
C
= 25
°
C
I
D
@ T
C
= 100
°
C
I
DM
Continuous Drain Current, V
GS
@ -10V
Continuous Drain Current, V
GS
@ -10V
Pulsed Drain Curren
t
-31
-22
A
-110
110
0.71
± 20
280
-16
P
D
@T
C
= 25
°
C
Powe
r
D
issipation
W
W/
°
C
V
Linea
r
D
eratin
g
F
actor
V
GS
E
AS
I
AR
Gate-to-Sourc
e
V
oltage
Single Pulse Avalanche Energy
Avalanch
e
C
urrent
mJ
A
E
AR
dv/dt
T
J
Repetitiv
e
A
valanch
e
E
nergy
Peak Diode Recovery dv/dt
Operatin
g
J
unctio
n
a
nd
11
mJ
V/ns
-5.0
-55 to
+ 175
T
STG
Storag
e
T
emperatur
e
R
ange
Solderin
g
T
emperature
,
f
o
r
1
0
s
econds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Therma
l
R
esistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.4
50
Units
R
θ
JC
R
θ
JA
R
θ
JA
Junction-to-Ambien
t
(
PC
B
m
ount)*
Junction-to-Ambient**
–––
°
C/W
–––
110
1
12/13/04
IRFR/U5305PbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-55 –––
–––
Conditions
V
(BR)DSS
Drain-to-Sourc
e
B
reakdow
n
V
oltage
V
V
GS
= 0V, I
D
= -250
µ
A
∆
V
(BR)DSS
/
∆
T
J
Breakdow
n
V
oltag
e
T
emp. Coefficient
––– -0.034
––– V/
°
C Reference
to 25
°
C, I
D
= -1mA
R
DS(on)
V
GS(th)
g
fs
Stati
c
D
rain-to-Sourc
e
O
n-Resistance
Gat
e
T
hreshol
d
V
oltage
–––
––– 0.065
Ω
V
S
V
GS
= -10V, I
D
= -16A
V
DS
= V
GS
, I
D
= -250
µ
A
V
DS
= -25V, I
D
= -16A
-2.0 –––
-4.0
Forwar
d
T
ransconductance
8.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
––– –––
––– -25
––– -250
––– 100
––– -100
V
DS
= -55V, V
GS
= 0V
V
DS
= -44V, V
GS
= 0V, T
J
= 150
°
C
V
GS
= 20V
I
DSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Sourc
e
F
orwar
d
L
eakage
Gate-to-Sourc
e
R
evers
e
L
eakage
Tota
l
G
at
e
C
harge
I
GSS
V
GS
= -20V
Q
g
–––
–––
–––
14
63
13
I
D
= -16A
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Sourc
e
C
harge
Gate-to-Drai
n
(
“Miller”
)
C
harge
Turn-O
n
D
ela
y
T
ime
Rise Time
nC
ns
V
DS
= -44V
29
V
GS
= -10V, See Fig. 6 and 13
V
DD
= -28V
–––
–––
–––
–––
66
I
D
= -16A
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
39
R
G
= 6.8
Ω
63
R
D
= 1.6
Ω,
See Fig. 10
Betwee
n
l
ead,
6m
m
(
0.25in.)
D
4.5
L
D
L
S
Interna
l
D
rai
n
I
nductance
Interna
l
S
ourc
e
I
nductance
–––
–––
–––
–––
nH
pF
G
fro
m
p
ackage
7.5
and center of die contact
ꢀ
V
GS
= 0V
S
C
iss
C
oss
C
rss
Inpu
t
C
apacitance
––– 1200
–––
Outpu
t
C
apacitance
–––
–––
520 –––
250 –––
V
DS
= -25V
Revers
e
T
ransfe
r
C
apacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drai
n
R
ating
s
a
n
d
C
haracteristics
Parameter
Continuou
s
S
ourc
e
C
urrent
(Bod
y
D
iode)
Min. Typ. Max. Units
Conditions
D
I
S
MOSFET symbol
-31
––– –––
showing the
A
G
I
SM
Pulse
d
S
ourc
e
C
urrent
(Body Diode)
integra
l
r
everse
-110
p-n junction diode.
S
V
SD
t
rr
Diod
e
F
orwar
d
V
oltage
Revers
e
R
ecover
y
T
ime
Revers
e
R
ecoveryCharge
––– ––– -1.3
V
T
J
= 25°C, I
S
= -16A, V
GS
= 0V
T
J
= 25°C, I
F
= -16A
–––
71 110
ns
nC
Q
rr
––– 170 250
di/dt = -100A/µs
Notes:
Pulse width
≤
300
µ
s; duty cycle
≤
2%.
Repetitive rating;
pulse width limited by
max. junction temperature. (See Fig. 11)
ꢀ
This is applied for I-PAK, L
S
of D-PAK is measured between
V
DD
= -25V, starting T
J
= 25
°
C, L = 2.1mH
R
G
= 25
Ω
,
I
AS
= -16A. (See Figure 12)
lead and center of die contact.
Uses IRF5305 data and test conditions.
I
SD
≤
-16A, di/dt
≤
-280A/
µ
s, V
DD
≤
V
(BR)DSS
T
J
≤
175
°
C
,
* When mounted on 1″ square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
** Uses typical socket mount.
2
IRFR/U5305PbF
1000
100
10
1000
100
10
VGS
– 15V
– 10V
– 8
.
0
V
– 7
.
0
V
– 6
.
0
V
– 5
.
5
V
– 5
.
0
V
VGS
– 15V
– 10V
– 8.0V
– 7.0V
– 6.0V
– 5.5V
– 5.0V
TOP
TOP
BOTTOM –
4.5V
BOTTOM –
4.5V
-4.5V
-4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T
J
= 175°C
T
J
= 25°C
c
C
A
1
1
A
100
0.1
1
10
100
0.1
1
10
-V ,
Drain-to-Source Voltage (V)
DS
-V ,
Drain-to-Source Voltage (V)
DS
Fig 2.
Typical Output Characteristics
Fig 1.
Typical Output Characteristics
100
2.0
1.5
1.0
0.5
0.0
I
= -27A
D
T
J
= 25°C
T
J
= 175°C
10
V
D
S
= -25V
20µs PULSE WIDTH
V
= -10V
GS
1
10
A
A
4
5
6
7
8
9
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
-V
GS
, Gate-to-Source Voltage (V)
T ,
Junction Temperature (°C)
J
Fig 4.
Normalized On-Resistance
Fig 3.
Typical Transfer Characteristics
Vs. Temperature
3
IRFR/U5305PbF
2500
20
16
12
8
V
C
C
C
= 0V,
f = 1MHz
I
= -16A
D
GS
iss
= C
+ C
,
C
SHORTED
gs
gd
ds
V
V
= -44V
= -28V
DS
DS
= C
rss
oss
gd
= C
+ C
ds
gd
2000
1500
1000
500
0
C
iss
C
oss
rss
C
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
1
10
100
0
10
20
30
40
50
60
-V ,
Drain-to-Source Voltage (V)
Q ,
Total Gate Charge (nC)
DS
G
Fig 6.
Typical Gate Charge Vs.
Fig 5.
Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
100µs
T =
175°C
J
1ms
T =
25°C
J
10ms
T
T
= 25°C
= 175°C
C
J
V
GS
= 0V
Single Pulse
A
10
1
A
100
0.4
0.8
1.2
1.6
2.0
1
10
-V ,
Drain-to-Source Voltage (V)
-V ,
Source-to-Drain Voltage (V)
DS
SD
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRFR/U5305PbF
R
D
V
DS
35
30
25
20
15
10
5
V
GS
D.U.T.
R
G
–
+
V
DD
-10V
Pulse Width
≤ 1
µ
s
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
0
25
50
75
100
125
150
175
°
T ,
Case Temperature
( C)
C
90%
V
DS
Fig 9.
Maximum Drain Current Vs.
Fig 10b.
Switching Time Waveforms
Case Temperature
10
1
D = 0.50
0.20
0.10
0.05
P
2
DM
0.1
t
1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =
t /
t
1
2. Peak T
= P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRFR/U5305PbF
L
V
DS
700
600
500
400
300
200
100
0
I
D
TOP
-6.6A
-11A
BOTTOM -16A
–
+
V
D.U.T
R
G
DD
A
I
AS
DRIVER
-20V
0.01
t
Ω
p
15V
Fig 12a.
Unclamped Inductive Test
Circuit
I
AS
V
= -25V
50
DD
A
175
25
75
100
125
150
Starting T
, Junction Temperature (°C)
J
Fig 12c.
Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b.
Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.
T
.
50K
Ω
Q
G
.2
µ
F
12V
.3
µ
F
-10V
–
V
+
DS
Q
Q
GD
GS
D.U.
T
.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b.
Gate Charge Test Circuit
Fig 13a.
Basic Gate Charge Waveform
6
IRFR/U5305PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circui
t
L
ayou
t
C
onsiderations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
D.U.T
–
+
–
–
+
**
R
G
•
dv/dt controlled by R
G
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
+
–
*
V
DD
V
GS
*
*
Reverse Polarity for P-Channel
*
*
U
s
e
P
-Channe
l
D
rive
r
f
o
r
P
-Channe
l
M
easurements
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple
≤
5%
***
V
GS
= 5.0V for Logic Level and 3V Drive Devices
Fig 14.
For P-Channel HEXFETS
7
IRFR/U5305PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
E
X
AM
P
L
E: THIS
IS AN I
R
FR120
P
A
R
T NUMBER
WITH A
S
SEMBLY
LOT
C
ODE 1234
INTERNATI
O
N
A
L
RECTIF
I
E
R
L
O
GO
DAT E CODE
Y
E
A
R 9 =
1
999
WE E K
1
6
I
R
FU120
916A
A
S
SEMBLED ON
W
W
1
6, 1999
IN THE A
S
SE
M
BLY LINE “A”
12
34
LINE A
Not
e
:
“
P
”
i
n
a
ss emb
l
y line
p
os
i
ti
o
n
A
S
SE
M
BLY
L
O
T CODE
i
n
d
i
c
ates
“
L
e
ad
–
F r
e
e”
OR
P
A
RT NUMBER
D
A
TE
C
ODE
P =
DESIGNATES LEAD-FREE
PRODUCT (OPT
I
ONAL)
INTERNATI
O
NAL
REC
T
I
F
I
ER
L
O
GO
IRFU120
12 34
Y
E
AR 9 =
1999
A
S
SEMBLY
L
O
T CODE
WEEK 16
A =
A
S
SEMBL
Y
S
I
TE
C
ODE
8
IRFR/U5305PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
P
A
R
T NU
M
BER
E
X
AM
P
L
E
:
T
HIS
IS AN IR
F
U120
INTERNATI
O
N
A
L
WIT H AS S EMB LY
DAT E CODE
Y
E
AR 9 =
1
999
WEEK 19
RECTIFIER
LO
G
O
IR
F
U120
919A
78
L
O
T CODE 5678
AS
S
E
M
BLED
O
N
W
W
1
9, 1999
IN T
H
E
A
S
SEMB
L
Y LINE “A”
56
LI
N
E A
AS S E MB LY
LOT
C
ODE
Note:
“
P
”
i
n
a
ssemb
l
y line
pos
i
t
i
o
n
i
n
d
i
c
a
t
e
s
“
L
e
ad-F
r
e
e”
OR
P
A
R
T NU
M
B
ER
DAT E
C
ODE
P =
DES
I
G
N
A
T
E
S LEAD-FREE
PRODUCT (OP
T
I
O
N
AL)
I
N
TERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
Y
E
AR 9 =
1
999
AS S E MB LY
LOT CODE
WEE K
19
A =
A
S S E MB L Y S IT E
C
ODE
9
IRFR/U5305PbF
D-Pak (TO-252AA)
T
a
pe & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
10
Note: For
the most current drawings please refer to the IR website at:
