Infineon-Technologies-IRFR9120NTRPBF
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PD-95020A
IRFR9120NPbF
IRFU9120NPbF
HEXFET
®
Power MOSFET
l
Ultra Low On-Resistance
l
P-Channel
D
V
DSS
= -100V
R
DS(on)
= 0.48
Ω
I
D
= -6.6A
l
Surface Mount (IRFR9120N)
l
Straigh
t
L
ea
d
(
IRFU9120N)
l
Advanced Process Technology
l
Fast Switching
l
Fully Avalanche Rated
l
Lead-Free
G
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low
on-resistance per silicon area.
This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
know
n
f
or, provide
s
t
h
e
d
esigne
r
w
it
h
a
n
e
xtremel
y
e
fficient
and reliable device for use in a wide variety of applications.
D-Pak
I-Pak
TO-251AA
TO-252AA
The D-Pak is designed for surface mounting using vapor
phase, infrared, o
r
w
av
e
s
olderin
g
t
echniques.
Th
e
s
traight
lead version (IRFU series) is for through-hole mounting
applications. Power
dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter
Max.
Units
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
Continuous Drain Current, V
GS
@ -10V
Continuous Drain Current, V
GS
@ -10V
Pulsed Drain Current
-6.6
-4.2
-26
A
P
D
@T
C
= 25°C
Power Dissipation
40
W
W/
°
C
V
Linear Derating Factor
0.32
± 20
100
-6.6
4.0
V
GS
E
A
S
I
AR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
E
AR
dv/dt
T
J
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
mJ
-5.0
V/ns
-55 to
+ 150
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
Max.
3.1
Units
R
θ
JC
R
θ
JA
Junction-to-Ambient (PCB mount)**
Junction-to-Ambient
50
°C/W
R
θ
JA
110
1
12/14/04
IRFR/U9120NPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-100
Conditions
V
GS
= 0V, I
D
= -250µA
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
-0.11
V/°C
Reference to 25°C, I
D
= -1mA
R
DS(on)
V
GS(th)
g
fs
Static Drain-to-Source On-Resistance
0.48
Ω
V
S
V
GS
= -10V, I
D
= -3.9A
V
DS
= V
GS
, I
D
= -250µA
V
DS
= -50V, I
D
= -4.0A
V
DS
= -100V, V
GS
= 0V
V
DS
= -80V, V
GS
= 0V, T
J
= 150°C
V
GS
= 20V
Gate Threshold Voltage
-2.0
-4.0
1.4
Forward Transconductance
-25
-250
100
-100
27
5.0
15
I
D
SS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
I
GSS
V
GS
= -20V
Q
g
I
D
= -4.0A
Q
gs
Q
gd
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
nC V
DS
= -80V
V
GS
= -10V, See Fig. 6 and 13
14
47
28
31
V
DD
= -50V
Ris
e
T
ime
I
D
= -4.0A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fal
l
T
ime
R
G
=
12 Ω
R
D
=12
Ω,
See Fig. 10
Between lead,
6mm (0.25in.)
D
4.5
L
D
L
S
Internal Drain Inductance
Internal Source Inductance
nH
pF
G
from package
7.5
and center of die contact
ꢀ
V
GS
= 0V
S
C
iss
C
oss
C
rss
Input Capacitance
350
110
Output Capacitance
V
DS
= -25V
Reverse Transfer Capacitance
70
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
I
S
-6.6
A
G
I
S
M
Pulsed Source Current
(Body Diode)
integral reverse
-26
p-n junction diode.
S
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
-1.6
100 150
420 630
V
T
J
= 25°C, I
S
= -3.9A, V
GS
= 0V
ns
T
J
= 25°C, I
F
= -4.0A
Q
rr
t
on
nC di/dt
= 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Pulse width
≤
300µs; duty cycle
≤
2%.
Repetitive rating;
pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
J
= 25°C, L = 13mH
ꢀ
This is applied for I-PAK, L
S
of D-PAK is measured between
lead and center of
die contact
R
G
= 25
Ω
, I
AS
= -3.9A. (See Figure 12)
I
SD
≤
-4.0A, di/dt
≤
300A/µs, V
DD
≤
V
(BR)DSS
T
J
≤
150°C
Uses IRF9520N data and test conditions.
,
** When
mounted on 1″ square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
IRFR/U9120NPbF
100
10
1
100
10
1
VGS
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
TOP
BOTTOM -4.5V
BOTTOM -4.5V
-4.5V
20µs PULSE WIDTH
-4.5V
20µs PULSE WIDTH
°
T =
150 C
J
°
T =
25
J
C
0.1
0.1
0.1
0.1
1
10
100
1
10
100
-V ,
Drain-to-Source Voltage (V)
DS
-V ,
Drain-to-Source Voltage (V)
DS
Fig 2.
Typical Output Characteristics
Fig 1.
Typical Output Characteristics
100
2.5
-6.7A
=
I
D
2.0
°
T =
25 C
J
10
1.5
1.0
0.5
0.0
°
T =
150 C
J
1
V
= -50V
DS
20µs PULSE WIDTH
V
=
–
10V
GS
0.1
-60 -40 -20
0
20 40 60 80
100 120 140 160
°
4
5
6
7
8
9
10
T ,
Junction Temperature
( C)
J
-V ,
Gate-to-Source Voltage (V)
GS
Fig 4.
Normalized On-Resistance
Fig 3.
Typical Transfer Characteristics
Vs. Temperature
IRFR/U9120NPbF
20
16
12
8
800
I
D
= -4.0 A
V
= 0V,
f = 1MHz
C
GS
V
V
V
=-80V
=-50V
=-20V
DS
DS
DS
C
= C
+ C
SHORTED
ds
iss
gs
gd ,
gd
C
= C
gd
rss
C
= C
+ C
ds
oss
600
400
200
0
C
iss
C
C
oss
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
5
10
15
20
25
1
10
100
Q ,
Total Gate Charge (nC)
-V ,
Drain-to-Source Voltage (V)
DS
G
Fig 5.
Typical Capacitance Vs.
Fig 6.
Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
100
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T =
150 C
J
10
°
T =
25 C
100us
J
1ms
1
10ms
°
T =
25 C
C
°
T =
150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.1
0.2
1
10
100
1000
0.8
1.4
2.0
2.6
-V ,
Drain-to-Source Voltage (V)
DS
-V ,Source-to-Drain
Voltage (V)
SD
Fig 7.
Typical Source-Drain Diode
Fig 8.
Maximum Safe Operating Area
Forward Voltage
IRFR/U9120NPbF
R
D
8.0
6.0
4.0
2.0
0.0
V
DS
V
GS
D.U.T.
R
G
–
+
V
DD
-10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
25
50
75
100
125
150
°
T ,
Case Temperature
( C)
C
90%
V
DS
Fig 9.
Maximum Drain Current Vs.
Fig 10b.
Switching Time Waveforms
Case Temperature
10
D = 0.50
1
0.20
0.10
0.05
P
2
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D =
t /
t
1
2. Peak T
=
P
J
x Z
+ T
thJC C
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFR/U9120NPbF
L
V
DS
250
200
150
100
50
I
D
TOP
-1.7A
-2.5A
BOTTOM -3.9A
D.U.T
AS
–
+
R
G
V
DD
A
I
DRIVER
-20V
0.01
Ω
t
p
15V
Fig 12a.
Unclamped Inductive Test Circuit
I
AS
0
25
50
75
100
125
150
°
Starting T
, Junction Temperature
( C)
J
Fig 12c.
Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b.
Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.
T
.
50K
Ω
Q
G
.2
µ
F
12V
.3
µ
F
-10V
–
V
+
DS
Q
Q
GD
GS
D.U.
T
.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b.
Gate Charge Test Circuit
Fig 13a.
Basic Gate Charge Waveform
IRFR/U9120NPbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
D.U.T
*
–
+
–
–
+
R
G
•
dv/dt controlled by R
G
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
+
–
V
DD
V
GS
*
Reverse Polarity
of D.U.T for P-Channel
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
[
DD
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple
≤
5%
***
V
GS
= 5.0V for Logic Level and 3V Drive Devices
Fig 14.
For P-Channel HEXFETS
IRFR/U9120NPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
E
X
AM
P
L
E
: THIS
IS AN IRFR
1
20
P
A
RT NUMBER
WIT H AS S EMBL Y
L
O
T CODE 1234
INTERNATION
A
L
RECTIFIER
LOGO
D
A
T E
C
ODE
Y
E
A
R 9 =
1
999
WE E K
1
6
IR
F
U
1
20
916A
A
S
SE
M
BLED ON W
W
1
6, 1999
IN THE A
S
SE
M
BLY
LINE “A”
12
34
LINE A
Not
e
:
“
P
” in
a
ssemb
l
y line p
o
s
i
t
ion
AS S E MB L Y
L
O
T CODE
ind
i
c
a
t
e
s
“
L
e
ad-F ree”
OR
P
A
R
T NUMBER
DATE
C
ODE
P =
DESIGN
A
T
E
S LEAD-FREE
P
R
ODUCT (OP
T
I
O
N
A
L)
INTERN
A
TI
O
N
A
L
RECTIFIER
L
O
GO
IRFU120
12 34
Y
E
AR 9 =
1
999
AS S E MB L Y
LOT CODE
WEE K
1
6
A=
A
S
SE
M
B
L
Y
S
I
TE
CODE
IRFR/U9120NPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
P
A
RT NUMBER
E
X
AM
P
L
E: THIS
IS AN IRFU120
INTERNATI
O
N
AL
WIT H AS S E MBL Y
D
A
TE
C
ODE
Y
E
A
R 9 =
1
999
WEEK 19
RECTIFIER
L
O
GO
IR
F
U120
919A
78
LOT
C
ODE 5678
A
S
S EMBLED
ON WW 19, 1999
IN T
H
E
A
S
S
E
MBLY
LINE “A”
56
LI
N
E A
AS S E MB L Y
LOT
C
ODE
N
o
t
e
:
“
P
”
i
n
a
ssemb
l
y line
pos
i
t
i
o
n
i nd
i
c
ates
“
L
e
ad-F
r
e
e”
OR
P
A
RT NUMBER
D
A
T E
C
O
D
E
P =
DE S
I
G
N
AT E S
L E AD-F R E E
PRODUCT (OP
T
I
O
N
A
L)
I
N
TERNATIONAL
RECTIFIER
L
O
GO
IRFU
1
20
56 78
Y
E
AR 9 =
1
999
AS S E MB LY
L
O
T CO
D
E
WE EK
19
A =
A
S S E MB L Y S IT E
C
O
D
E
IRFR/U9120NPbF
D-Pak (TO-252AA)
T
a
pe & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING
DIMENSION : MILLIMETER.
2. ALL
DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE
CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Note: For
the most current drawings please refer to the IR website at:
