Infineon-Technologies-IRFZ44NSTRLPBF
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PD – 95124
IRFZ44NSPbF
l
Advance
d
P
roces
s
T
echnology
l
Surfac
e
M
oun
t
(
IRFZ44NS)
l
Low-profil
e
t
hrough-hol
e
(
IRFZ44NL)
l
175°
C
O
peratin
g
T
emperature
l
Fast Switching
IRFZ44NLPbF
HEXFET
®
Power MOSFET
D
V
DSS
= 55V
l
Full
y
A
valanch
e
R
ated
l
Lead-Free
R
DS(on)
= 0ꢀ0175
Ω
G
Description
Advanced HEXFET
®
Power MOSFETs from International
Rectifie
r
u
tiliz
e
a
dvance
d
p
rocessin
g
t
echnique
s
t
o
a
chieve
extremely low on-resistance per silicon area& This benefit,
combined with the fast switching speed and ruggedized
devic
e
d
esig
n
t
ha
t
H
EXFE
T
p
owe
r
M
OSFET
s
a
r
e
w
el
l
k
nown
for, provides the designer with an extremely efficient and
reliable device for use in a wide variety of applications&
I
D
= 49A
S
The D
2
Pak is a surface mount power package capable of
accommodatin
g
d
i
e
s
ize
s
u
p
t
o
H
EX-4
&
I
t
p
rovide
s
t
h
e
h
ighest
power capability and the lowest possible on-resistance in
an
y
e
xistin
g
s
urfac
e
m
oun
t
p
ackage
&
T
h
e
D
2
Pa
k
i
s
s
uitable
for high current applications because of its low internal
connection resistance and can dissipate up to 2&0W in a
typica
l
s
urfac
e
m
oun
t
a
pplication&
2
TO-262
D
Pak
The through-hole version (IRFZ44NL) is available for low-
profil
e
a
pplications&
Absolute Maximum Ratings
Parameter
Max.
49
35
160
3.8
94
Units
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
A
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
Power Dissipation
W
W
Power Dissipation
Linear Derating Factor
0.63
± 20
25
W/°C
V
V
GS
I
AR
Gate-to-Source Voltage
Avalanche Current
A
E
AR
dv/dt
T
J
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
9.4
5.0
mJ
V/ns
-55 to
+ 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.5
Units
R
θ
JC
R
θ
JA
Junction-to-Ambient
–––
40
°C/W
1
3/18/04
IRFZ44NS/LPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 –––
–––
Conditions
V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆
V
(BR)DSS
/
∆
T
J
Breakdown Voltage Temp. Coefficient
––– 0.058
––– V/°C
Reference to 25°C, I
D
= 1mA
R
DS(on)
V
GS(th)
g
fs
Static Drain-to-Source On-Resistance
––– –––
17.5 m
Ω
V
GS
= 10V, I
D
= 25A
Gate Threshold Voltage
2.0
––– 4.0
V
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 25V, I
D
= 25A
V
DS
= 55V, V
GS
= 0V
Forward Transconductance
19
––– –––
S
––– ––– 25
––– –––
250
––– –––
100
––– –––
-100
––– ––– 63
––– ––– 14
––– ––– 23
I
DSS
Drain-to-Source Leakage Current
µA
nA
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
V
GS
= 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
I
GSS
V
GS
= -20V
Q
g
Q
gs
Q
gd
t
d(on)
t
r
I
D
= 25A
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Turn-On Delay Time
Rise Time
nC V
DS
= 44V
V
GS
= 10V, See Fig. 6 and 13
–––
–––
–––
–––
–––
12 –––
60 –––
44 –––
45 –––
7.5 –––
V
DD
= 28V
I
D
= 25A
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
R
G
= 12
Ω
V
GS
= 10V, See Fig. 10
L
S
Internal Source Inductance
nH Between
lead,
and center of die contact
C
iss
C
oss
C
rss
E
AS
Input Capacitance
––– 1470
–––
––– 360
–––
V
GS
= 0V
Output Capacitance
V
DS
= 25V
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
–––
88 –––
pF ƒ
= 1.0MHz, See Fig. 5
––– 530
ꢀ
150
mJ I
AS
= 25A, L = 0.47mH
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
S
I
S
49
––– –––
showing the
A
G
I
SM
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
integral reverse
p-n junction diode.
––– –––
160
––– ––– 1.3
V
SD
t
rr
V
T
J
= 25°C, I
S
= 25A, V
GS
= 0V
T
J
= 25°C, I
F
= 25A
––– 63
––– 170 260
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
95
ns
Q
r
r
t
on
nC di/dt
= 100A/µs
Notes:
Repetitive rating;
pulse width limited by
I
SD
≤
25A
,
di/d
t
≤
230A/µs, V
DD
≤
V
(BR)DSS
T
J
≤
175°C
,
max. junction temperature. (See fig. 11)
Pulse width
≤
400µs; duty cycle
≤
2%.
ꢀ
This is a typical value at device destruction and represents
operation outside rated limits.
Starting T
J
= 25°C, L = 0.48mH
R
G
= 25
Ω
, I
AS
= 25A. (See Figure 12)
This is a calculated value limited to T
J
= 175°C .
** When mounted on 1″ square PCB (FR-4 or G-10 Material )#
For recommended footprint and soldering techniques refer to application note ꢀAN-994#
2
IRFZ44NS/LPbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8
.
0
V
7
.
0
V
6
.
0
V
5
.
5
V
5
.
0
V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T =
25°C
T =
175°C
J
J
A
1
0.1
1
0.1
A
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1ꢀ
Typical Output Characteristics
Fig 2ꢀ
Typical Output Characteristics
2.5
1000
100
10
I
= 41A
D
2.0
1.5
1.0
0.5
0.0
T =
25°C
J
T =
175°C
J
V
DS
= 25V
20µs PULSE WIDTH
V
= 10V
GS
1
A
1
0
A
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
4
5
6
7
8
9
T ,
Junction Temperature (°C)
V
GS
, Gate-to-Source Voltage (V)
J
Fig 3ꢀ
Typical Transfer Characteristics
Fig 4ꢀ
Normalized On-Resistance
Vs0 Temperature
3
IRFZ44NS/LPbF
20
16
12
8
2500
I
= 25A
V
C
C
C
= 0V,
f = 1MHz
D
GS
iss
rss
oss
= C
+ C
,
C
SHORTED
V
V
= 44V
= 28V
gs
gd
gd
ds
DS
DS
= C
= C
+ C
ds
gd
2000
1500
1000
500
0
C
C
iss
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
0
10
20
30
40
50
60
70
1
10
100
V
, Drain-to-Source Voltage (V)
Q ,
Total Gate Charge (nC)
G
DS
Fig 6ꢀ
Typical Gate Charge Vs0
Fig 5ꢀ
Typical Capacitance Vs0
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
10µs
100
10
1
T =
175°C
J
100µs
T =
25°C
J
1ms
10ms
T
T
= 25°C
= 175°C
C
J
Single Pulse
V
= 0V
GS
A
A
1
10
100
0.5
1.0
1.5
2.0
2.5
3.0
V
, Drain-to-Source Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 7ꢀ
Typical Source-Drain Diode
Fig 8ꢀ
Maximum Safe Operating Area
Forward Voltage
4
IRFZ44NS/LPbF
R
D
V
DS
V
GS
50
40
30
20
10
0
D#U#T#
R
G
+
V
DD
–
10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10aꢀ
Switching Time Test Circuit
V
DS
90%
10%
25
50
75
100
125
150
175
V
°
GS
T ,
Case Temperature
( C)
C
t
t
r
t
t
f
d(on)
d(off)
Fig 9ꢀ
Maximum Drain Current Vs0
Fig 10bꢀ
Switching Time Waveforms
Case Temperature
10
1
D = 0.50
0.20
0.10
P
2
DM
0.05
0.1
t
1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D = t
/ t
1
2. Peak T
=
P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t ,
Rectangular Pulse Duration (sec)
1
Fi
g
1
1ꢀ
Maximu
m
E
ffectiv
e
T
ransien
t
T
herma
l
I
mpedance
,
J
unction-to-Case
5
IRFZ44NS/LPbF
500
400
300
200
100
0
I
D
L
TOP
10A
18A
BOTTOM 25A
V
DS
D.U.
T
.
R
+
–
G
V
DD
I
1
0
V
AS
t
p
0.01
Ω
Fig 12aꢀ
Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
= 25V
50
DD
A
175
25
75
100
125
150
V
DD
Starting T
, Junction Temperature (°C)
J
V
DS
Fig 12cꢀ
Maximum Avalanche Energy
I
AS
Vs0 Drain Current
Fi
g
1
2bꢀ
Unclampe
d
I
nductiv
e
W
aveforms
Current Regulator
Same Type as D.U.
T
.
50K
Ω
.2
µ
F
12V
Q
Q
G
.3
µ
F
1ꢀ V
+
V
DS
Q
D.U.
T
.
–
GS
GD
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13bꢀ
Gate Charge Test Circuit
Fig 13aꢀ
Basic Gate Charge Waveform
6
IRFZ44NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
–
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
DꢀUꢀT
+
–
–
+
R
G
•
dv/dt controlled by R
G
+
–
•
Driver same type as D#U#T#
•
I
SD
controlled by Duty Factor “D”
•
D#U#T# – Device Under Test
V
DD
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple
≤
5%
*
V
GS
= 5V for Logic Level Devices
Fi
g
1
4ꢀ
Fo
r
N
-Channe
l
H
EXFETS
7
IRFZ44NS/LPbF
D
2
Pak Package Outline
Dimensions are shown in millimeters (inches)
D
2
Pak Part Marking Information (Lead-Free)
T H IS
IS AN IR
F
5
30S
WIT H
P AR T
N U
M
B E R
L
O
T
COD E
8024
IN T E R N AT ION AL
R E CT IF IE R
L
O
GO
AS S E
M
B L E D
ON WW 02, 2000
IN T
H E
AS S E MB L Y
L IN E
“L ”
F
5
30S
D AT E
CODE
Y E AR
0 =
2
000
W E E K
0
2
N ote:
“P “
in as
s embly
line
pos ition
indicates “L
ead-F ree”
AS S E
M
B L Y
L
O
T
COD E
L INE
L
OR
P
A
R T
N U MB E R
IN T E R N AT ION AL
R E
C
T IF IE R
L
O
GO
F
5
30S
D
A
T E
COD E
P
=
D E S I
G
N
A
T E S
L E AD -F R E E
P R
O
D U CT
(OP T ION AL )
AS S E
M
B L Y
L
O
T
COD E
YE AR
W E E K
0
2
A =
AS S E
M
B L Y
S IT E
COD E
0 =
2
000
8
IRFZ44NS/LPbF
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
E XAM
P
LE :
THIS IS
A
N
I
RL3
1
03L
L
O
T CODE 1789
P
A
R
T NU
M
B
ER
IN
T
ER
N
A
T
I
O
NAL
RE
C
T
IFIER
A
S
SE
M
B
LED
O
N WW
1
9, 1997
IN
T
HE
A
S
SE
M
B
LY LINE “
C
”
L
O
GO
DA
T
E
C
O
D
E
YE
A
R 7 =
1
997
W
E
EK
1
9
Note: “P” in
a
s
s
e
mb
l
y line
pos
i
t
i
o
n
i
n
d
i
c
ates
“
L
e
ad
–
F
r
e
e”
AS S E M
B
L Y
L
O
T CO
D
E
LINE C
OR
P
A
R
T NU
M
B
ER
D
A
T
E
C
O
D
E
IN
T
ER
N
A
T
I
O
N
AL
RE
C
T
I
F
I
E
R
L
O
GO
P =
DE
S
I
G
NA
T
ES LE
A
D
–
F
REE
PR
O
DUCT (O
P
TI
O
NA
L
)
Y
E
A
R 7 =
1
997
A
S
SE
M
B
LY
L
O
T CO
D
E
WE
E
K
1
9
A=
A
S
SE
M
B
LY
S
I
TE
C
O
D
E
9
IRFZ44NS/LPbF
D
2
Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS
TO EIA-418.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
MEASURED @ HUB.
4. INCLUDES
FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
10
Note: For
the most current drawings please refer to the IR website at:
