Infineon-Technologies-IRL2203NSTRLPBF
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PD – 95219A
IRL2203NSPbF
IRL2203NLPbF
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Dynamic dv/dt Rating
l
175°C Operating Temperature
l
Fast Switching
HEXFET
®
Power MOSFET
D
V
DSS
= 30V
l
Fully Avalanche Rated
l
100% R
G
Tested
R
DS(on)
= 7.0m
Ω
G
l
Lead-Free
I
D
= 116A
S
Description
Advanced HEXFET
®
Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve extremely low on-
resistanc
e
p
e
r
s
ilico
n
a
rea
.
T
hi
s
b
enefit
,
c
ombine
d
w
it
h
t
h
e
f
as
t
s
witching
speed and ruggedized device design that HEXFET power MOSFETs
are well known for, provides the designer with an extremely efficient and
reliable device for use in a wide variety of applications.
The D
2
Pak is a surface mount power package capable of accommodating
di
e
s
ize
s
u
p
t
o
H
EX-4
.
I
t
p
rovide
s
t
h
e
h
ighes
t
p
owe
r
c
apabilit
y
a
n
d
t
h
e
l
owest
possible on-resistance in any existing surface mount package. The D
2
Pak
i
s
s
uitabl
e
f
o
r
h
ig
h
c
urren
t
a
pplication
s
b
ecaus
e
o
f
i
t
s
l
o
w
i
nterna
l
c
onnection
resistanc
e
a
n
d
c
a
n
d
issipat
e
u
p
t
o
2
.0
W
i
n
a
t
ypica
l
s
urfac
e
m
oun
t
a
pplication.
Th
e
t
hrough-hol
e
v
ersio
n
(
IRL2203NL
)
i
s
a
vailabl
e
f
o
r
l
ow-profil
e
a
pplications.
D
2
Pak
IRL2203NSPbF
TO-262
IRL2203NLPbF
Absolute Maximum Ratings
Symbol
Parameter
Max
Units
Continuous Drain Current, V
GS
@ 10V
116
I
I
I
@ T
C
= 25°C
D
D
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
@ T
C
= 100°C
82
400
3.8
180
A
DM
P
P
@T
A
= 25°C
@T
C
= 25°C
Power Dissipation
Power Dissipation
W
W
D
D
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
1.2
± 16
W/°C
V
V
GS
I
AR
60
18
A
Repetitive Avalanche Energy
E
AR
mJ
dv/dt
Peak Diode Recovery dv/dt
Operating Junction and
5.0
V/ns
T
-55 to
+ 175
J
°C
Storage Temperature Range
T
STG
Soldering Temperature, for 10 seconds
300 (1.6mm from case)
Thermal Resistance
Symbol
Parameter
Typ
–––
–––
Max
0.85
40
Units
Junction-to-Case
R
θ
R
θ
JC
°C/W
Junction-to-Ambient (PCB mount, steady state)
JA
1
10/01/10
IRL2203NS/LPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min Typ Max
Units
30 –––
–––
––– 0.029 ––– V/°C
Reference to 25°C, I
D
= 1mA
Conditions
V
GS
= 0V, I
D
= 250µA
V
V
/ T
∆
J
∆
Breakdown Voltage Temp. Coefficient
(BR)DSS
–––
–––
1.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
11
7.0
10
V
GS
= 10V, I
D
= 60A
V
GS
= 4.5V, I
D
= 48A
V
DS
= V
GS
, I
D
= 250µA
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
g
fs
Gate Threshold Voltage
3.0
–––
25
V
S
Forward Transconductance
Drain-to-Source Leakage Current
73
V
V
V
DS
= 25V, I
D
= 60A
I
DSS
–––
–––
–––
–––
–––
–––
–––
0.2
DS
= 30V, V
GS
= 0V
µA
nA
250
100
-100
60
DS
= 24V, V
GS
= 0V, T
J
= 125°C
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
V
GS
= 16V
GS
= -16V
I
D
= 60A
DS
= 24V
V
GS
= 4.5V, See Fig. 6 and 13
V
Q
g
Q
gs
Q
gd
R
G
t
d(on)
t
r
Gate-to-Source Charge
Gate-to-Drain (“Miller”) Charge
Gate Resistance
14
V
nC
33
3.0
–––
–––
–––
–––
Ω
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
V
DD
= 15V
D
= 60A
R
G
= 1.8
160
23
I
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
Ω
66
V
GS
= 4.5V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
L
D
L
S
Internal Drain Inductance
Internal Source Inductance
–––
–––
4.5
7.5
–––
–––
Nh
pF
and center of die contact
V
GS
= 0V
C
iss
C
oss
C
rss
E
AS
Input Capacitance
Output Capacitance
––– 3290 –––
––– 1270 –––
V
DS
= 25V
ƒ = 1.0MHz, See Fig. 5
mJ I
AS
= 60A, L = 0.16mH
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
–––
–––
170
1320 290
–––
Source-Drain Ratings and Characteristics
Symbol
Parameter
Continuous Source Current
Min Typ Max
Units
Conditions
MOSFET symbol
I
I
S
–––
––– 116
(Body Diode)
A
showing the
Pulsed Source Current
integral reverse
SM
–––
–––
400
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
56
1.2
84
V
T =
25°C, I
= 60A, V
= 0V
SD
J
S
GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T
= 25°C, I
= 60A
J F
rr
di/dt = 100A/µs
Q
t
110
170
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
Notes:
ꢀ
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T
J
= 175°C .
Repetitive rating;
pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
J
= 25°C, L = 0.16mH R
G
= 25
Ω
,
I
AS
= 60A, V
GS
=10V (See Figure 12)
I
SD
≤
60A
,
di/d
t
≤
110A/µs, V
DD
≤
V
(BR)DSS
T
J
≤
175°C
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
,
When mounted on 1″ square PCB (FR-4 or G-10 Material).
For
recommended footprint and soldering techniques refer to
application note #AN-994.
Pulse width
≤
400µs; duty cycle
≤
2%.
R
θ
is measured at T
J
approximately 90°C
2
IRL2203NS/LPbF
1000
100
10
1000
100
10
VGS
VGS
15V
TOP
TOP
15V
10V
10V
4.5V
4.5V
3.7V
3.5V
3.3V
3.0V
3.7V
3.5V
3.3V
3.0V
BOTTOM 2.7V
BOTTOM 2.7V
2.7V
2.7V
20µs PULSE WIDTH
20µs PULSE WIDTH
°
°
T =
175 C
J
T =
25 C
J
1
0.1
1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
2.5
100A
=
I
D
°
T =
25 C
2.0
1.5
1.0
0.5
0.0
J
°
T =
175 C
J
100
V
= 15V
DS
V
=
1
0V
GS
20µs PULSE WIDTH
10
2.0
-60 -40 -20
0
20 40 60 80
100 120 140 160 180
°
3.0
4.0
5.0 6.0 7.0
T ,
Junction Temperature (
C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
3
IRL2203NS/LPbF
15
12
9
6000
I
D
= 60A
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
C
= C
+ C
iss
gs
gd ,
C
= C
V
V
= 24V
= 15V
rss
gd
DS
DS
5000
4000
3000
2000
1000
0
C
= C
+ C
oss
ds
gd
C
iss
6
C
oss
3
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
0
1
10
100
0
20
40
60
80
V
, Drain-to-Source Voltage (V)
Q ,
Total Gate Charge (nC)
DS
G
Fig 6.
Typical Gate Charge Vs.
Fig 5.
Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
10
1
°
T =
175 C
J
100µsec
1msec
°
T =
25 C
J
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
2.0
0.1
0.0
1
0.4
0.8
1.2
1.6
2.4
1
10
, Drain-toSource Voltage (V)
100
V
,Source-to-Drain Voltage (V)
SD
V
DS
Fig 8.
Maximum Safe Operating Area
Fig 7.
Typical Source-Drain Diode
Forward Voltage
4
IRL2203NS/LPbF
120
100
80
60
40
20
0
R
D
V
DS
LIMITED BY PACKAGE
V
GS
D.U.T.
R
G
+
V
DD
–
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T ,
Case Temperature
( C)
C
10%
V
GS
Fig 9.
Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b.
Switching Time Waveforms
1
D = 0.50
0.20
0.10
0.05
0.1
P
2
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t
1
t
2
Notes:
1. Duty factor D =
t /
t
1
2. Peak T
=
P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t ,
Rectangular Pulse Duration (sec)
1
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
IRL2203NS/LPbF
600
500
400
300
200
100
0
I
15V
D
TOP
24A
42A
BOTTOM 60A
DRIVER
L
V
DS
D.U.T
AS
R
G
+
–
V
DD
I
A
V
GS
Ω
0.01
t
p
Fig 12a.
Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T
, Junction Temperature (
C)
J
Fig 12c.
Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b.
Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.
T
.
50K
Ω
.2
µ
F
12V
.3
µ
F
Q
G
+
V
GS
V
DS
D.U.
T
.
–
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b.
Gate Charge Test Circuit
Fig 13a.
Basic Gate Charge Waveform
6
IRL2203NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
–
Circuit Layout Considerations
•
Low Stray Inductance
•
Ground Plane
•
Low Leakage Inductance
Current Transformer
D.U.T
*
+
–
–
+
R
G
•
dv/dt controlled by R
G
•
I
SD
controlled by Duty Factor “D”
•
D.U.T. – Device Under Test
+
–
V
DD
V
GS
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P
.
W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.
T
. I
W
aveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.
T
. V
W
aveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple
≤
5%
***
V
GS
= 5.0V for Logic Level and 3V Drive Devices
Fig 14.
For N-channel
HEXFET
®
power MOSFETs
7
IRL2203NS/LPbF
D
2
Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D
2
Pak (TO-263AB) Part Marking Information
THIS IS
A
N
I
RF530S
W
I
T
H
P
A
R
T NU
M
B
ER
L
O
T CODE 8024
IN
T
ER
N
A
T
I
O
NAL
RE
C
T
IFIER
L
O
GO
A
S
SE
M
B
LED
O
N WW 02, 2000
IN
T
H
E
A
S
SE
M
B
LY LINE “L”
F
5
30S
DA
T
E
C
O
D
E
YE
A
R 0 =
2000
W
E
E K
0
2
A
S
SE
M
B
LY
L
O
T CO
D
E
L
I
NE L
OR
P
A
R
T
N
U
M
B
ER
IN
T
ER
N
A
T
I
ON
A
L
RE
C
T
I
FIER
L
O
GO
F530S
DAT E
CODE
P =
DE
S
I
G
NA
T
ES LE
A
D –
F
REE
PR
O
D
U
C
T (O
P
TI
O
NA
L
)
Y
E
A
R 0 =
2
000
AS S E MB
L
Y
L
O
T CODE
WE E K
0
2
A =
A
S S E MB L Y S
I
T E
CODE
Notes:
8
IRL2203NS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E
X
A
M
P
LE: THIS
IS
A
N
I
RL
3
103L
L
O
T CODE 1789
P
A
R
T N
U
M
B
ER
IN
T
ERN
A
T
I
O
NAL
RE
C
T
I
FIER
L
O
GO
A
S
SE
M
B
LED
O
N WW
1
9, 1997
IN
T
H
E
A
S
SE
M
B
LY LINE
“
C”
DAT E
CO
D
E
Y
E
A
R 7 =
1
997
WE E K
1
9
AS S
E
M
B
L Y
L
O
T CODE
LINE C
OR
P
A
R
T NU
M
B
ER
IN
T
ERN
A
T
I
O
N
A
L
RE
C
T
I
FIER
L
O
GO
D
A
T
E
C
ODE
P =
D
E
SI
G
N
A
T
ES LE
A
D
–
FREE
PR
O
D
U
C
T (O
P
T
I
O
NA
L
)
YE
A
R 7 =
1997
AS S
E
M
B
L Y
L
O
T CO
D
E
W
E
E K
1
9
A =
A
S S
E
M
B
L Y S IT E
C
ODE
Notes:
9
IRL2203NS/LPbF
D
2
Pak
T
a
pe & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS
TO EIA-418.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
MEASURED @ HUB.
26.40 (1.039)
24.40 (.961)
4
3
4. INCLUDES
FLANGE DISTORTION @ OUTER EDGE.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
10
