Infineon-Technologies-SPB17N80C3
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SPB17N80C3
CoolMOS
®
Power Transistor
Features
Product Summary
V
DS
800
0.29
91
V
• new revolutionary high voltage technology
• Extreme dv/dt rated
R
DS(on)max
@ T
j
= 25°C
Ω
Q
g,typ
nC
• High peak current capability
• Qualified according to JEDEC
1)
for target applications
• Pb-free lead plating; RoHS compliant
• Ultra low gate charge
PG-TO263
• Ultra low effective capacitances
CoolMOS
TM
800V designed for:
• Industrial application with high DC bulk voltage
• Switching Application (i.e. active clamp forward)
Type
Package
Marking
SPB17N80C3
PG-TO263
17N80C3
Maximum ratings,
at
T
j
=25 °C, unless otherwise specified
Value
Parameter
Symbol Conditions
Unit
I
D
T
C
=25 °C
T
C
=100 °C
T
C
=25 °C
17
11
Continuous drain current
A
Pulsed drain current
2)
51
I
D,pulse
E
AS
I
D
=3.4 A,
V
DD
=50 V
I
D
=17 A,
V
DD
=50 V
Avalanche energy, single pulse
Avalanche energy, repetitive
t
AR
670
0.5
mJ
2),3)
2),3)
E
AR
I
AR
17
A
Avalanche current, repetitive
t
AR
MOSFET d
v
/d
t
ruggedness
Gate source voltage
V
DS
=0…640 V
50
d
v
/d
t
V
GS
V/ns
V
±20
±30
227
-55 … 150
static
AC (
f
>1 Hz)
T
C
=25 °C
P
tot
Power dissipation
W
T
j
,
T
stg
Operating and storage temperature
°C
Rev. 2.
5
page 1
20
11
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9
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7
SPB17N80C3
Maximum ratings,
at
T
j
=25 °C, unless otherwise specified
Value
17
Parameter
Symbol Conditions
Unit
I
S
Continuous diode forward current
Diode pulse current
2)
Reverse diode d
v
/d
t
4)
A
T
C
=25 °C
I
S,pulse
51
d
v
/d
t
4
V/ns
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Thermal characteristics
R
thJC
Thermal resistance, junction – case
–
–
–
–
0.55 K/W
62
SMD version, device
R
thJA
on PCB, minimal
footprint
Thermal resistance, junction –
ambient
SMD version, device
on PCB, 6 cm
2
cooling
area
4)
–
–
35
–
–
Soldering temperature,
reflow soldering
T
sold
MSL1; 10s
260 °C
Electrical characteristics,
at
T
j
=25 °C, unless otherwise specified
Static characteristics
V
(BR)DSS
V
(BR)DS
V
V
GS
=0 V,
I
D
=250 µA
GS
=0 V,
I
D
=17 A
Drain-source breakdown voltage
Avalanche breakdown voltage
800
–
–
–
–
V
870
V
GS(th)
V
DS
=
V
GS
,
I
D
=1.0 mA
Gate threshold voltage
2.1
3
–
3.9
25
–
V
DS
=800 V,
V
GS
=0 V,
I
DSS
Zero gate voltage drain current
–
–
µA
T
j
=25 °C
V
DS
=800 V,
V
GS
=0 V,
150
T
j
=150 °C
I
GSS
V
V
GS
=20 V,
V
DS
=0 V
GS
=10 V,
I
D
=11 A,
Gate-source leakage current
–
–
–
100 nA
R
DS(on)
Drain-source on-state resistance
0.25
0.29
Ω
T
j
=25 °C
V
GS
=10 V,
I
D
=11 A,
–
–
0.67
0.85
–
T
j
=150 °C
R
G
Gate resistance
f
=1 MHz, open drain
–
Ω
Rev. 2.
5
page 2
20
11
-0
9
-2
7
SPB17N80C3
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Dynamic characteristics
C
iss
Input capacitance
Output capacitance
–
–
2300
94
–
–
pF
V
GS
=0 V,
V
DS
=100 V,
f
=1 MHz
C
oss
Effective output capacitance, energy
related
6)
C
o(er)
–
–
72
–
–
V
GS
=0 V,
V
DS
=0 V
to 480 V
Effective output capacitance, time
related
7)
C
o(tr)
210
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
–
–
–
–
25
15
72
12
–
–
–
–
ns
V
V
DD
=400 V,
GS
=0/10 V,
I
D
=17 A,
R
G
=4.7
Ω,
T
j
= 125°C
Turn-off delay time
Fall time
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Q
gs
–
–
–
–
12
45
88
5.5
–
nC
Q
gd
–
117
–
V
V
DD
=640 V,
I
D
=17 A,
GS
=0 to 10 V
Q
g
V
plateau
Gate plateau voltage
V
V
Reverse Diode
V
GS
=0 V,
I
F
=I
S
,
V
SD
Diode forward voltage
–
1
1.2
T
j
=25 °C
t
rr
Reverse recovery time
–
–
–
550
15
–
–
–
ns
µC
A
V
R
=400 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/µs
Q
rr
I
rrm
Reverse recovery charge
Peak reverse recovery current
1)
J-STD20 and JESD22
51
2)
Pulse width
t
p
limited by
T
j,max
3)
Repetitive avalanche causes additional power losses that can be calculated as
P
AV
=
E
AR
*
f.
4)
I
SD
≤
I
D
, di/dt
≤
200A/µs, V
DClink
= 400V,
V
peak
<V
(BR)DSS
, T
j
<T
jmax
, identical low side and high side switch
5)
Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain connection. PCB
is vertical without blown air
6)
C
o(er)
is a fixed capacitance that gives the same stored energy a
s
C
oss
while
V
DS
is rising from 0 to 80%
V
DSS.
7)
C
o(tr)
is a fixed capacitance that gives the same charging time a
s
C
oss
while
V
DS
is rising from 0 to 80%
V
DSS.
Rev. 2.
5
page 3
20
11
-0
9
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7
SPB17N80C3
1 Power dissipation
2 Safe operating area
I
D
=f(
V
DS
);
T
C
=25 °C;
D
=0
parameter:
t
p
P
tot
=f(
T
C
)
10
2
240
200
160
120
80
limited by on-state
resistance
1 µs
10 µs
10
1
100 µs
1 ms
DC
10 ms
10
0
40
10
-1
0
0
1
10
100
1000
25
50
75
100
125
150
T
C
[°C]
V
DS
[V]
3 Max. transient thermal impedance
thJC
=f(t
P
)
4 Typ. output characteristics
I
D
=f(
V
DS
);
T
j
=25 °C
Z
parameter:
D=t
p
/
T
parameter:
V
GS
10
0
60
50
40
30
20
10
0
20 V
10 V
0.5
0.2
10
-1
0.1
6.5 V
6 V
0.05
0.02
0.01
5.5 V
5 V
single pulse
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
0
5
10
15
20
25
t
p
[s]
V
DS
[V]
Rev. 2.
5
page 4
20
11
-0
9
-2
7
SPB17N80C3
5 Typ. output characteristics
I
D
=f(
V
DS
);
T
j
=150 °C
parameter:
V
GS
6 Typ. drain-source on-state resistance
DS(on)
=f(
I
D
);
T
j
=150 °C
R
parameter:
V
GS
35
30
25
20
1.4
20 V
1.3
1.2
1.1
1
10 V
6 V
10 V
5.5 V
15
6.5 V
0.9
0.8
5 V
6 V
10
4.5 V
5
5.5 V
5 V
4.5 V
4 V
0.7
0.6
0
0
5
10
V
15
DS
[V]
20
25
0
10
20
30
40
50
I
D
[A]
7 Drain-source on-state resistance
8 Typ. transfer characteristics
I
D
=f(
V
GS
); |
V
DS
|>2|
I
D
|
R
DS(on)max
parameter:
T
j
R
DS(on)
=f(
T
j
);
I
D
=11 A;
V
GS
=10 V
0.8
60
50
40
30
20
10
0
25 °C
0.6
150 °C
0.4
98 %
typ
0.2
0
-60
-20
20
60
100
140
180
0
2
4
6
8
10
T
j
[°C]
V
GS
[V]
Rev. 2.
5
page 5
20
11
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9
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7
SPB17N80C3
9 Typ. gate charge
GS
=f(
Q
gate
);
I
D
=17 A pulsed
10 Forward characteristics of reverse diode
I
F
=f(
V
SD
V
)
parameter:
V
DD
parameter:
T
j
10
2
10
150°C (98%)
25°C (98°C)
8
6
4
2
160 V
25 °C
640 V
10
1
150 °C
10
0
10
-1
0
0
0
0.5
1
1.5
2
20
40
60
80
100
Q
gate
[nC]
V
SD
[V]
11 Avalanche energy
12 Drain-source breakdown voltage
E
AS
=f(
T
j
);
I
D
=3.4 A;
V
DD
=50 V
V
BR(DSS)
=f(
T
j
);
I
D
=0.25 mA
700
600
500
400
300
200
100
0
960
920
880
840
800
760
720
680
25
50
75
100
125
150
-60
-20
20
60
100
140
180
T
j
[°C]
T
j
[°C]
Rev. 2.
5
page 6
20
11
-0
9
-2
7
SPB17N80C3
13 Typ. capacitances
14 Typ. Coss stored energy
C
=f(
V
DS
);
V
GS
=0 V;
f
=1 MHz
E
oss
=
f
(V
DS
)
10
4
18
16
14
12
10
8
Ciss
10
3
10
2
Coss
6
10
1
Crss
4
2
10
0
0
0
0
100 200 300 400 500 600 700 800 900
DS
[V]
100 200 300 400 500 600 700 800
V
V
DS
[V]
Rev. 2.
5
page 7
20
11
-0
9
-2
7
SPB17N80C3
Definition of diode switching characteristics
Rev. 2.
5
page 8
20
11
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9
-2
7
SPB17N80C3
PG-TO263: Outline
Rev. 2.
5
page 9
20
11
-0
9
-2
7
SPB17N80C3
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
contact the nearest Infineon Technologies Office
(www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information
on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
Rev. 2.
5
page 10
20
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7
