JSMSEMI-FDMA905P
| Part # | JSMSEMI-FDMA905P |
| Download | JSMSEMI-FDMA905P |
FDMA905
P
P-Channel
Enhancement Mode Power MOSFET
Description
The FDMA905
P
uses advanced trench technology to
D
provide excellent R
DS(ON)
, low gate charge and operation
with gate
G
voltages .This device is suitable for use as a load switching
application and a wide variety of other applications.
S
General Features
●
V
DS
= -12
V
,
I
D
=-16A
Schematic diagram
R
DS(ON)
< 22m
Ω
@ V
GS
=-2.5V
R
DS(ON)
< 18m
Ω
@ V
GS
=-4.5V
●
Advanced trench MOSFET process technology
●
Ultra low on-resistance with low gate charge
Pin assignment
Application
●
PWM applications
●
Load switch
●
Battery charge in cellular handset
DFN2X2-6L bottom view
Package marking and ordering i
mation
Device Marking
Device
Device Package
Reel Size
Tape Width
Quantity
DFN2X2-6L
–
–
–
905T
FDMA905
P
Absolute maximum ratings (TA=25
℃
unless otherwise noted)
Parameter
Symbol
Limit
-12
Unit
Drain-Source Voltage
V
V
V
DS
Gate-Source Voltage
±8
V
GS
Drain Current-Continuous
-16
A
I
D
Drain Current -Pulsed (Note 1)
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
-65
A
I
DM
P
D
2.5
W
℃
-55
T
o
1
50
T
J
,T
STG
Thermal Characteristic
Thermal Resistance,Junction-to-Ambient (Note 2)
R
θ
JA
R
θ
JC
50
℃
/W
℃
/W
Thermal Resistance,Junction-to-Case (Note 2)
6.9
1/5
FDMA905
P
P-Channel
Enhancement Mode Power MOSFET
Electrical characteristics (TA=25
℃
unless otherwise noted)
Parameter
Symbol
Condition
Min Typ
Max
Unit
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage Current
On Characteristics (Note 3)
Gate Threshold Voltage
V
(BR) DSS
I
DSS
V
GS
=0V I
D
=-250
μ
A
V
DS
=-12V,V
GS
=0V
V
GS
=±8V,V
DS
=0V
-12
–
–
–
–
V
–
–
-1
μ
A
nA
I
GSS
±100
V
GS(th)
R
DS(ON)
g
FS
V
DS
=V
GS
,I
D
=-250
μ
A
V
GS
=-4.5V, I
D
=-6.7A
V
GS
=-2.5V, I
D
=-6.2A
V
DS
=-10V,I
D
=-6.7A
-0.4
-0.7
12
–
1
22
–
V
m
Ω
m
Ω
S
–
–
–
Drain-Source On-State Resistance
14
Forward Transconductance
Dynamic Characteristics (Note4)
Input Capacitance
40
C
lss
C
oss
C
rss
–
–
–
2700
680
–
–
–
PF
PF
PF
V
DS
=-10V,V
GS
=0V,
Output Capacitance
F=1.0MHz
Reverse Transfer Capacitance
Switching Characteristics (Note 4)
Turn-on Delay Time
590
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
–
–
–
11
35
30
10
35
5
–
–
nS
nS
nS
nS
nC
nC
nC
Turn-on Rise Time
V
DD
=-10V,I
D
=-1A
V
GS
=-4.5V,R
GEN
=10
Ω
Turn-Off Delay Time
–
Turn-Off Fall Time
–
Total Gate Charge
Q
g
Q
gs
Q
gd
48
–
V
DS
=-6V,I
D
=-10A,
Gate-Source Charge
V
GS
=-4.5V
Gate-Drain Charge
10
–
Drain-Source Diode Characteristics
Diode Forward Voltage (Note 3)
Diode Forward Current (Note 2
V
SD
I
S
V
GS
=0V,I
S
=-8A
–
–
–
–
-1.2
-16
V
A
Notes:
1.
Repetitive Rating: Pulse wid
h limited by maximum junction temperature.
2.
Surface Mount
d on FR4 Board, t
≤
10 sec.
3.
Pulse Test: Pulse Width
≤
300
μ
s, Duty Cycle
≤
2%.
4.
Guaranteed by design, not subject to production
2/5
FDMA905
P
P-Channel
Enhancement Mode Power MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
t
on
t
r
t
off
t
f
t
d(on)
V
OUT
V
IN
t
d(off)
90%
90%
INVERTED
10%
90%
10%
50%
10%
PULSE WIDTH
Figure 1:Switching Test Circuit
Figure 2:Switching Waveforms
Vds Drain-Source Voltage (V)
T
J
-Junction
T
e
mperature(
℃
)
Figure 3 Output Characteristics
Figure 4 Drain Current
Vgs Gate-Source Voltage (V)
I
D
– Drain Current (A)
Figure 5 Rdson vs Vgs
Figure 6 Drain-Source On-Resistance
3/5
FDMA905
P
P-Channel
Enhancement Mode Power MOSFET
Vds Drain-Source Voltage (V)
Vsd So
ce-Drain Voltage (V)
Figure 7 Capacitance vs Vds
Figure 8 Sour
e- Drain Diode Forward
4/5
FDMA905
P
P-Channel
Enhancement Mode Power MOSFET
DFN2X2-6L Package Information
Notes
1. All dimensions are in millimeters.
2. Tolerance ±0.10mm (4 mil) unless otherwise specified
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 5 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
5/5
