Littelfuse-IXYS-CS20-16IO1

Part #Littelfuse-IXYS-CS20-16IO1
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Littelfuse-IXYS-CS20-16IO1
CS20-16io1  
=
V

RRM  

I

TAV  

V

T  

160
0
V  
Thyristor  
=
2
0
A  
=
1.2
3
V  
Single Thyristor  
Part number  
CS20-16io1  
Backside: anode  
2
1
3
TO-247  
Features / Advantages:  
Applications:  
Package:  
●
Thyristor for line frequency  
●
Planar passivated chip  
●
Long-term stability  
●
Line rectifying 50/60 Hz  
●
Softstart AC motor control  
●
DC Motor control  
●
Industry standard outline  
●
RoHS compliant  
●
Epoxy meets UL 94V-0  
●
Power converter  
●
AC power control  
●
Lighting and temperature control  
Disclaimer Notice  
Information furnished is believed to be accurate and reliable. However, users should independently  
evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for,  
and may not be used in, all applications. Read complete Disclaimer Notice at  
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved  

CS20-16io1  
Ratings  
Thyristor  
Symbol  
V

RSM/DSM  

Definition  
Conditions  
min. typ. max. Unit  
T

VJ

= 25°C  
T

VJ

= 25°C  
T

VJ

= 25°C  
T

VJ

= 125°C  
T

VJ

= 25°C  
1700  
1600  
20  
V
V
max. non-repetitive reverse/forward blocking voltage  
max. repetitive reverse/forward blocking voltage  
V

RRM/DRM  

I

R/D  

V

R/D

=
1
600 V  
V

R/D

=
1
600 V  
I

T

= 20
 
A  
I

T

= 40
 
A  
I

T

= 20
 
A  
I

T

= 40
 
A  
T

C

= 130°C  
180° sine  
µA  
mA  
V
reverse current, drain current  
2
forward voltage drop  
1.27  
1.53  
1.23  
1.57  
20  
V

T  

V
T

VJ  

=
°C  
V
125  
V
average forward current  
RMS forward current  
T

VJ

= 150°C  
T

VJ

= 150°C  
A
I

TAV  

I

T(RMS)  

V

T0  

31  
A
0.87  
V
threshold voltage  
for power loss calculation only  
slope resistance  
17.3 m
Ω  
0.6 K/W  
K/W  
r

T  

R

thJC  

R

thCH  

P

tot  

thermal resistance junction to case  
thermal resistance case to heatsink  
0.3  
T

C

= 25°C  
T

VJ

= 45°C  
V

R

= 0 V  
200  
260  
280  
220  
240  
W
A
A
A
A
total power dissipation  
max. forward surge current  
t =
 
10 ms; (50 Hz), sine  
t = 8,3 ms; (60 Hz), sine  
t =
 
10 ms; (50 Hz), sine  
t = 8,3 ms; (60 Hz), sine  
t =
 
10 ms; (50 Hz), sine  
t = 8,3 ms; (60 Hz), sine  
t =
 
10 ms; (50 Hz), sine  
t = 8,3 ms; (60 Hz), sine  
V

R

= 40
0
V f
 
= 1
M
Hz  
t

P

= 30
 
µs  
I

TSM  

T

VJ

= 150°C  
V

R

= 0 V  
value for fusing  
T

VJ

= 45°C  
V

R

= 0 V  
I²t  
340 A²s  
325 A²s  
240 A²s  
240 A²s  
pF  
T

VJ

= 150°C  
V

R

= 0 V  
junction capacitance  
T

VJ

= 25°C  
T

C

= 150°C  
16  
C

J  

10  
5
W
W
W
P

GM  

max. gate power dissipation  
t

P

= 300
 
µs  
0.5  
P

GAV  

average gate power dissipation  
critical rate of rise of current  
T

VJ

= 12
5
°
C; f = 50 Hz  
repetitive, I

T

= 60
 
A  
150 A/µs  
(di/dt)

cr  

0.3  
t

P

= 200
 
µs
;
d
i

G

/dt =  
A/µs;  
I

G

= 0.
3
A
;
 
V =
 
⅔
V

DRM  

V =
⅔
V

DRM  

non-repet., I

T

= 20
 
A  
T

VJ

= 125°C  
500 A/µs  
critical rate of rise of voltage  
gate trigger voltage  
1000 V/µs  
(dv/dt)

cr  

V

GT  

R

GK

=
∞; method 1 (linear voltage rise)  
V

D

= 6 V  
T

VJ

= 25°C  
T

VJ

= -40°C  
T

VJ

= 25°C  
T

VJ

= -40°C  
T

VJ

= 125°C  
1.3  
1.6  
V
V
gate trigger current  
V

D

= 6 V  
50 mA  
80 mA  
I

GT  

gate non-trigger voltage  
gate non-trigger current  
latching current  
V

D

=
⅔
V

DRM  

t

p

= 10
 
µs  
0.2  
5
V
V

GD  

I

GD  

I

L  

mA  
T

VJ

= 2
5
°
C  
150 mA  
I

G  

=
0.
3
A
; di

G

/dt =
 
0.3 A/µs  
holding current  
V

D

= 6 V
 
R

GK

=
∞  
T

VJ

= 2
5
°
C  
T

VJ

= 2
5
°
C  
100 mA  
I

H  

gate controlled delay time  
V

D

= ½ V  
2
µs  
µs  
t

gd  

DRM  
I

G  

V

R

= 100 V;
 
I

T  

di/dt =
 
15 A/µs
 
dv/dt =
 
20 V/µs  
=
0.
3
A
; di

G

/dt =
 
0.3 A/µs  
20A; V
 
=
⅔
V

DRM

T

VJ

=125 °C  
µs  
turn-off time  
=
150  
t

q  

t

p

= 200  
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved  

CS20-16io1  
Ratings  
Package TO-247  
Symbol  
I

RMS  

Definition  
Conditions  
min. typ. max.
 
Unit  
per terminal  
70  
150  
125  
150  
A
°C  
°C  
°C  
g
RMS current  
-40  
-40  
-40  
T

VJ  

virtual junction temperature  
T

op  

operation temperature  
storage temperature  
T

stg  

6
Weight  
0.8  
20  
1.2 Nm  
120  
M

D  

mounting torque  
F
N
mounting force with clip  
C
Product Marking  
Logo  
IXYS  
XXXXXXXXX  
yywwZ  
Part Number  
Date Code  
1234  
Lot#  
Location  
Ordering  
Ordering Number  
CS20-16io1  
Marking on Product  
CS20-16io1  
Delivery Mode  
Quantity Code
 
No.  
30 466530  
Standard  
Tube  
Similar Part  
Package  
TO-247AD (3)  
Voltage class  
CS20-12io1  
CS20-14io1  
1200  
1400  
TO-247AD (3)  
T

VJ

=
1
50°C  
Equivalent Circuits for Simulation  
* on die level  
Thyristor  
V

0  

I
R

0  

threshold voltage  
slope resistance *  
0.87  
14.8  
V
V

0 max  

R

0 max  

m
Ω  
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved  

CS20-16io1  
Outlines TO-247  
A
D2  
E
A2  
Ø
P1  
Ø
P  
Sym.  
Inches  
min. max.  
Millimeter  
S
Q
min.  
4.70  
2.21  
1.50  
max.  
A
0.185 0.209  
0.087 0.102  
0.059 0.098  
0.819 0.845  
0.610 0.640  
0.170 0.216  
0.215 BSC  
5.30  
2.59  
2.49  
A1  
A2  
D
D1  
D
20.79 21.45  
15.48 16.24  
2x
E2  
E
4
E2  
e
4.31  
5.48  
5.46 BSC  
1
2
3
L
0.780 0.800  
19.80 20.30  
L1  
Ø P  
Q
–
0.177  
–
4.49  
3.65  
6.19  
L1  
0.140 0.144  
0.212 0.244  
0.242 BSC  
3.55  
5.38  
E1  
S
6.14 BSC  
L
b
0.039 0.055  
0.065 0.094  
0.102 0.135  
0.015 0.035  
0.99  
1.65  
2.59  
0.38  
13.07  
0.51  
13.45  
–
1.40  
b2  
b4  
c
2.39  
3.43  
0.89  
–
2x
b2  
D1  
D2  
E1  
Ø P1  
0.515  
–
C
3x
b  
0.020 0.053  
1.35  
–
b4  
A1  
0.530  
–
–
0.29  
7.39  
2x
e  
2
1
3
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved  

CS20-16io1  
Thyristor  
60  
250  
200  
1000  
V

R

= 0 V  
50 Hz, 80% V

RRM  

T

VJ

= 45°C  
T

VJ

= 125°C  
T

VJ

= 45°C  
40  
I

TSM  

150  
[A]  
I

T  

I

2

t  
100  
[A]  
[A

2

s]  
20  
T

VJ

= 125°C  
100  
50  
125°C  
150°C  
T

VJ

= 25°C  
0
10  
0,5  
1,0  
1,5  
2,0  
0,01  
0,1  
1
1
2
3
4 5
 
6 7 8
 
9
1
0  
t [s]  
V

T

[V]  
t [ms]  
Fig. 3
 
I

2

t versus time (1-10 ms)  
Fig. 2
 
Surge overload current  
Fig. 1
 
Forward characteristics  
10  
1000  
100  
80  
60  
40  
20  
0
1: I  
, T
 
= 150°C  
25°C  
GD VJ  
2: I
 
, T  
GT VJ  
=
3: I
 
, T
 
= -40°C  
GT VJ  
dc =  
1
0.5  
0.4  
6
typ.  
Limit  
0.33  
0.17  
0.08  
I

T(AV)M  

t

gd  

V

G  

3
2
1
5
[V]  
1
[µs]  
[A]  
4
10  
T
= 125°C  
VJ  
4: P  
= 0.5 W  
GAV  
GM  
5: P  
6: P  
=
5 W  
=
10 W  
GM  
0,1  
1
1
10  
100  
1000 10000  
10  
100  
I

G

[mA]  
1000  
0
25 50 75
 
100 125 150  
I

G

[mA]  
T

C

[°C]  
Fig. 5
 
Gate controlled delay time  
Fig. 4
 
Gate trigger characteristics  
Fig. 6
 
Max. forward current  
at case temperature  
R

thHA  

dc =  
1
0.5  
0.4  
0.33  
0.17  
0.08  
0.6  
0,6  
0.8  
1.0  
2.0  
4.0  
8.0  
30  
20  
Z

thJC  

0,4  
[K/W]  
P

(AV)  

R

thi

[K/W] t

i

[s]  
0.08  
0.06  
0.20  
0.10  
0.16  
0.01  
0.0001  
0.03  
[W]  
10  
0,2  
0.30  
0.11  
0
0,0  
10

0  

0
10  
20  
0
50  
100  
150  
10

1  

10

2  

10

3  

10

4  

I

T(AV)

[A]  
T

amb

[°C]  
t [ms]  
Fig. 7a
 
Power dissipation versus direct output current  
Fig. 7b
 
and ambient temperature  
Fig. 8
 
Transient thermal impedance junction to case  
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved  

CS20-16io1  
IXYS reserves the right to change limits, conditions and dimensions.  
Data according to IEC 60747and per semiconductor unless otherwise specified  
20191129c  
© 2019
 
IXYS all rights reserved