Littelfuse-T2500DG

Part #Littelfuse-T2500DG
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Littelfuse-T2500DG
T2500D  
Triacs  
Silicon Bidirectional Thyristors  
Designed primarily for full-wave ac control applications, such as  
light dimmers, motor controls, heating controls and power supplies.  
Features  
•
Blocking
V
o
ltage 400 V  
TRIACS  
6 AMPERES RMS  
400 VOLTS  
•
All Diffused and Glass Passivated Junctions for Greater Parameter  
Uniformity and Stability  
•
Small, Rugged, Thermowatt Construction for Low Thermal  
Resistance, High Heat Dissipation and Durability  
•
High Surge Current Capability 60 A Peak at T
 
= 80
°
C  
C
•
Pb−Free Package is Available*  
MT2  
MT1  
G
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
Peak Repetitive Off−State Voltage (Note

)  
(Sine Wave 50 to 60 Hz,  
T =
 
−40 to +100
°
C, Gate Open)  
J
V
V
400  
V
DRM,  
RRM  
MARKING  
DIAGRAM  
On−State RMS Current (T
 
= +80
°
C)  
I
6.0  
60  
A
A
C
T(RMS)  
(Full Cycle Sine Wave 50 to 60 Hz)  
Peak Non−repetitive Surge Current  
I
TSM  
T2500DG  
AYWW  
(One Full Cycle, 60 Hz, T
 
= +80
°
C)  
C
2
2
Circuit Fusing Considerations (t = 8.3 ms)  
I t  
15  
16  
A s  
TO−220AB  
CASE 221A  
STYLE 4  
1
Peak Gate Power  
(T =
 
+80
°
C, Pulse Width = 10
m
sec)  
C
P
W
W
GM  
Average Gate Power  
P
0.2  
G(AV)  
(T =
 
+80
°
C, t = 8.3 ms)  
C
A
Y
= Assembly Location  
=
Y
e
ar  
Peak Gate Current (Pulse Width = 10
m
sec)  
Operating Junction
T
e
mperature Range  
Storage
T
e
mperature Range  
I
4.0  
A
GM  
WW =
 
Work Week  
= Pb−Free Package  
T
J
−40 to +125  
−40 to +150  
°
C  
°
C  
G
T
stg  
THERMAL CHARACTERISTICS  
PIN ASSIGNMENT  
Characteristic  
Symbol  
Max  
2.7  
Unit  
°
C/W  
°
C  
1
2
3
4
Main
T
e
rminal 1  
Thermal Resistance, Junction−to−Case  
R
q
JC  
L
Main
T
e
rminal 2  
Gate  
Maximum Lead
T
e
mperature for Soldering  
Purposes 1/8
″
from Case for 10 Seconds  
T
260  
Main
T
e
rminal 2  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
ORDERING INFORMATION  
1. V  
, V  
for all types can be applied on a continuous basis. Blocking  
DRM  
RRM  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
Device  
Package  
Shipping  
T2500D  
TO220AB  
500 Units / Box  
500 Units / Box  
T2500DG  
TO220AB  
(Pb−Free)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting
T
e
chniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 4  
T2500/D  
 

T2500D  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted; Electricals apply in both directions)  
C
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Peak Repetitive Blocking Current T
 
= 25
°
C  
I
I
,
−
−
10  
2.0  
m
A  
mA  
J
DRM  
(Rated V  
, V  
; Gate Open) T
 
= 100
°
C  
DRM  
RRM  
J
RRM  
ON CHARACTERISTICS  
Peak On-State V

V
TM  
−
−
2.0  
V
(I =
 
“
30 A Peak)  
TM  
Gate Trigger Current (Continuous dc)  
I
mA  
GT  
(V =
 
12 Vdc, R
 
= 100
W
)  
D
L
MT2(+), G(+)  
−
−
−
−
10  
20  
15  
30  
25  
60  
25  
60  
MT2(+), G(−)  
MT2(−), G(−)  
MT2(−), G(+)  
Gate Trigger Voltage (Continuous dc) (All Four Quadrants)  
(V =
 
12 Vdc, R
 
= 100
W
)  
V
−
0.2  
−
1.25  
2.5  
V
V
GT  
D
L
Gate Non−Trigger Voltage  
V
GD  
−
−
(V =
 
12
V
, R
 
=
1
00
W
, T
 
= 100
°
C)  
D
L
C
Holding Current  
I
15  
30  
−
mA  
m
s  
H
(Main
T
e
rminal Voltage = 12 Vdc, Gate Open, Initiating Current =
“
200 mA)  
Gate Controlled Turn-On Time  
t
−
1.6  
gt  
(Rated V  
, I
 
= 10 A , I
 
= 160 mA, Rise Time = 0.1
m
s)  
T GT  
DRM  
DYNAMIC CHARACTERISTICS  
Critical Rate-of-Rise of Commutation Voltage  
dv/dt(c)  
dv/dt  
−
−
10  
75  
−
−
V/
m
s  
V/
m
s  
(Rated V  
, I  
= 6 A, Commutating di/dt = 3.2 A/ms, Gate Unenergized,  
DRM T(RMS)  
T
C
= 80
°
C)  
Critical Rate-of-Rise of Off-State Voltage  
(Rated V  
, Exponential Voltage Rise, Gate Open, T
 
= 100
°
C)  
DRM  
C
2. Pulse
 
T
e
st: Pulse Width
≤
2.0 ms, Duty Cycle
≤
2%.  
2
 

T2500D  
Voltage Current Characteristic of Triacs  
(Bidirectional Device)  
+ Current  
Quadrant 1  
Main
T
e
rminal 2 +  
Symbol  
Parameter  
V
TM  
V
Peak Repetitive Forward Off State Voltage  
Peak Forward Blocking Current  
DRM  
DRM  
on state  
I
I
H
I
at V  
RRM  
V
Peak Repetitive Reverse Off State Voltage  
Peak Reverse Blocking Current  
RRM  
RRM  
RRM  
I
V
Maximum On State Voltage  
Holding Current  
+ Voltage  
off state  
TM  
I
H
I
at V  
DRM  
DRM  
I
H
Quadrant 3  
Main
T
e
rminal 2 −  
V
TM  
Quadrant Definitions for a Triac  
MT2 POSITIVE  
(Positive Half Cycle)  
+
(+) MT2  
(+) MT2  
Quadrant II  
Quadrant I  
(−) I  
(+) I  
GT  
GT  
GATE  
GATE  
MT1  
MT1  
REF  
REF  
I
−
+ I  
GT  
GT  
(−) MT2  
(−) MT2  
Quadrant III  
Quadrant IV  
(+) I  
(−) I  
GT  
GT  
GATE  
GATE  
MT1  
REF  
MT1  
REF  
−
MT2 NEGATIVE  
(Negative Half Cycle)  
All polarities are referenced to MT1.  
With in−phase signals (using standard AC lines) quadrants I and III are used.  
3

T2500D  
PACKAGE DIMENSIONS  
TO−220  
CASE 221A−07  
ISSUE AA  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
SEATING  
PLANE  
−T−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION
 
Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
B
F
C
T
S
INCHES  
DIM MIN
 
MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.36  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
−−−  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.55  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
−−−  
4
3
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.014  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
−−−  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.022  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
−−−  
Q
A
K
1
2
U
H
G
H
J
Z
K
L
N
Q
R
S
T
R
L
V
J
G
U
V
Z
D
0.080  
2.04  
N
STYLE 4:  
PIN 1.
 
MAIN TERMINAL 1  
2. MAIN
 
TERMINAL 2  
3. GATE  
4. MAIN
 
TERMINAL 2  
ON Semiconductor
and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
 
SCILLC reserves the right to make changes without further notice  
to any products herein.
 
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
 
All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
 
SCILLC does not convey any license under its patent rights  
nor the rights of others.
 
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
 
Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
 
SCILLC is an Equal  
Opportunity/Affirmative Action Employer.
 
This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMEN
T
:  
N. American Technical Support
: 800−282−9855
T
o
ll Free  
USA/Canada  
ON Semiconductor Website

Literature Distribution Center for ON Semiconductor  
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.
O. Box 61312, Phoenix, Arizona 85082−1312 USA  
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: 480−829−7710 or 800−344−3860
T
o
ll Free USA/Canada  
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: 480−829−7709 or 800−344−3867
T
o
ll Free USA/Canada  
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: orderlit@onsemi.com  
Japan
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T
o
kyo, Japan 153−0051  
Phone
: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
T2500/D