MA-COM-MAPS-010145-TR0500

Part #MA-COM-MAPS-010145-TR0500
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MA-COM-MAPS-010145-TR0500
Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Features  
Functional Schematic  
•
4 Bit Digital Phase Shifter  
•
360° Coverage with LSB = 22.5°  
•
Integrated CMOS Driver  
•
Serial or Parallel Control  
•
Low DC Power Consumption  
•
Minimal Attenuation Variation over Phase Shift  
Range  
•
50 Ω
Impedance  
•
EAR99  
•
Lead
–
Free 4 mm 24
–
Lead PQFN Package  
•
RoHS* Compliant  
V

CC  

(+5 V)  
V

EE  

(-5 V)  
24 23 22 21 20
 
19  
0.1
µF  
0.1
µF  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
6-Bit  
Phase Shifter  
P/S  
SER

OUT  

GND  
GND  
GND  
RF

IN  

GND  
GND  
See  
Detail  
RF

OUT  

GND  
7
8
9 10
 
11 12  
•
Bidirectional  
Applications  
Phase Shifter Detail  
•
Aerospace & Defense  
•
Wireless Networking & Communication…  
RF

IN  

RF

OUT  

-22.5 deg.  
-45 deg.  
-90 deg.  
-180 deg.  
Description  
The MAPS
–
010145 is a GaAs pHEMT 4
–
bit digital  
phase shifter with an integrated CMOS driver in a  
4 mm PQFN plastic surface mount package. Step  
size is 22.5° providing phase shift from 0° to 360° in  
22.5° steps. This design has been optimized to  
minimize variation in attenuation over the phase shift  
range.  
Pin Configuration

2  

1
2
V

EE  

13  
GND  
RF

OUT  

GND  
P/S  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
The MAPS
–
010145 is ideally suited for use where  
high phase accuracy with minimum loss variation  
over the phase shift range are required. The 4 mm  
PQFN package provides a smaller footprint than is  
typically available for a digital phase shifter with an  
internal driver. Typical applications include  
communications antennas and phased array radars.  
3
GND  
GND  
RF

IN  

GND  
GND  
GND  
GND  
GND  
GND  
GND  
4
GND  
5
SER

OUT  

V

CC  

6
7
D6  
8
D5  
Ordering Information

1  

9
D4  
Part Number  
Package  
10  
11  
12  
D3 or LE  
D2 or CLK  
D1 or SER

IN  

MAPS
–
010145
–
TR0500  
MAPS
–
010145
–
001SMB  
500 piece reel  
Sample Test Board  
2. The
 
exposed pad centered on the package bottom must be  
connected to RF, DC and thermal ground.  
1. Reference
 
Application Note M513 for reel size information.  
* Restrictions on Hazardous Substances, compliant to current RoHS EU directive.  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Electrical Specifications:  
Freq. = 3.5
–
6.0 GHz, T

A

= 25°C, Z

0

= 50
Ω
, V

CC

= +5.0 V, V

EE

=
–
5.0 V  
Operating Power

3  

3.5
–
6.0 GHz  
Any Phase State  
dBm  
dB  
—
—
—
—
+25  
6.5  
—
Insertion Loss  
(Any Phase State)  
5.0  
± 1  
Attenuation Variation  
RMS Attenuation Error

4  

RMS Phase Error

4  

Across All Phase States  
dB  
All Values Relative to Insertion Loss at  
Reference Phase  
dB  
—
—
0.4  
3
—
—
All Values Relative to Reference Phase  
deg  
22.5 Degree Bit  
45 Degree Bit  
90 Degree Bit  
180 Degree Bit  
Sum of All Bits  
± 1.7  
± 1.0  
± 2.0  
± 3.5  
± 2.5  
Phase Accuracy
 

5  

Relative to Reference Loss State  
deg  
—
—
RF Input  
RF Output  
1.8:1  
1.8:1  
VSWR  
Ratio  
—
—
1 dB Compression  
Input IP3  
Reference State  
dBm  
dBm  
ns  
—
—
—
27  
45  
50  
—
—
—
Two
–
tone inputs up to +5 dBm  
10% to 90% RF, 90% to 10% RF  
T

RISE

, T

FALL  

V

CC  

V

EE  

3.0  
–
5.5  
—
–
5.0  
5.5  
–
3.0  
—
V
V

IL  

V

IH  

LOW
–
level input voltage  
HIGH
–
level input voltage  
0.0  
0.3 x V

CC  

V

CC  

V
µA  
V
—
1
0.7 x V

CC  

l

IN

(Input Control Current)  
V

IN

= V

CC

or GND  
—
—
V

OH  

V

OL  

For serial out;
 
I

OH

=
–
100 µA  
For serial out;
 
I

OL

= 100 µA  
V

CC

–
0.2  
—
0.2  
—
—
I

CC  

V

CONTROL

= V

CC

or GND  
µA  
—
—
2
(Quiescent Supply Current)  
V

EE

min to max  
V

IN

= V

IL

or V

IH  

I

EE  

mA  
–
1.0  
–
0.1  
—
3. Maximum
 
operating power is the maximum power where the specifications are guaranteed.  
4. RMS
 
is calculated across all 15 amplitude or phase states. Refer to application section for further discussion of this method.  
5. This
 
phase shifter is guaranteed to have monotonic phase shift.  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Typical Performance Curves  
RF

IN

Return Loss vs. Frequency (All States)  
RF

OUT

Return Loss vs. Frequency (All States)  
0
-5  
0
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-10  
-15  
-20  
-25  
-30  
-35  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
6.0  
360  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
Frequency (GHz)  
Frequency (GHz)  
RMS Phase Error vs. Frequency

5  

RMS Amplitude Error vs. Frequency (0 degree state  
reference)

5  

10  
1.5  
1.2  
0.9  
0.6  
0.3  
0
8
6
4
2
0
3.5  
4.0  
4.5  
5.0  
5.5  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
Frequency (GHz)  
Frequency (GHz)  
Phase Error (degrees) vs. State  
Amplitude Error (dB) vs. State  
15  
2.0  
3.5 GHz  
4.0 GHz  
4.5 GHz  
5.0 GHz  
5.5 GHz  
1.5  
10  
5
1.0  
6.0 GHz  
0.5  
0
0.0  
-0.5  
-1.0  
-1.5  
-2.0  
-5  
3.5 GHz  
4.0 GHz  
4.5 GHz  
5.0 GHz  
5.5 GHz  
6.0 GHz  
-10  
-15  
0
45  
90  
135  
180  
225  
270  
315  
0
45  
90  
135  
180  
225  
270  
315  
360  
State (deg)  
State  
3
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Typical Performance Curves  
Amplitude Variation vs. Phase State  
Phase Shift vs. Frequency (Major States)  
0
-45  
0
-2  
-4  
-90  
-135  
-180  
-225  
-270  
-315  
-360  
-405  
-6  
-8  
-10  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
Frequency (GHz)  
Frequency (GHz)  
22.5°  
45°  
67.5°  
90°  
112.5°  
135°  
157.5°  
180°  
205.5°  
225°  
247.5°  
270°  
292.5°  
315°  
337.5°  
Sample Board Header Pin Labels

8  

Absolute Maximum Ratings

6,7  

Input Power  
3.5
–
6.0 GHz  
27 dBm  
V

CC  

V

EE  

–
0.5 V
≤
V

CC

≤ +7.0
V  
–
7.0 V
≤
V

EE

≤ +0.5
V  
D1
–
D4, P/S, LE, CLK or  
–
0.5 V
≤
V

IN

≤
V

CC

+ 0.5 V  
SER IN  
SER OUT  
–
0.5 V
≤
V

OUT

≤
V

CC

+ 0.5 V  
–
40ºC to +85ºC  
Operating Temperature  
Storage Temperature  
–
65ºC to +150ºC  
6. Exceeding
 
any one or combination of these limits may cause  
permanent damage to this device.  
7. MACOM
 
does not recommend sustained operation near these  
survivability limits.  
8. Sample
 
board CAD files available by request.  
Handling Procedures  
Please observe the following precautions to avoid  
damage:  
Static Sensitivity  
Gallium Arsenide and Silicon Integrated Circuits are  
sensitive to electrostatic discharge (ESD) and can  
be damaged by static electricity.
 
Proper ESD  
control techniques should be used when handling  
these devices.  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Modes of Operation:  
Serial and Direct Parallel  
Serial Mode  
Mode Truth Table

9,10  

The serial control interface (SERIN, CLK, LE,  
SEROUT) is compatible with the SPI protocol. SPI  
mode is activated when P/S is kept high. The 6
–
bit  
serial word must be loaded with the MSB first. After  
shifting in the 6 bit word, a rising edge on LE will set  
the phase shifter to the desired state.
 
While LE is  
high the CLK is masked to protect the data while  
implementing the change. SEROUT is SERIN  
delayed by 6 clock cycles.  
1
0
X
Serial  
N/A  
Direct Parallel  
9. There
 
are two dummy bits (D1 & D2),
 
that must be sent in  
the serial mode.
 
This is because the 4 bit phase shifter uses  
the same driver as the 6 bit phase shifter.  
10. In
 
the parallel mode, D1 and D2 should be tied to ground or to  
V

CC  

.
Truth Table (Digital Phase Shifter)

11  

When P/S is low, the serial control interface is  
disabled. When
 
P/S is set high, Pins 22, 23, and 24  
have the LE, CLK, and SER IN function.  
0
0
0
0
1
1
0
0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
Reference Phase  
In serial mode operation, the outputs will stay  
constant while LE is kept low.  
22.5°  
45°  
90°  
Direct Parallel Mode  
180°  
337.5°  
The parallel mode is enabled when P/S is set low. In  
the direct parallel mode, the phase shifter is  
controlled by the parallel control inputs directly.  
When P/S is set low, Pins 22, 23, and 24 have the  
D3, D2, and D1 function.  
11. 0
 
= CMOS Low; 1 = CMOS High, X is CMOS Low or High.  
Serial Interface Timing Characteristics  
t

SCK  

t

CS  

Min. Serial Clock Period  
Min. Control Set
–
up Time  
Min. Control Hold Time  
100  
20  
100  
20  
100  
20  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t

CH  

20  
20  
20  
t

LS  

Min. LE Set
–
up Time  
10  
10  
10  
t

LEW  

t

LH  

Min. LE Pulse Width  
10  
10  
10  
Min. Serial Clock Hold Time from LE  
Min. LE Pulse Spacing  
10  
10  
10  
t

LES  

630  
630  
630  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Functionality  
Modes of Operation: Serial and Direct Parallel  
Serial Input Interface Timing Diagram  
t

LS

t

LEW

t

LH  

SERIAL  
CLK  
LE  
t

LES  

D5  
MSB  
D0  
LSB  
CONTROL  
WORD  
D4  
D1  
t

CS  

t

CH  

Lead Free 4
mm 24
–
Lead PQFN

†  

†

Reference Application Note S2083 for lead
–
free solder reflow recommendations.  
Meets JEDEC moisture sensitivity level 1 requirements.  
Plating is 100% matte tin over copper.  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Application Section  
Phase shifters such as this product are bidirectional. All prior data in the datasheet shows S(2,1), but the following  
pages illustrate typical S(1,2) performance.  
By inspection of the posted S
–
Parameters, one can observe that this device will work bidirectionally. Considering  
the MMIC topology, this is an expected feature.  
Insertion Loss (S12), All States  
Insertion Loss (S21), All States  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Application Section  
Below is a comparison of unwrapped, normalized phase in both directions.  
Insertion Phase (S21), All States  
Insertion Phase (S12), All State  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Application Section  
To be complete in reviewing phase shifter performance in both directions, error metrics should be discussed.  
With phase shifters, both phase and amplitude error are described. Amplitude error describes the state
–
to
–
state  
amplitude variation. Phase error describes the delta
–
from ideal phase observed in each state.  
Amplitude error can be calculated in two ways. The first is with respect to the 0° or reference state. This can be  
called cross
–
error. Another, and perhaps more widely accepted method for calculating amplitude error, is to com-  
pare it by frequency to the mean amplitude of all the states as is calculated here. [1]  
Amplitude Error (dB) vs. State (S12)  
While the above shows amplitude error at particular frequencies vs phase shifter state, another common way to  
look at this parameter is error vs frequency.  
Amplitude Error Compared to Average Amplitude (S12)  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Application Section  
Phase error is calculated as the difference between the requested or ideal phase and actual insertion phase. For  
example, if 22.5° of shift is desired, and 23.5° is observed, the delta, or error, is 1°.  
Phase Error (°) vs. State (S12)  
Phase Error (°) vs. Frequency as shown below:  
Phase Error compared to ideal (S12)  
Following many traces, trying to consider how that will impact a system is difficult. A simpler method is adopted:  
RMS Error. It is important to use the right convention when applying an RMS calculation to phase shifter insertion  
phase. We compare the raw errors with the mean (error) below.  
If we use only the raw phase errors in an RMS error calculation the result will be pessimistic. This is because the  
average of the phase errors is not typically zero. Ignoring the mean error would result in an RMS Error that differs  
depending on chosen reference state. [1]  
[1]  
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0007151  

Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
Application Section  
This graph shows RMS Phase Error in both directions. The traces overlay.  
RMS Phase Error (S21 & S12)  
4.5  
4
3.5  
3
2.5  
2
1.5  
1
0.5  
0
3.5  
4
4.5  
5
5.5  
6
Frequency (GHz)  
RMS Phase Error (S12) (dB)  
RMS Phase Error (S21) (dB)  
For RMS Error applied to amplitude, both methods are shown below. One method derives error vs the reference  
(0°) state, and the other method calculates error vs the mean insertion loss. Forward and reverse conditions  
overlay.  
RMS Amplitude Error Referencing the Average & the 0°States (S21 & S12)  
References:  
[1] “
RMS Phase & Amplitude Calculation for Phase
–
shifters
”, 10
–
12
–
2008
T.Fattorini, MACOM DesignGuide  
11  
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Digital Phase Shifter, 4-Bit,  
3.5 – 6.0 GHz  
MAPS-010145  
Rev. V4  
MACOM Technology Solutions Inc.
(“
MACOM
”).
All rights reserved.  
These materials are provided in connection with MACOM
’
s products as a service to its customers and may be  
used for informational purposes only. Except as provided in its Terms and Conditions of Sale or any separate  
agreement, MACOM assumes no liability or responsibility whatsoever, including for (i) errors or omissions in these  
materials; (ii) failure to update these materials; or (iii) conflicts or incompatibilities arising from future changes to  
specifications and product descriptions, which MACOM may make at any time, without notice. These materials  
grant no license, express or implied, to any intellectual property rights.  
THESE MATERIALS ARE PROVIDED “AS IS” WITH NO WARRANTY OR LIABILITY, EXPRESS OR IMPLIED,  
RELATING TO SALE AND/OR USE OF MACOM PRODUCTS INCLUDING FITNESS FOR A PARTICULAR  
PURPOSE, MERCHANTABILITY, INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHT, ACCURACY OR  
COMPLETENESS, OR SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES WHICH MAY  
RESULT FROM USE OF THESE MATERIALS.  
MACOM products are not intended for use in medical, lifesaving or life sustaining applications. MACOM  
customers using or selling MACOM products for use in such applications do so at their own risk and agree to fully  
indemnify MACOM for any damages resulting from such improper use or sale.  
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0007151