MATSUKI-ME4548-G

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

GENERAL DESCRIPTION  

FE

A

T

URES  

●

R

DS(ON)

≦

20

mΩ@V

GS

=10V (N-Ch)  

The ME4548 is the N+P-Channel logic enhancement mode power  

field effect transistors are produced using high cell density, DMOS  

trench technolog

y

.

T

his high density process is especially tailored  

to minimize on-state resistance. These devices are particularly  

suited for low voltage application such as cellular phone and  

notebook computer power management and other battery  

powered circuits where high-side switching , and low in-line power  

loss are needed in a very small outline surface mount package.  

●

R

DS(ON)

≦

28

mΩ@V

GS

=4.5V(N-Ch)  

●

R

DS(ON)

≦

25

mΩ@V

GS

=-10V(P-Ch)  

●

R

DS(ON)

≦

40

mΩ@V

GS

=-4.5V(P-Ch)  

●

Super high density cell design for extremely low R

DS(ON)  

●

Exceptional on-resistance and maximum DC current  

capability  

APPLICATIONS  

●

Power Management in Note book  

●

Portable Equipment  

●

Battery Powered System  

●

DC/DC Converter  

PIN CONFIGUR

A

T

ION  

●

Load SwitchC  

(SOP-8)  

●

LCD Display inverter  

T

o

p View  

e

Ordering Information

: ME4548 (Pb-free)  

ME4548-G (Green product-Halogen free)  

Absolute Maximum Ratings

(T

A

=25

℃

Unless Otherwise Noted)  

N-Channel  

P-Channel  

Parameter  

Symbol  

Unit  

Maximum Ratings

 

Maximum Ratings  

Drain-Source Voltage  

V

DS  

V

GS  

30  

±20  

8.1  

6.5  

30  

-30  

±20  

-7.1  

-5.6  

-30  

2

V

V

Gate-Source Voltage  

T

A

=25

℃

 

T

A

=70

℃  

Continuous Drain Current

*  

Pulsed Drain Current  

I

D  

A

A

I

DM  

P

D  

T

A

=25

℃  

T

A

=70

℃  

2

Maximum Power Dissipation

*  

W

℃

1.28  

1.28  

Junction and Storage

T

e

mperature Range  

TJ,

T

s

tg  

-55 to 150  

62.5  

Thermal Resistance-Junction to Ambient

*  

R

θJA  

D

℃

C

/

W

C  

*

The device mounted on 1in

2

FR4 board with 2 oz copper  

正式發行  

01  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

Electrical Characteristics

(T

J

=25

℃

Unless Otherwise Specified)  

Symbol  

ST

A

T

IC  

Parameter  

Limit  

Min  

Typ  

Max Unit  

V

GS

=0

V

,

I

D

=250

μ

A  

V

GS

=0

V

,

I

D

=-250

μ

A  

V

DS

=V

GS

, I

D

=250

μ

A  

V

DS

=V

GS

, I

D

=-250

μ

A  

N-Ch  

P-Ch  

30  

-30  

V

(BR)DSS  

V

GS(th)  

V

Drain-Source Breakdown Voltage  

N-Ch  

P-Ch  

1.0  

-1.0  

2.5  

V

Gate Threshold Voltage  

-2.5  

V

DS

=0

V

,

V

GS

=±20V  

V

DS

=0

V

,

V

GS

=±20V  

V

DS

=24

V

,

V

GS

=0V  

V

DS

=-24

V

,

V

GS

=0V  

V

GS

=10

V

,

I

D

=8.1A  

V

GS

=-10

V

,

I

D

= -7.1A  

VGS=4.5

V

,

I

D=6A  

VGS=-4.5

V

,

I

D=-5.6A  

I

S

=1A, V

GS

=0V  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

±100  

±100  

I

GSS  

I

DSS  

Gate Leakage Current  

nA  

1

μ

A  

-1  

Zero Gate Voltage Drain Current  

20  

25  

R

DS(ON)  

Drain-Source on-State Resistance

a  

Diode Forward Voltage  

m

Ω  

28  

40  

1

-1  

0.75  

-0.7  

V

SD  

V

I

S

=-1A, V

GS

=0V  

DYNAMIC  

N-Ch  

P-Ch  

19  

38  

Qg  

T

o

tal Gate Charge  

N-Channel  

V

DS

=15

V

,

V

GS

=10

V

,

I

D

=10A  

N-Ch  

P-Ch  

4.5  

7.7  

nC  

pF  

Qgs  

Qgd  

C

iss  

C

oss  

C

rss  

t

d(on)  

t

r  

Gate-Source Charge  

Gate-Drain Charge  

Input Capacitance  

P-Channel  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

V

DS

=-15

V

,

V

GS

=-10

V

,

I

D

=-9.1A  

3

9

720  

1490  

N-Channel  

V

DS

=-15

V

,

V

GS

=0

V

,

f

=1MHz  

N-Ch  

P-Ch  

85  

209  

Output Capacitance  

Reverse Transfer Capacitance  

Turn-On Delay Time  

Turn-On Rise Time  

Turn-Off Delay Time  

Turn-Off Fall Time  

P-Channel  

VDS=-15

V

,

VGS=0

V

,

f

=1MHz  

N-Ch  

P-Ch  

23  

148  

N-Ch  

P-Ch  

12  

38.2  

N-Channel  

VDD=25

V

,

R

L =25

Ω  

ID=1A, VGEN=10

V

,

R

G=6

Ω  

N-Ch  

P-Ch  

7

16.7  

ns  

N-Ch  

P-Ch  

N-Ch  

P-Ch  

44  

106  

P-Channel  

VDD=-15

V

,

R

L =15

Ω  

ID=-1A, VGEN=-10

V

,

R

G=6

Ω  

t

d(off)  

4

24.1  

t

f  

Notes:  

a. Pulse test: pulse width

≦

300us, duty cycle

≦

2%, Guaranteed by design, not subject to production testing.  

b

.

Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.  

DCC  

正式發行  

02  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

Typical Characteristics (T

J

=25

℃

Noted)  

N-CHANNEL  

DCC  

正式發行  

03  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

Typical Characteristics (T

J

=25

℃

Noted)  

N-CHANNEL  

DCC  

正式發行  

04  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

Typical Characteristics (T

J

=25

℃

Noted)  

P-CHANNEL  

DCC  

正式發行  

05  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

Typical Characteristics (T

J

=25

℃

Noted)  

P-CHANNEL  

DCC  

正式發行  

06  

Dec,2014-Ver1.0  

Preliminary-ME4548/ME4548-G  

N+P-Channel 30-V (D-S) MOSFET  

SOP-8 Package Outline  

MILLIMETERS (mm)  

DIM  

MIN  

1.35  

0.10  

0.35  

0.18  

4.80  

3.80  

MAX  

1.75  

0.25  

0.49  

0.25  

5.00  

4.00  

A

A1  

B

C

D

E

e

1.27 BSC  

H

5.80  

0.40  

0

°

 

6.20  

1.25  

7

°  

L

θ

Note: 1. Refer to JEDEC MS-012AA.  

2. Dimension

“

D

”

does not include mold flash, protrusions  

or gate burrs . Mold flash, protrusions or gate burrs shall not  

exceed 0.15 mm per side.  

DCC  

正式發行  

07  

Dec,2014-Ver1.0