MATSUKI-ME55N06A-G
| Part # | MATSUKI-ME55N06A-G |
Download  | MATSUKI-ME55N06A-G |
N-Channel 75-V (D-S) MOSFET
GENERAL DESCRIPTION
FEATURES
The ME55N06A is the N-Channel logic enhancement mode power
field effect transistors, using high cell densit
y
,
D
MOS trench
technolog
y
.
T
his high density process is especially tailored to
minimize on state resistance. These devices are particularly suited
for low voltage application such as cellular phone, notebook
computer power management and other battery powered circuits,
and low in-line power loss that are needed in a very small outline
surface mount package.
●
R
DS(ON)
≦
9.5
mΩ@V
GS
=10V
●
Super high density cell design for extremely low R
DS(ON)
●
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
●
Power Management in Note book
●
DC/DC Converter
●
Load Switch
●
LCD Display inverter
PIN CONFIGURATION
(TO-252-3L)
T
o
p View
e
Ordering Information
: ME55N06A (Pb-free)
ME55N06A-G (Green product-Halogen free)
Absolute Maximum Ratings
(T
C
=25
℃
Unless Otherwise Noted)
P
arameter
Symbol
V
DS
Unit
V
Maximum Ratings
Dra
i
n-Source Voltage
75
Gate-Source Voltage
V
GS
±25
V
T
C
=25
℃
T
C
=70
℃
64
Continuous Drain Current
Pulsed Drain Current
I
D
A
A
51
I
DM
P
D
256
T
C
=25
℃
T
C
=70
℃
63
Maximum Power Dissipation
W
40
-55 to 150
2
℃
DCC
Junction and Storage
T
e
mperature Range
TJ,
T
s
tg
℃
/W
R
θJ
C
Thermal Resistance-Junction to Case
*
正式發行
*The device mounted on 1in
2
FR4 board with 2 oz copper
Jan, 2015
–
Ver1.1
01
N-Channel 75-V (D-S) MOSFET
Electrical Characteristics
(T
J
=25
℃
Unless Otherwise Specified)
Symbol
S
T
ATIC
BV
DSS
V
GS(th)
I
GSS
Parameter
Limit
Min
Typ
Max
Unit
V
GS
=0V, I
D
=250
μ
A
V
DS
=V
GS
, I
D
=250
μ
A
V
DS
=0V, V
GS
=±20V
V
DS
=75V, V
GS
=0V
V
GS
=10V, I
D
=25A
I
S
=25A, V
GS
=0V
Drain-Source Breakdown Voltage
Gate Threshold Voltage
75
2
V
V
4
±100
1
Gate-Body Leakage
nA
μ
A
m
Ω
I
DSS
Zero Gate Voltage Drain Current
Drain-Source On-Resistance
Diode Forward Voltage
R
DS(ON)
V
SD
7.5
9.5
1.2
0.85
V
DYNAMIC
Qg
T
o
tal Gate Charge
V
DS
=44V, V
GS
=10V, I
D
=25A
V
DS
=44V, V
GS
=4.5V, I
D
=25A
114
26
Qg
T
o
tal Gate Charge
nC
pF
ns
Qgs
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
34
Qgd
33
C
iss
1563
363
194
51.4
19.3
104
19.9
C
oss
C
rss
Output Capacitance
Reverse Transfer Capacitance
T
u
rn-On Delay
T
i
me
T
u
rn-On Rise
T
i
me
T
u
rn-Off Delay
T
i
me
T
u
rn-Off Fall
T
i
me
V
DS
=15V, V
GS
=0
V
,
f
=1MHz
t
d(on)
t
r
V
DD
=28V, R
L
=28
Ω
,
V
GS
=10V, R
G
=4.5
Ω
t
d(off)
t
f
Note: a. Pulse test: pulse width
≦
300us, duty cycle
≦
2%, Guaranteed by design, not subject to production testing.
b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.
DCC
正式發行
Jan, 2015
–
Ver1.1
02
N-Channel 75-V (D-S) MOSFET
Typical Characteristics (T
J
=25
℃
Noted)
DCC
正式發行
Jan, 2015
–
Ver1.1
03
N-Channel 75-V (D-S) MOSFET
Typical Characteristics (T
J
=25
℃
Noted)
DCC
正式發行
Jan, 2015
–
Ver1.1
04
N-Channel 75-V (D-S) MOSFET
TO252-3L Package Outline
MAX
2.50
0.90
0.90
6.30
2.90
6.75
5.50
1.80
1.10
SYMBOL
MIN
2.10
0.40
0.40
A
B
C
5.30
2.20
6.30
4.80
0.90
0.50
0.00
8.90
D
D1
E
E1
L1
L2
L3
H
0.20
10.40
DCC
P
2.30 BSC
正式發行
Jan, 2015
–
Ver1.1
05
