MATSUKI-ME7423S-G
| Part # | MATSUKI-ME7423S-G |
| Download | MATSUKI-ME7423S-G |
ME7423S-G
P-Channel Enhancement Mosfet
GENERAL DESCRIPTION
FEATURES
●
R
DS(ON)
≦
13m
Ω
@V
GS
=-10V
The ME7423 P-Channel logic enhancement mode power field effect
transistors are produced using high cell density, DMOS trench
technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching , and low in-line power loss are needed in
a very small outline surface mount package.
●
R
DS(ON)
≦17
m
Ω
@
V
GS
=-4.5V
APPLICATIONS
●
Power Management in Note book
●
Portable Equipment
●
Battery Powered System
●
Load Switch
●
DSC
PIN CONFIGURATION
(DFN 3.3×3.3)
T
o
p View
e
Ordering Information
:ME7423S-G (Green product-Halogen free)
Absolute Maximum Ratings
(T
j
=25
℃
Unless Otherwise Noted)
Parameter
Symbol
V
DSS
Maximum
Unit
V
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
-30
±20
V
GSS
V
T
A
=25
℃
T
A
=70
℃
-17
I
D
A
A
Current(tJ=150
℃
)
-13
Pulsed Drain Current
I
DM
P
D
68
T
A
=25
℃
T
A
=70
℃
3.8
Maximum Power Dissipation
W
2.4
℃
Operating Junction
T
e
mperature
T
J
-55 to 150
℃/W
Thermal Resistance-Junction to
Ambient
R
θ
JA
33
The device mounted on 1in
2
FR4 board with 2 oz copper
01
Jan, 2011-Ver1.1
ME7423S-G
P-Channel Enhancement Mosfet
Electrical Characteristics
(T
A
=25
℃
Unless Otherwise Specified)
Symbol
STATIC
BV
DSS
V
GS(th)
I
GSS
Parameter
Limit
Min
Typ
Max Unit
V
GS
=0
V
, I
D
=-250
μ
A
V
DS
=V
GS
, I
D
=-250
μ
A
V
DS
=0
V
, V
GS
=±20V
V
DS
=30
V
,
V
GS
=0V
Drain-Source Breakdown Voltage
Gate Threshold Voltage
-30
-1
V
-3
±100
1
V
Gate Leakage Current
nA
μ
A
I
DSS
Zero Gate Voltage Drain Current
V
GS
=-10
V
, I
D
=-11.7A
10
13
Drain-Source On-State Resistance
a
Diode Forward Voltage
m
Ω
R
DS(ON)
V
GS
=-4.5
V
, I
D
=-9A
I
S
=-9A, V
GS
=0V
13
17
V
SD
0.8
1.2
V
DYNAMIC
T
o
tal Gate Charge
(-10V)
Qg
70
V
DS
=-15
V
,V
GS
=-10
V
,
I
D
=-11.7A
Qg
T
o
tal Gate Charge
(-4.5V)
Gate-Source Charge
Gate-Drain Charge
35
13
nC
Qgs
Qgd
C
iss
C
oss
C
rss
t
d(on)
t
r
17
Input Capacitance
3020
400
135
47
V
DS
=-15
V
, V
GS
=0
V
,f=1MHz
pF
ns
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
V
DS
=-15
V
,
R
L
=15
Ω
R
GEN
=6
Ω
, V
GS
=-10V
20
Turn-Off Delay Time
Turn-Off Fall Time
212
61
t
d(off)
t
f
Notes: a. Pulse test: pulse width
≦
300us, duty cycle
≦
2%,Guaranteed by design, not subject to production testing.
b
.
Matsuki reserves the right to improve product design, functions and reliability without notice.
02
Jan, 2011-Ver1.1
ME7423S-G
P-Channel Enhancement Mosfet
Typical Characteristics (T
J
=25
℃
Noted)
03
Jan, 2011-Ver1.1
ME7423S-G
P-Channel Enhancement Mosfet
Typical Characteristics (T
J
=25
℃
Noted)
04
Jan, 2011-Ver1.1
ME7423S-G
P-Channel Enhancement Mosfet
DFN(S) 3.3×3.3 Package Outline
MILLIMETERS (mm)
SYMBOL
MIN
NOM
0.75
0.32
0.15
MAX
A
b
c
0.70
0.27
0.10
0.80
0.37
0.25
D
3.20
2.95
1.70
–
3.30
3.05
1.83
3.40
3.15
1.96
–
D1
D2
D3
E
0.20
3.30
3.20
2.95
–
3.40
3.15
–
E1
E2
e
3.05
2.29
0.65BSC
0.40
θ
L
0.30
0.06
0
0.50
0.20
12
°
–
0.13
1
0°
L1
M
–
0.13
05
Jan, 2011-Ver1.1
