Microchip-Tech-APT19M120J
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APT19M120J
1200V, 19A, 0.53
Ω
Max
N-Channel MOSFET
S
S
Power MOS 8
™
is a high speed, high voltage N-channel switch-mode power MOSFE
T
.
A proprietary planar stripe design yields excellent reliability and manufacturability.
Low
switching loss is achieved with low input capacitance and ultra low C
rss
“Miller” capaci-
tance. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency.
Reliability in
fl
yback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
7
2
D
-2
G
T
O
S
“UL Recognized”
file # E145592
IS OTO P
®
D
S
APT19M120J
Single die MOSFET
G
FEATURES
TYPICAL APPLICATIONS
• PFC
and other boost converter
• Fast
switching with low EMI/RFI
• Buck
converter
• Low
R
DS(on)
• Two
switch forward (asymmetrical bridge)
• Single
switch forward
• Flyback
• Ultra
low C
rss
for improved noise immunity
• Low
gate charge
• Avalanche
energy rated
• RoHS
compliant
• Inverters
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
19
Continuous Drain Current @ T
C
= 25°C
I
D
Continuous Drain Current @ T
C
= 100°C
12
A
Pulsed Drain Current
1
I
DM
V
GS
E
AS
I
AR
104
±30
2165
14
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy
2
Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
545
Unit
P
D
T
o
tal Power Dissipation @ T
C
= 25°C
W
R
θ
JC
Junction to Case Thermal Resistance
0.23
°C/W
R
θ
CS
Case to Sink Thermal Resistance, Flat, Greased Surface
Operating and Storage Junction
T
e
mperature Range
RMS Voltage
(50-60hHz Sinusoidal Waveform from
T
e
rminals to Mounting Base for 1 Min.)
0.15
T
J
,T
STG
V
Isolation
°C
V
-55
150
2500
oz
g
1.03
29.2
W
T
Package Weight
in·lbf
N·m
10
T
o
rque
T
e
rminals and Mounting Screws.
1.1
Static Characteristics
T =
25°C unless otherwise speci
fi
ed
J
APT19M120J
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Symbol
V
BR(DSS)
V
= 0V
,
I =
250
μ
A
Drain-Source Breakdown Voltage
Breakdown Voltage
T
e
mperature Coef
fi
cient
Drain-Source On Resistance
3
Gate-Source Threshold Voltage
Threshold Voltage
T
e
mperature Coef
fi
cient
1200
GS
D
∆
V
BR(DSS)
/
∆
T
J
Reference to 25°C, I
= 250
μ
A
D
V/°C
Ω
1.41
0.45
4
V
= 10V
,
I =
14A
D
R
DS(on)
V
GS(th)
0.53
5
GS
V
3
V
= V
DS
,
I =
2.5mA
D
GS
∆
V
GS(th)
/
∆
T
J
mV/°C
-10
V
= 1200V
= 0V
T =
25°C
J
100
500
DS
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
μ
A
V
T =
125°C
J
GS
V
= ±30V
nA
±100
GS
Dynamic Characteristics
T =
25°C unless otherwise speci
fi
ed
J
Symbol
Parameter
Test Conditions
Min
Typ
31
Max
Unit
g
fs
V
= 50V
,
I =
14A
S
Forward Transconductance
Input Capacitance
DS
D
C
iss
C
rss
C
oss
9670
115
715
V
= 0V
,
V =
25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
pF
4
C
o(cr)
275
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
V
= 0V
,
V =
0V to 800V
DS
GS
5
C
o(er)
140
Q
g
Q
gs
Q
gd
t
d(on)
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
300
50
V
= 0 to 10V
,
I =
14A,
GS
D
nC
ns
V
= 600V
DS
140
50
Resistive Switching
V =
800V
,
I =
14A
DD
t
r
t
d(off)
t
f
31
D
R
= 2.2
Ω
6
,
V
= 15V
GG
170
48
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
D
S
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
I
S
19
A
G
Pulsed Source Current
(Body Diode)
1
I
SM
104
1
V
SD
t
rr
I
= 14A
,
T =
25°C, V
= 0V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
SD
J
GS
3
I
= 14A
1290
33
ns
μ
C
SD
Q
rr
di
SD
/
dt = 100A/
μ
s, T
= 25°C
J
I
≤
14A, di/dt
≤
1000A/
μ
s, V
= 100V,
SD
DD
V/ns
dv/dt
Peak Recovery dv/dt
10
T =
125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at T
J
= 25°C, L = 22.09mH, R
G
= 2.2
Ω
, I
AS
= 14A.
Pulse test: Pulse Width < 380
μ
s, duty cycle
< 2%.
4
5
C
o(cr)
is de
fi
ned as a
fi
xed capacitance with the same stored charge as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
C
o(er)
is de
fi
ned as a
fi
xed capacitance with the same stored energy as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
T
o
c
alculate C
o(er)
for any value of
V
DS
less than V
(BR)DSS,
use this equation:
C
o(er)
= -4.40E-7/V
DS
^2 + 5.34E-8/V
DS
+ 7.59E-11.
6
R
G
is external gate resistance, not including internal gate resistance or gate driver impedance.
(MIC4452)
Microsemi reserves the right to change, without notice, the speci
fi
cations and information contained herein.
APT19M120J
90
80
70
60
50
40
30
20
10
0
30
25
20
15
10
V
= 10V
T
= 125°C
GS
J
V
GS
= 6, 7, 8 & 9V
T
J
= -55°C
5V
T
J
= 25°C
5
0
4.5V
T
J
= 125°C
T
J
= 150°C
0
5
10
15
20
25
30
0
0
0
5
10
15
20
25
30
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figure 1,
Output Characteristics
Figure 2,
Output Characteristics
100
80
3.0
2.5
2.0
1.5
1.0
0.5
0
NORMALIZED TO
= 10V
14A
V
DS
> I
D(ON)
x R
DS(ON)
MAX.
250
μ
SEC. PULSE TEST
V
@
GS
@ <0.5 % DUTY CYCLE
60
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
40
20
0
-55 -25
0
25 50 75
100 125 150
1
2
3
4
5
6
7
8
T , JUNCTION
TEMPERATURE (°C)
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figure 3,
R
vs Junction Temperature
Figure 4,
Transfer Characteristics
DS(ON)
40
35
30
25
20
15
10
20,000
10,000
C
iss
T
J
= -55°C
T
J
= 25°C
1000
T
J
= 125°C
C
oss
100
10
C
rss
5
0
0
2
4
6
8
10 12
14 16
200
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
400
600
800 1000
1200
I ,
DRAIN CURRENT (A)
V
D
Figure 5,
Gain vs Drain Current
Figure 6, Capacitance vs Drain-to-Source Voltage
16
14
12
10
8
100
I
= 14A
D
90
80
70
60
50
40
30
20
V
DS
=
240V
V
DS
=
600V
T
J
= 25°C
T
J
= 150°C
6
V
DS
=
960V
4
2
10
0
0
0
50 100
150 200 250 300 350 400
0
0.2
V ,
SOURCE-TO-DRAIN VOLTAGE (V)
SD
0.4
0.6
0.8
1.0
1.2
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7, Gate Charge vs Gate-to-Source Voltage
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
APT19M120J
200
100
200
100
I
I
DM
DM
R
ds(on)
10
10
1
100ms
DC line
13
μ
s
100
μ
s
13
μ
s
100
μ
s
1ms
10ms
1ms
T
=
150°C
J
1
T
C
=
25°C
R
10ms
ds(on)
Scaling for Different Case & Junction
T
e
mperatures:
100ms
T
=
125°C
J
I
D
=
I
D(T =
25
°
C)
*(
T
–
T
C
)/125
T
C
=
75°C
DC line
J
C
0.1
0.1
1
10
100
1200
1
10
100
1200
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
DS
Figure 9, Forward Safe Operating Area
Figure 10, Maximum Forward Safe Operating Area
0.25
0.20
0.15
0.10
D = 0.9
0.7
0.5
Note:
t
1
0.3
t
2
t
= Pulse Duration
t
1
0.05
0
1
t
/
2
+ T
Duty Factor D =
Peak T
= P
0.1
x Z
J
DM
θJC C
SINGLE PULSE
0.05
10
-5
10
-4
10
-3
10
-2
10
-1
1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
SOT-227 (ISOTOP
®
) Package Outline
11.8 (.463)
12.2 (.480)
31.5 (1.240)
31.7 (1.248)
8.9 (.350)
9.6 (.378)
W=4.1 (.161)
W=4.3 (.169)
H=4.8 (.187)
H=4.9 (.193)
(4 places)
7.8 (.307)
8.2 (.322)
Hex Nut M
4
(4 places
)
25.2 (0.992)
25.4 (1.000)
r = 4.0 (.157)
(2 places)
4.0 (.157)
4.2 (.165)
(2 places)
0.75 (.030)
12.6 (.496)
0.85 (.033)
12.8 (.504)
3.3 (.129)
3.6 (.143)
1.95 (.077)
2.14 (.084)
14.9 (.587)
* Source
Drai n
*
15.1 (.594)
30.1 (1.185)
30.3 (1.193)
Emitter terminals are shorte
d
internally. Current handlin
g
capability is equal for either
Source terminal
.
38.0 (1.496)
38.2 (1.504)
* Source
Gate
