Microchip-Tech-APT25M100J
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APT25M100J
1000V, 25A, 0.33
Ω
Max
N-Channel MOSFET
S
S
Power MOS 8
™
is a high speed, high voltage N-channel switch-mode power MOSFE
T
.
A proprietary planar stripe design yields excellent reliability and manufacturability.
Low
switching loss is achieved with low input capacitance and ultra low C
rss
“Miller” capaci-
tance. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency.
Reliability in
fl
yback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
7
2
D
-2
G
T
O
S
“UL Recognized”
file # E145592
IS OTO P
®
D
S
APT25M100J
Single die MOSFET
G
FEATURES
TYPICAL APPLICATIONS
• PFC
and other boost converter
• Fast
switching with low EMI/RFI
• Buck
converter
• Low
R
DS(on)
• Two
switch forward (asymmetrical bridge)
• Single
switch forward
• Flyback
• Ultra
low C
rss
for improved noise immunity
• Low
gate charge
• Avalanche
energy rated
• RoHS
compliant
• Inverters
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
25
Continuous Drain Current @ T
C
= 25°C
I
D
Continuous Drain Current @ T
C
= 100°C
16
A
Pulsed Drain Current
1
I
DM
V
GS
E
AS
I
AR
140
±30
2165
18
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy
2
Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
545
Unit
P
D
T
o
tal Power Dissipation @ T
C
= 25°C
W
R
θ
JC
Junction to Case Thermal Resistance
0.23
°C/W
R
θ
CS
Case to Sink Thermal Resistance, Flat, Greased Surface
Operating and Storage Junction
T
e
mperature Range
RMS Voltage
(50-60hHz Sinusoidal Waveform from
T
e
rminals to Mounting Base for 1 Min.)
0.15
T
J
,T
STG
V
Isolation
°C
V
-55
150
2500
oz
g
1.03
29.2
W
T
Package Weight
in·lbf
N·m
10
T
o
rque
T
e
rminals and Mounting Screws.
1.1
Static Characteristics
T =
25°C unless otherwise speci
fi
ed
J
APT25M100J
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Symbol
V
BR(DSS)
V
= 0V
,
I =
250
μ
A
Drain-Source Breakdown Voltage
Breakdown Voltage
T
e
mperature Coef
fi
cient
Drain-Source On Resistance
3
Gate-Source Threshold Voltage
Threshold Voltage
T
e
mperature Coef
fi
cient
1000
GS
D
∆
V
BR(DSS)
/
∆
T
J
Reference to 25°C, I
= 250
μ
A
D
V/°C
Ω
1.15
0.29
4
V
= 10V
,
I =
18A
D
R
DS(on)
V
GS(th)
0.33
5
GS
V
3
V
= V
DS
,
I =
2.5mA
D
GS
∆
V
GS(th)
/
∆
T
J
mV/°C
-10
V
= 1000V
= 0V
T =
25°C
J
100
500
DS
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
μ
A
V
T =
125°C
J
GS
V
= ±30V
nA
±100
GS
Dynamic Characteristics
T =
25°C unless otherwise speci
fi
ed
J
Symbol
Parameter
Test Conditions
Min
Typ
39
Max
Unit
g
fs
V
= 50V
,
I =
18A
S
Forward Transconductance
Input Capacitance
DS
D
C
iss
C
rss
C
oss
9835
130
825
V
= 0V
,
V =
25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
pF
4
C
o(cr)
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
335
170
V
= 0V
,
V =
0V to 667V
DS
GS
5
C
o(er)
Q
g
Q
gs
Q
gd
t
d(on)
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
305
55
V
= 0 to 10V
,
I =
18A,
GS
D
nC
ns
V
= 500V
DS
145
44
Resistive Switching
V =
667V
,
I =
18A
DD
t
r
t
d(off)
t
f
40
D
R
= 2.2
Ω
6
,
V
= 15V
GG
150
38
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
D
S
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
I
S
25
A
G
Pulsed Source Current
(Body Diode)
1
I
SM
140
1
V
SD
t
rr
I
= 18A
,
T =
25°C, V
= 0V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
SD
J
GS
3
I
= 18A
1165
33
ns
μ
C
SD
Q
rr
di
SD
/
dt = 100A/
μ
s, T
= 25°C
J
I
≤
18A, di/dt
≤
1000A/
μ
s, V
= 100V,
SD
DD
V/ns
dv/dt
Peak Recovery dv/dt
10
T =
125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at T
J
= 25°C, L = 13.36mH, R
G
= 2.2
Ω
, I
AS
= 18A.
Pulse test: Pulse Width < 380
μ
s, duty cycle
< 2%.
4
5
C
o(cr)
is de
fi
ned as a
fi
xed capacitance with the same stored charge as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
C
o(er)
is de
fi
ned as a
fi
xed capacitance with the same stored energy as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
T
o
c
alculate C
o(er)
for any value of
V
DS
less than V
(BR)DSS,
use this equation:
C
o(er)
= -2.85E-7/V
DS
^2 + 5.04E-8/V
DS
+ 9.75E-11.
6
R
G
is external gate resistance, not including internal gate resistance or gate driver impedance.
(MIC4452)
Microsemi reserves the right to change, without notice, the speci
fi
cations and information contained herein.
APT25M100J
120
100
80
60
40
20
0
40
35
30
25
20
15
10
5
V
= 10V
T
= 125°C
GS
J
V
GS
= 6, 7, 8 & 9V
T
J
= -55°C
T
J
= 25°C
5V
T
J
= 125°C
T
J
= 150°C
4.5V
0
0
5
10
15
20
25
30
0
0
0
5
10
15
20
25
30
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figure 1,
Output Characteristics
Figure 2,
Output Characteristics
3.0
2.5
2.0
1.5
1.0
140
120
100
80
NORMALIZED TO
= 10V
18A
V
DS
> I
D(ON)
x R
DS(ON)
MAX.
250
μ
SEC. PULSE TEST
V
@
GS
@ <0.5 % DUTY CYCLE
T
J
= -55°C
60
T
J
= 25°C
40
T
J
= 125°C
0.5
0
20
0
-55 -25
0
25 50 75
100 125 150
1
2
3
4
5
6
7
8
T , JUNCTION
TEMPERATURE (°C)
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figure 3,
R
vs Junction Temperature
Figure 4,
Transfer Characteristics
C
iss
DS(ON)
20,000
10,000
50
40
30
20
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
1000
C
oss
100
10
10
0
C
rss
0
5
10
15
20
25
200
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
400
600
800
1000
I ,
DRAIN CURRENT (A)
V
D
Figure 5,
Gain vs Drain Current
Figure 6, Capacitance vs Drain-to-Source Voltage
16
14
12
10
8
140
I
= 18A
D
120
100
80
V
DS
=
200V
V
DS
=
500V
T
J
= 25°C
60
6
T
J
= 150°C
V
DS
=
800V
40
4
20
0
2
0
0
50 100
150 200 250 300 350 400
0
0.3
0.6
0.9
1.2
1.5
Q ,
TOTAL GATE CHARGE (nC)
V
SD
, SOURCE-TO-DRAIN VOLTAGE (V)
g
Figure 7, Gate Charge vs Gate-to-Source Voltage
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
APT25M100J
200
100
200
100
I
I
DM
DM
10
1
10
1
13
μ
s
100
μ
s
1ms
13
μ
s
100
μ
s
1ms
10ms
R
ds(on)
10ms
T
=
150°C
100ms
DC line
J
R
ds(on)
T
C
=
25°C
100ms
DC line
Scaling for Different Case & Junction
T
e
mperatures:
T
=
125°C
C
=
75°C
J
T
I
D
=
I
D(T =
25
°
C)
*(
T
–
T
C
)/125
J
C
0.1
0.1
1
10
100
1000
1
10
100
1000
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
DS
Figure 9, Forward Safe Operating Area
Figure 10, Maximum Forward Safe Operating Area
0.25
0.20
0.15
0.10
D = 0.9
0.7
0.5
Note:
t
1
0.3
t
2
t
= Pulse Duration
t
1
0.05
0
1
t
/
2
+ T
Duty Factor D =
Peak T
= P
0.1
x Z
J
DM
θJC C
SINGLE PULSE
0.05
10
-5
10
-4
10
-3
10
-2
10
-1
1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
SOT-227 (ISOTOP
®
) Package Outline
11.8 (.463)
12.2 (.480)
31.5 (1.240)
31.7 (1.248)
8.9 (.350)
9.6 (.378)
W=4.1 (.161)
W=4.3 (.169)
H=4.8 (.187)
H=4.9 (.193)
(4 places)
7.8 (.307)
8.2 (.322)
Hex Nut M
4
(4 places
)
25.2 (0.992)
25.4 (1.000)
r = 4.0 (.157)
(2 places)
4.0 (.157)
4.2 (.165)
(2 places)
0.75 (.030)
12.6 (.496)
0.85 (.033)
12.8 (.504)
3.3 (.129)
3.6 (.143)
1.95 (.077)
2.14 (.084)
14.9 (.587)
* Source
Drai n
*
15.1 (.594)
30.1 (1.185)
30.3 (1.193)
Emitter terminals are shorte
d
internally. Current handlin
g
capability is equal for either
Source terminal
.
38.0 (1.496)
38.2 (1.504)
* Source
Gate
Dimensions in Millimeters (Inches)
