Microchip-Tech-APT38F80B2

Part #	Microchip-Tech-APT38F80B2
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APT38F80B2

APT38F80L

800

1A, 0.24

Max, t

≤

300ns

N-Channel FREDFET

Power MOS 8

™

is a high speed, high voltage N-channel switch-mode power MOSFE

–

Max

TO-264

This ‘FREDFET’ version has a drain-source (body) diode that has been optimized for

high reliability in ZVS phase shifted bridge and other circuits through reduced t

, soft

recover

nd high recovery dv/dt capabilit

ow gate charge, high gain, and a greatly

reduced ratio of C

/C result

in excellent noise immunity and low switching loss.

The

rss iss

APT38F80B2

APT38F80L

intrinsic gate resistance and capacitance of the poly-silicon gate structure help control

di/dt during switching, resulting in low EMI and reliable paralleling, even when switching

at very high frequenc

Single die FREDFET

FEATURES

TYPICAL APPLICATIONS

• ZVS

phase shifted and other full bridge

• Fast

switching with low EMI

• Half

bridge

• Low

t for

high reliability

• PFC

and other boost converter

• Buck

converter

• Ultra

low C

for improved noise immunity

rss

• Low

gate charge

• Single

and two switch forward

• Flyback

• Avalanche

energy rated

• RoHS

compliant

Absolute Maximum Ratings

Symbol Parameter

Unit

Ratings

Continuous Drain Current @ T

= 25°C

Continuous Drain Current @ T

= 100°C

Pulsed Drain Current

150

±±0

1710

Gate-Source Voltage

Single Pulse Avalanche Energy

Avalanche Current, Repetitive or Non-Repetitive

Thermal and Mechanical Characteristics

Symbol Characteristic

Min

Typ

Max

1040

0.12

Unit

tal Power Dissipation @ T

= 25°C

Junction to Case Thermal Resistance

°C/W

°C

0.11

Case to Sink Thermal Resistance, Flat, Greased Surface

STG

-55

150

±00

Operating and Storage Junction

mperature Range

Soldering

mperature for 10 Seconds (1.6mm from case)

0.22

6.2

Package Weight

in·lbf

N·m

rque

Mounting

rque ( TO-264 Package), 4-40 or M± screw

1.1

MicrosemiWebsite-http://www.microsemi.com

Static Characteristics

T =

25°C unless otherwise speciﬁed

APT38F80B2_L

Parameter

Test Conditions

Min

Typ

Max

Unit

Symbol

BR(DSS)

= 0V

I =

250µA

Drain-Source Breakdown Voltage

Breakdown Voltage

mperature Coefﬁcient

Drain-Source On Resistance

Gate-Source Threshold Voltage

Threshold Voltage

mperature Coefﬁcient

800

BR(DSS)

Reference to 25°C, I

= 250µA

V/°C

0.87

0.19

= 10V

I =

20A

DS(on)

GS(th)

0.24

2.5

= V

I =

2.5mA

GS(th)

mV/°C

-10

= 800V

= 0V

T =

25°C

250

1000

±100

DSS

GSS

Zero Gate Voltage Drain Current

Gate-Source Leakage Current

µA

T =

125°C

= ±±0V

Dynamic Characteristics

T =

25°C unless otherwise speciﬁed

Symbol

Parameter

Test Conditions

Min

Typ

±8

Max

Unit

= 50V

I =

20A

Forward

ansconductance

Input Capacitance

iss

rss

oss

8070

140

805

= 0V

V =

25V

Reverse

ansfer Capacitance

Output Capacitance

f = 1MHz

o(cr)

Effective Output Capacitance, Charge Related

Effective Output Capacitance, Energy Related

±80

= 0V

V =

0V to 5±±V

o(er)

190

d(on)

tal Gate Charge

Gate-Source Charge

Gate-Drain Charge

rn-On Delay Time

Current Rise Time

rn-Off Delay Time

Current Fall Time

260

= 0 to 10V

I =

20A,

= 400V

1±5

Resistive Switching

V =

5±±V

I =

20A

d(off)

= 2.2

= 15V

200

Source-Drain Diode Characteristics

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

Continuous Source Current

(Body Diode)

MOSFET symbol

showing the

integral reverse p-n

junction diode

(body diode)

Pulsed Source Current

(Body Diode)

150

= 20A

T =

25°C, V

= 0V

Diode Forward Voltage

±00

600

T =

25°C

250

485

Reverse Recovery Time

Reverse Recovery Charge

Reverse Recovery Current

Peak Recovery dv/dt

T =

125°C

= 20A

T =

25°C

µC

= 100V

T =

125°C

6.7

1±

dt = 100A/µs

T =

25°C

rrm

T =

125°C

≤

20A, di/dt

≤

1000A/µs, V

= 5±±

dv/dt

V/ns

T =

125°C

Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.

Starting at T

= 25°C, L = 8.55mH, R

= 25

, I

= 20A.

Pulse test: Pulse Width < ±80µs, duty cycle

< 2%.

o(cr)

is deﬁned as a ﬁxed capacitance with the same stored charge as C

OSS

with V

= 67% of V

(BR)DSS

o(er)

is deﬁned as a ﬁxed capacitance with the same stored energy as C

OSS

with V

= 67% of V

(BR)DSS

alculate C

o(er)

for any value of

less than V

(BR)DSS,

use this equation:

o(er)

= -2.17E-7/V

^2 + 2.6±E-8/V

+ ±.74E-11.

is external gate resistance, not including internal gate resistance or gate driver impedance.

(MIC4452)

Microsemi reserves the right to change, without notice, the speciﬁcations and information contained herein.

APT38F80B2_L

±0

100

±0

= 10V

= 125°C

_{GS
= 10, & 15V}

_{GS
= 6, & 6.5V}

= -55°C

5.5V

= 25°C

= 125°C

= 150°C

4.5V

±0

, DRAIN-TO-SOURCE VO

TAGE (V)

, DRAIN-TO-SOURCE VO

TAGE (V)

DS(ON)

Figure 1,

Output Characteristics

Figure 2,

Output Characteristics

150

125

100

±.0

2.5

2.0

1.5

1.0

NORMALIZED TO

= 10V

20A

> I

D(ON)

x R

DS(ON)

MAX.

250µSEC. PULSE TEST

@ <0.5 % DUTY CYCLE

= -55°C

= 25°C

= 125°C

0.5

-55 -25

25 50 75

100 125 150

T , JUNCTION

TEMPER

URE (°C)

, G

E-TO-SOURCE VO

TAGE (V)

Figure 3,

vs Junction Temperature

Figure 4, Transfer Characteristics

DS(ON)

20,000

10,000

±0

iss

= -55°C

= 25°C

= 125°C

1,000

100

oss

rss

±0

±5

200

, DRAIN-TO-SOURCE VO

TAGE (V)

400

600

800

I ,

DRAIN CURRENT (A)

Figure 5,

Gain vs Drain Current

Figure 6, Capacitance vs Drain-to-Source Voltage

150

= 20A

125

100

160V

400V

= 25°C

= 150°C

640V

50 100

150 200 250 ±00 ±50 400

0.±

0.6

0.9

1.2

1.5

Q ,

TOTAL GATE CHARGE (nC)

V ,

SOURCE-TO-DRAIN VO

TAGE (V)

Figure 7, Gate Charge vs Gate-to-Source Voltage

Figure 8, Reverse Drain Current vs Source-to-Drain Voltage

APT38F80B2_L

200

100

200

100

ds(on)

1±µs

100µs

1±µs

100µs

1ms

10ms

100ms

DC line

1ms

10ms

ds(on)

150°C

_C
=
25°C

100ms

DC line

Scaling for Different Case & Junction

mperatures:

125°C

_C
=
75°C

_{D
=
I
D(T =

25
°
C)
*(
T
–
T
C
)/125}

0.1

100

1000

, DRAIN-TO-SOURCE VO

TAGE (V)

100

1000

, DRAIN-TO-SOURCE VO

TAGE (V)

Figure 9, Forward Safe Operating Area

Figure 10, Maximum Forward Safe Operating Area

0.14

0.12

0.10

0.08

0.06

0.04

0.02

D = 0.9

0.7

Note:

0.5

0.±

= Pulse Duration

SINGLE PULSE

Duty Factor D =

0.1

Peak T

= P

x Z

+ T

JC C

0.05

-5

-4

-±

-2

-1

1.0

REC

NGULAR PULSE DUR

ION (seconds)

Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration

TO-264 (L) Package Outline

–

MAX (B2)

Package Outline

e± 100% Sn Plated

4.69 (.185)

5.±1 (.209)

4.60 (.181)

15.49 (.610)

16.26 (.640)

5.21 (.205)

19.51 (.768)

20.50 (.807)

1.49 (.059)

2.49 (.098)

1.80 (.071)

2.01 (.079)

±.10 (.122)

±.48 (.1±7)

5.±8 (.212)

6.20 (.244)

5.79 (.228)

6.20 (.244)

20.80 (.819)

21.46 (.845)

25.48 (1.00±)

26.49 (1.04±)

2.87 (.11±)

±.12 (.12±)

4.50 (.177) Max.

2.29 (.090)

2.69 (.106)

2.29 (.090)

2.69 (.106)

1.65 (.065)

2.1± (.084)

0.40 (.016)

0.79 (.0±1)

19.81 (.780)

20.±2 (.800)

19.81 (.780)

21.±9 (.842)

Gate

Drain

Source

Gate

Drain

Source

1.01 (.040)

1.40 (.055)

0.48 (.019)

0.84 (.0±±)

2.59 (.102)

±.00 (.118)

0.76 (.0±0)

1.±0 (.051)

2.21 (.087)

2.59 (.102)

2.79 (.110)

5.45 (.215) BSC

2-Plcs.

±.18 (.125)

5.45 (.215) BSC

2-Plcs.

Dimensions in Millimeters and (Inches)

These dimensions are equal to the TO-247 without the mounting hole.

Dimensions in Millimeters and (Inches)

Microsemi’s products are covered by one or more of U.S.patents 4,895,810

5,045,90± 5,089,4±4 5,182,2±4 5,019,522

5,262,±±6 6,50±,786

5,256,58± 4,748,10± 5,28±,202 5,2±1,474 5,4±4,095 5,528,058

and foreign patents.

US and Foreign patents pending.

Microchip-Tech-APT38F80B2

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