Microchip-Tech-APT56M60L
| Part # | Microchip-Tech-APT56M60L |
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APT56M60B2
APT56M60L
600V, 60A, 0.11
Ω
Max
N-Channel MOSFET
T-Ma
x
TM
TO-264
Power MOS 8
™
is a high speed, high voltage N-channel switch-mode power MOSFE
T
.
A proprietary planar stripe design yields excellent reliability and manufacturability.
Low
switching loss is achieved with low input capacitance and ultra low C
rss
“Miller” capaci-
tance. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency.
Reliability in
fl
yback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
APT56M60B2
APT56M60L
D
S
Single die MOSFET
G
FEATURES
TYPICAL APPLICATIONS
• PFC
and other boost converter
• Fast
switching with low EMI/RFI
• Buck
converter
• Low
R
DS(on)
• Two
switch forward (asymmetrical bridge)
• Single
switch forward
• Flyback
• Ultra
low C
rss
for improved noise immunity
• Low
gate charge
• Avalanche
energy rated
• RoHS
compliant
• Inverters
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
60
Continuous Drain Current @ T
C
= 25°C
I
D
Continuous Drain Current @ T
C
= 100°C
38
A
Pulsed Drain Current
1
I
DM
V
GS
E
AS
I
AR
210
±30
1580
28
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy
2
Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
1040
0.12
Unit
P
D
T
o
tal Power Dissipation @ T
C
= 25°C
W
R
θ
JC
Junction to Case Thermal Resistance
°C/W
°C
R
θ
CS
0.11
Case to Sink Thermal Resistance, Flat, Greased Surface
T
J
,T
STG
-55
150
300
Operating and Storage Junction
T
e
mperature Range
T
L
Soldering
T
e
mperature for 10 Seconds (1.6mm from case)
oz
g
0.22
6.2
W
T
Package Weight
in·lbf
N·m
10
T
o
rque
Mounting
T
o
rque ( TO-264 Package), 4-40 or M3 screw
1.1
Static Characteristics
T =
25°C unless otherwise speci
fi
ed
J
APT56M60B2_L
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Symbol
V
BR(DSS)
V
= 0V
,
I =
250
μ
A
Drain-Source Breakdown Voltage
Breakdown Voltage
T
e
mperature Coef
fi
cient
Drain-Source On Resistance
3
Gate-Source Threshold Voltage
Threshold Voltage
T
e
mperature Coef
fi
cient
600
GS
D
∆
V
BR(DSS)
/
∆
T
J
Reference to 25°C, I
= 250
μ
A
D
V/°C
Ω
0.57
0.09
4
V
= 10V
,
I =
28A
D
R
DS(on)
V
GS(th)
0.11
5
GS
V
3
V
= V
DS
,
I =
2.5mA
D
GS
∆
V
GS(th)
/
∆
T
J
mV/°C
-10
V
= 600V
= 0V
T =
25°C
J
100
500
DS
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
μ
A
V
T =
125°C
J
GS
V
= ±30V
nA
±100
GS
Dynamic Characteristics
T =
25°C unless otherwise speci
fi
ed
J
Symbol
Parameter
Test Conditions
Min
Typ
55
Max
Unit
g
fs
V
= 50V
,
I =
28A
S
Forward Transconductance
Input Capacitance
DS
D
C
iss
C
rss
C
oss
11300
115
V
= 0V
,
V =
25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
1040
pF
4
C
o(cr)
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
550
285
V
= 0V
,
V =
0V to 400V
DS
GS
5
C
o(er)
Q
g
Q
gs
Q
gd
t
d(on)
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
280
60
V
= 0 to 10V
,
I =
28A,
GS
D
nC
ns
V
= 300V
DS
120
65
Resistive Switching
V =
400V
,
I =
28A
DD
t
r
t
d(off)
t
f
75
D
R
= 2.2
Ω
6
,
V
= 15V
GG
190
60
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
D
S
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
I
S
60
A
G
Pulsed Source Current
(Body Diode)
1
I
SM
210
1.0
V
SD
t
rr
I
= 28A
,
T =
25°C, V
= 0V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
SD
J
GS
3
I
= 28A
745
19
ns
μ
C
SD
Q
rr
di
SD
/
dt = 100A/
μ
s, T
= 25°C
J
I
≤
28A, di/dt
≤
1000A/
μ
s, V
= 100V,
SD
DD
V/ns
dv/dt
Peak Recovery dv/dt
8
T =
125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at T
J
= 25°C, L = 4.03mH, R
G
= 25
Ω
, I
AS
= 28A.
Pulse test: Pulse Width < 380
μ
s, duty cycle
< 2%.
4
5
C
o(cr)
is de
fi
ned as a
fi
xed capacitance with the same stored charge as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
C
o(er)
is de
fi
ned as a
fi
xed capacitance with the same stored energy as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
T
o
c
alculate C
o(er)
for any value of
V
DS
less than V
(BR)DSS,
use this equation:
C
o(er)
= -1.10E-7/V
DS
^2 + 4.60E-8/V
DS
+ 1.72E-10.
6
R
G
is external gate resistance, not including internal gate resistance or gate driver impedance.
(MIC4452)
Microsemi reserves the right to change, without notice, the speci
fi
cations and information contained herein.
APT56M60B2_L
90
80
70
60
50
40
30
20
250
200
150
100
V
= 10V
T
= 125°C
GS
J
V
GS
= 7&8V
T
J
= -55°C
6V
T
J
= 25°C
5.5V
50
0
T
J
= 150°C
5V
4.5V
10
0
T
J
= 125°C
15
0
5
10
20
25
30
0
0
0
5
10
15
20
25
30
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figure 1,
Output Characteristics
Figure 2,
Output Characteristics
3.0
2.5
2.0
1.5
1.0
200
180
160
140
120
100
80
NORMALIZED TO
= 10V
28A
V
DS
> I
D(ON)
x R
DS(ON)
MAX.
250
μ
SEC. PULSE TEST
V
@
GS
@ <0.5 % DUTY CYCLE
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
60
40
0.5
0
20
0
-55 -25
0
25 50 75
100 125 150
1
2
3
4
5
6
7
8
T , JUNCTION
TEMPERATURE (°C)
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figure 3,
R
vs Junction Temperature
Figure 4,
Transfer Characteristics
DS(ON)
20,000
10,000
100
80
60
40
20
0
C
iss
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
1000
C
oss
100
10
C
rss
0
10
20
30
40
50
60
70
100
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
200
300
400
500
600
I ,
DRAIN CURRENT (A)
V
D
Figure 5,
Gain vs Drain Current
Figure 6, Capacitance vs Drain-to-Source Voltage
16
14
12
10
8
200
I
= 28A
D
180
160
140
120
100
80
V
DS
=
120V
V
DS
=
300V
T
J
= 25°C
6
T
J
= 150°C
V
DS
=
480V
60
4
40
2
20
0
0
0
50 100
150 200 250 300 350
400
0
0.2 0.4
V ,
SOURCE-TO-DRAIN VOLTAGE (V)
SD
0.6 0.8
1.0 1.2 1.4
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7, Gate Charge vs Gate-to-Source Voltage
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
APT56M60B2_L
250
100
250
100
I
I
DM
DM
13
μ
s
100
μ
s
1ms
10ms
100ms
DC line
13
μ
s
10
1
10
100
μ
s
1ms
R
ds(on)
10ms
R
ds(on)
T
=
150°C
C
=
25°C
100ms
J
1
T
DC line
Scaling for Different Case & Junction
T
e
mperatures:
T
=
125°C
J
I
D
=
I
D(T =
25
°
C)
*(
T
–
T
C
)/125
T
C
=
75°C
J
C
0.1
0.1
1
10
100
800
1
10
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
100
800
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
DS
Figure 9, Forward Safe Operating Area
Figure 10, Maximum Forward Safe Operating Area
0.14
0.12
0.10
0.08
0.06
0.04
D = 0.9
0.7
Note:
0.5
t
1
t
0.3
2
t
= Pulse Duration
t
1
1
t
/
2
+ T
SINGLE PULSE
Duty Factor D =
0.02
0
0.1
Peak T
= P
x Z
J
DM
θJC C
0.05
10
-5
10
-4
10
-3
10
-2
10
-1
1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
T-MAX™ (B2) Package Outline
TO-264 (L) Package Outline
e3 100%
Sn Plated
4.69 (.185)
4.60 (.181)
5.31 (.209)
15.49 (.610)
16.26 (.640)
5.21 (.205)
19.51 (.768)
20.50 (.807)
1.49 (.059)
2.49 (.098)
1.80 (.071)
2.01 (.079)
3.10 (.122)
3.48 (.137)
5.38 (.212)
6.20 (.244)
5.79 (.228)
6.20 (.244)
20.80 (.819)
21.46 (.845)
25.48 (1.003)
26.49 (1.043)
2.87 (.113)
3.12 (.123)
4.50 (.177) Max.
2.29 (.090)
2.69 (.106)
2.29 (.090)
2.69 (.106)
1.65 (.065)
2.13 (.084)
0.40 (.016)
1.016(.040)
19.81 (.780)
20.32 (.800)
19.81 (.780)
21.39 (.842)
Gate
Dra
i
n
Source
Gate
1.01 (.040)
1.40 (.055)
Drai
n
Source
0.48 (.019)
0.84 (.033)
2.59 (.102)
3.00 (.118)
0.76 (.030)
1.30 (.051)
2.21 (.087)
2.59 (.102)
2.79 (.110)
5.45 (.215) BSC
2-Plcs.
3.18 (.125)
5.45 (.215) BSC
2-Plcs.
These dimensions are equal to the TO-247 without the mounting hole.
Dimensions in Millimeters (Inches)
Dimensions in Millimeters (Inches)
