Microchip-Tech-APT6010LFLLG
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APT18F60B
APT18F60S
600V, 19A, 0.37
Ω
Max, t
≤
200ns
rr
N-Channel FREDFET
Power MOS 8
™
is a high speed, high voltage N-channel switch-mode power MOSFE
T
.
D
3
PAK
This ‘FREDFET’ version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced t
, soft
rr
recovery, and high recovery dv/dt capability.
Low gate charge, high gain, and a greatly
reduced ratio of C
/C result
in excellent noise immunity and low switching loss.
The
rss iss
APT18F60B
APT18F60S
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
Single die FREDFET
FEATURES
TYPICAL APPLICATIONS
• ZVS
phase shifted and other full bridge
• Fast
switching with low EMI
• Half
bridge
• Low
t for
high reliability
rr
• PFC
and other boost converter
• Buck
converter
• Ultra
low C
rss
for improved noise immunity
• Low
gate charge
• Single
and two switch forward
• Flyback
• Avalanche
energy rated
• RoHS
compliant
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
19
Continuous Drain Current @ T
C
= 25°C
I
D
Continuous Drain Current @ T
C
= 100°C
12
A
Pulsed Drain Current
1
I
DM
V
GS
E
AS
I
AR
65
±30
495
9
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy
2
Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
335
Unit
P
D
T
o
tal Power Dissipation @ T
C
= 25°C
W
R
θ
JC
0.37
Junction to Case Thermal Resistance
°C/W
°C
R
θ
CS
0.15
Case to Sink Thermal Resistance, Flat, Greased Surface
T
J
,T
STG
-55
150
300
Operating and Storage Junction
T
e
mperature Range
T
L
Soldering
T
e
mperature for 10 Seconds (1.6mm from case)
oz
g
0.22
6.2
W
T
Package Weight
in·lbf
N·m
10
T
o
rque
Mounting
T
o
rque ( TO-247 Package), 6-32 or M3 screw
1.1
Static Characteristics
T =
25°C unless otherwise speci
fi
ed
J
APT18F60B_S
Test Conditions
Parameter
Min
Typ
Max
Unit
V
Symbol
V
BR(DSS)
V
= 0V
,
I =
250
μ
A
Drain-Source Breakdown Voltage
Breakdown Voltage
T
e
mperature Coef
fi
cient
Drain-Source On Resistance
3
Gate-Source Threshold Voltage
Threshold Voltage
T
e
mperature Coef
fi
cient
GS
D
600
Reference to 25°C, I
= 250
μ
A
∆
V
BR(DSS)
/
∆
T
J
D
0.57
.31
4
V/°C
Ω
V
= 10V
,
I =
9A
D
R
DS(on)
V
GS(th)
GS
0.37
5
V
2.5
V
= V
DS
,
I =
1mA
D
GS
∆
V
GS(th)
/
∆
T
J
mV/°C
-10
V
= 600V
= 0V
T =
25°C
J
DS
250
1000
±100
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
μ
A
V
T =
125°C
J
GS
V
= ±30V
GS
nA
Dynamic Characteristics
T =
25°C unless otherwise speci
fi
ed
J
Symbol
Parameter
Test Conditions
Min
Typ
17
Max
Unit
g
fs
V
= 50V
,
I =
9A
S
Forward Transconductance
Input Capacitance
DS
D
C
iss
C
rss
C
oss
3550
36
V
= 0V
,
V =
25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
325
pF
4
C
o(cr)
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
175
90
V
= 0V
,
V =
0V to 400V
DS
GS
V
5
C
o(er)
Q
g
Q
gs
Q
gd
t
d(on)
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
90
19
37
20
23
60
18
= 0 to 10V
,
I =
9A,
GS
D
nC
ns
V
= 300V
DS
Resistive Switching
V =
400V
,
I =
9A
DD
t
r
t
d(off)
t
f
D
R
= 4.7
Ω
6
,
V
= 15V
GG
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
I
S
19
A
Pulsed Source Current
(Body Diode)
1
I
SM
V
SD
t
rr
65
I
= 9A
,
T =
25°C, V
= 0V
Diode Forward Voltage
1
.2
200
380
V
SD
J
GS
T =
25°C
J
175
315
0.65
1.56
6.7
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Peak Recovery dv/dt
ns
T =
125°C
J
3
I
= 9A
T =
25°C
J
SD
Q
rr
μ
C
A
di
SD
/
dt = 100A/
μ
s
= 100V
T =
125°C
J
V
T =
25°C
J
DD
I
rrm
T =
125°C
J
9.2
I
≤
9A, di/dt
≤
1000A/
μ
s, V
= 400V,
SD
DD
dv/dt
V/ns
20
T =
125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at T
J
= 25°C, L = 12.2mH, R
G
= 25
Ω
, I
AS
= 9A.
Pulse test: Pulse Width < 380
μ
s, duty cycle
< 2%.
4
5
C
o(cr)
is de
fi
ned as a
fi
xed capacitance with the same stored charge as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
C
o(er)
is de
fi
ned as a
fi
xed capacitance with the same stored energy as C
OSS
with V
DS
= 67% of V
(BR)DSS
.
T
o
c
alculate C
o(er)
for any value of
V
DS
less than V
(BR)DSS,
use this equation:
C
o(er)
= -3.43E-8/V
DS
^2 + 1.44E-8/V
DS
+ 5.38E-11.
6
R
G
is external gate resistance, not including internal gate resistance or gate driver impedance.
(MIC4452)
Microsemi reserves the right to change, without notice, the speci
fi
cations and information contained herein.
APT18F60B_S
25
20
15
10
60
50
40
30
20
10
0
V
= 10V
T
= 125°C
GS
J
T
J
= -55°C
V
GS
= 7 &,8V
T
J
= 25°C
6V
5.5V
T
J
= 150°C
5
0
5V
4.5V
T
J
= 125°C
15
0
5
10
20
25
30
0
0
0
5
10
15
20
25
30
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figure 1,
Output Characteristics
Figure 2,
Output Characteristics
65
60
55
50
45
40
35
30
25
20
15
10
3.0
2.5
2.0
1.5
1.0
NORMALIZED TO
V
DS
> I
D(ON)
x R
DS(ON)
MAX.
250
μ
SEC. PULSE TEST
V
= 10V
@
9A
GS
@ <0.5 % DUTY CYCLE
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
0.5
0
5
0
-55 -25
0
25 50 75
100 125 150
1
2
3
4
5
6
7
8
T , JUNCTION
TEMPERATURE (°C)
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figure 3,
R
vs Junction Temperature
Figure 4,
Transfer Characteristics
DS(ON)
5,000
1000
30
25
20
15
10
C
iss
T
J
= -55°C
T
J
= 25°C
T
J
= 125°C
100
10
C
oss
5
0
C
rss
500
0
5
10
15
20
100
V ,
DRAIN-TO-SOURCE VOLTAGE (V)
DS
200
300
400
600
I ,
DRAIN CURRENT (A)
D
Figure 5,
Gain vs Drain Current
Figure 6, Capacitance vs Drain-to-Source Voltage
16
14
12
10
8
65
60
55
50
45
I
= 9A
D
V
DS
=
120V
V
DS
=
300V
40
T
J
= 25°C
35
30
T
J
= 150°C
25
6
20
15
10
V
DS
=
480V
4
2
5
0
0
0
20
40
60
80 100 120 140
0
0.3
, SOURCE-TO-DRAIN VOLTAGE (V)
SD
0.6
0.9
1.2
1.5
Q ,
TOTAL GATE CHARGE (nC)
V
g
Figure 7, Gate Charge vs Gate-to-Source Voltage
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
APT18F60B_S
100
10
100
10
I
I
DM
DM
R
ds(on)
13
μ
s
100
μ
s
1ms
13
μ
s
100
μ
s
10ms
R
T
=
150°C
1
ds(on)
1
J
100ms
DC line
1ms
10ms
T
C
=
25°C
Scaling for Different Case & Junction
T
e
mperatures:
100ms
DC line
T
=
125°C
J
I
D
=
I
D(T =
25
°
C)
*(
T
–
T
C
)/125
T
C
=
75°C
J
C
0.1
0.1
1
10
100
800
1
10
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
100
800
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
DS
Figure 9, Forward Safe Operating Area
Figure 10, Maximum Forward Safe Operating Area
0.40
0.35
0.30
0.25
0.20
0.15
0.10
D = 0.9
0.7
0.5
0.3
Note:
t
1
t
2
t
= Pulse Duration
t
SINGLE PULSE
1
1
t
/
2
+ T
Duty Factor D =
0.1
0.05
0
Peak T
= P
x Z
J
DM
θJC C
0.05
10
-5
10
-4
10
-3
10
-2
10
-1
1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
3
D PAK
Package Outline
TO-247 (B) Package Outline
e3 100%
Sn Plated
e1 SAC:
Tin, Silver, Copper
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
4.69 (.185)
15.95 (.628)
13.41 (.528)
13.51(.532)
5.31 (.209)
15.49 (.610)
16.26 (.640)
16.05(.632)
1.04 (.041)
1.49 (.059)
2.49 (.098)
1.15(.045)
5.38 (.212)
6.20 (.244)
6.15 (.242) BSC
Revised
8/29/97
11.51 (.453)
11.61 (.457)
13.79 (.543)
13.99(.551)
20.80 (.819)
21.46 (.845)
3.50 (.138)
3.81 (.150)
0.46 (.018)
0.56 (.022)
{3 Plcs}
1.27 (.050)
1.40 (.055)
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
2.87 (.113)
3.12 (.123)
3.81 (.150)
4.50 (.177) Max.
1.98 (.078)
2.08 (.082)
4.06 (.160)
(Base of Lead)
1.65 (.065)
2.13 (.084)
1.22 (.048)
1.32 (.052)
0.40 (.016)
1.016(.040)
19.81 (.780)
20.32 (.800)
Heat Sink (Drain)
and Leads
are Plated
5.45 (.215) BSC
{2 Plcs.
1.01 (.040)
1.40 (.055)
Gate
Drai n
Source
}
Source
Drai n
Gate
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters (Inches)
Dimensions in Millimeters (Inches)
