Microchip-Tech-MICRF010YM
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MICRF010
®
QwikRadio Low-Power
UHF Receiver
General Description
The MICRF010 is a single chip, ASK/OOK (ON-OFF
Keyed) RF receiver IC recommended for new designs
replacing the MICRF007. It provides the same function with
sensitivity enhancement, typically 6dB better than the
MICRF007. Just
like all other members of the QwikRadio
®
family, the MICRF010 achieves low power operation, a
very high level of integration, and it is particularly easy to
use.
QwikRadio™
Features
•
High sensitivity (–104dBm)
•
300MHz to 440MHz frequency range
•
Data-rate up to 2.0kbps (Manchester encoding)
•
Low power consumption
–
–
–
2.9mA fully operational (315MHz)
0.15µA in shutdown
All post-detection data filtering is provided on the
MICRF010, so no external baseband filters are required. In
fact, the entire receiver circuit is made of very few external
components and with the 8-pin SOIC package makes it
ideal for small printed circuit board area applications.
290µA in polled mode (10:1 duty-cycle)
•
Shutdown input
•
Automatic tuning, no manual adjustment
•
Very low RF re-radiation at the antenna
•
Highly integrated with extremely low external part count
The MICRF010 works in fixed-mode (FIX) operation, which
functions as a conventional super-heterodyne receiver.
Fixed-mode provides better selectivity and sensitivity
performance in comparison with sweep mode used in other
Micrel receivers intended for lower cost applications.
Applications
•
Automotive remote keyless entry (RKE)
•
Long range RF identification
Data sheets and support documentation can be found on
•
Remote fan and light control
•
Garage door and gate openers
Ordering Information
Part Number
Operating Mode
Shutdown
Package
Standard
Pb-Free
MICRF010BM
MICRF010YM
Fixed
Yes
8-pin SOIC
Typical Application
17cm 22AWG MAGNET WIRE
433.92Mhz 1000 bps Manchester Encoded On-Off Keyed Receiver
QwikRadio is a registered trademark of Micrel, Inc. The QwikRadio Ics were developed under a partnership agreement with AIT of Orlando, Florida.
M9999-063005
(408) 955-1690
June 2005
Micrel
MICRF010
Pin Configuration
Standard 8-Pin SOIC (M)
Pin Description
Pin Number
Pin Name
Pin Function
1
VSS
ANT
VDD
CTH
Ground Return (input): ground return to the power supply. See “Applications Information” for bypass
capacitor details.
2
3
4
Antenna (Input):
See “Applications Information” for information on input impedance. For optimal
performance the antenna impedance should be matched to the antenna pin impedance.
Power Supply (Input): Positive Supply input for the RF IC. Connect a low ESL, low ESR decoupling
capacitor from this to VSS, with lead length kept as short as possible.
[Data Slicing] Threshold Capacitor (External Component):
Capacitor extracts the DC average value
from the demodulated waveform, which becomes the reference for the internal data slicing comparator.
See “Applications Information” for selection.
5
6
DO
Digital Output (Output): CMOS level compatible data output signal.
SHUT
Shutdown (Input): Shutdown-mode logic-level control input.
Pull low to enable the receiver. This input
is pulled-up internally to VDD.
7
8
CAGC
AGC Capacitor (External Component):
Integrating capacitor for on-chip AGC (automatic gain control).
See “Applications Information” for capacitor selection.
REFOSC
Reference Oscillator (External Component or Input):
Timing reference for on-chip tuning and
alignment.
M9999-063005
(408) 955-1690
June 2005
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Micrel
MICRF010
Absolute Maximum Ratings
(1)
Operating Ratings
(2)
Supply Voltage (V
DDRF
, V
DDBB
)…………………………….
.
+
7V
Input/Output Voltage (V
I/O
) ……………. V
SS
–0.3 to V
DD
+0.3
Max Input Power …………………………………………..
.
+
20dBm
Junction Temperature (T
J
)
.
……………………………… +150°C
Storage Temperature Range (T
S
)……….. –65°C to +150°C
Lead Temperature (soldering, 10 sec.)……………… +260°C
Supply Voltage (V
DDRF
, V
DDBB
) ……………+4.75V to +5.5V
Max Input Powe
r
.
……………………………………………… 0dBm
RF Frequency Range ……………………….300MHz to 440Hz
Data Duty-Cycle………………………………………. 20% to 80%
Reference Oscillator Input Range……….. 0.2V
PP
to 1.5V
PP
Ambient Temperature (T
A
)…………………… –40°C to +85°C
ESD Rating …………………………………………………….
Note 3
Electrical Characteristics
(4)
4.75V
≤
V
DD
≤
5.5V, V
SS
= 0V; C
AGC
= 4.7µF, C
TH
= 0.022µF; f
REFOSC
= 9.794MHz (equivalent to f
RF
= 315MHz); data rate = 600 bps
(Manchester encoded). T
A
= 25°C,
bold
values indicate –40°C
≤
T
A
≤
+85°C; current flow into device pins is positive, unless noted.
Symbol
Parameter
Condition
Min
Typ
2.9
Max
4.5
Units
mA
µ
A
I
OP
Operating Current
continuous operation, f
RF
= 315MHz
Polled with 10:1 duty cycle, f
RF
= 315MHz
Continuous operation, f
RF
= 433.92MHz
Polled with 10:1 duty cycle, f
RF
= 433.92MHz
V
SHUT
= 0.8VDD
290
4.7
7.5
0.5
µ
A
470
0.15
µ
A
I
STBY
Standby Current
µ
A
RF Section, IF Section
Receiver Sensitivity(4)
f
RF
= 315MHz
Note 4
f
RF
= 433.92MHz
Note 4
Note 5
–105
–103
0.86
0.6
dBm
f
IF
IF Center Frequency
MHz
MHz
f
BW
IF 3dB Bandwidth
Note 5
ANT pin, R
SC
= 50
Ω
(6)
t
ATTACK
÷ t
DECAY
T
A
= +85°
µ
Vrms
Spurious Reverse Isolation
AGC Attack to Decay Ratio
AGC Leakage Current
30
0.1
±100
nA
Reference Oscillator
Z
REFOSC
Reference Oscillator
Input Impedance
Note 7
Note 8
290
5.0
k
Ω
µ
A
Reference Oscillator Source
Demodulator
Z
CTH
CTH Source Impedance
Note 9
150
±100
2000
k
Ω
nA
Hz
I
ZCTH(leak)
CTH Leakage Current
T
A
= +85°C
Note 5
Demodulator Filter Bandwidth
M9999-063005
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June 2005
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Micrel
MICRF010
Symbol
Parameter
Condition
Min
0.8
Typ
Max
0.2
Units
Digital/Control Section
V
IH
Input High Voltage
SHUT
V
DD
V
DD
µA
V
IL
Input Low Voltage
Output Current
SHUT
I
OUT
V
OH
DO pin, push-pull
DO pin, I
OUT
= –30µA
45
4
Output High Voltage
0.9
V
DD
V
OL
Output Low Voltage
DO pin, I
OUT
= +30µA
DO pin, C
LOAD
= 15pF
0.1
V
DD
µs
t
R
, t
F
Output Rise and Fall Time
Notes:
1. Exceeding
absolute maximum ratings may damage the device.
2. The
device is not guaranteed to function outside its operating ratings.
3. Devices
are ESD sensitive, use appropriate ESD precautions. The device meets Class 1 ESD test requirements, (human body model HBM), in
accordance with MIL-STD-883C, method 3015. Do not operate or store near strong electrostatic fields.
4. Sensitivity
is defined as the average signal level measured at the input necessary to achieve 10
-2
BER (bit error rate). The RF input is assumed to
be matched to 50
Ω
.
5. Parameter
scales linearly with reference oscillator frequency f
T
. For
any reference oscillator frequency other than 9.794MHz, compute new
parameter value as the ratio:
f
REFOSC
MHZ
×
parameter value at 9.79MHz
(
)
9.794MHz
6. Spurious
reverse isolation represents the spurious components, which appear on the RF input pin (ANT) measured into 50
Ω
with an input RF
matching network.
7. Series
resistance of the resonator (ceramic resonator or crystal) should be minimized to the extent possible. In cases where the resonator series
resistance is too great, the oscillator may oscillate at a diminished peak-to-peak level, or may fail to oscillate entirely. Micrel recommends that
series resistances for ceramic resonators and crystals not exceed 50
Ω
and 100
Ω
, respectively.
8. Crystal
load capacitor is 10pF. See Figure 5 in “REFOSC” section for reference oscillator operation.
9. Parameter
scales inversely with reference oscillator frequency f
T
. For
any reference oscillator frequency other than 9.794MHz, compute new
parameter value as the ratio:
9.794MHz
×
parameter value at 9.794MHz
(
)
f
REFOSC
MHZ
M9999-063005
(408) 955-1690
June 2005
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Micrel
MICRF010
Typical Characteristics
Supply Current
vs. Frequency
Supply Current
vs. Temperature
4.0
3.5
3.0
2.5
2.0
6.0
f = 315 MHZ
DD
= 5V
T
V
A
= 25
o
C
DD
= 5V
V
4.5
3.0
1.5
Fix Mode
Continuous Operation
Fix Mode,
Continuous Operation
-40 -20
0
20 40 60 80
100
250 300 350 400 450 500
TEMPERATURE (
o
C)
FREQUENCY (MHz)
M9999-063005
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June 2005
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Micrel
MICRF010
Functional Diagram
Figure 1. MICRF010 Block Diagram
Application Information and Function
Description
“MICRF010 Block Diagram” above shows the IC
partitioned into three
sections: 1) UHF Downconverter, 2)
OOK Demodulator, 3) Reference and Control. Also shown
in the figure are two external capacitors (C
TH
, C
AGC
) and
Design Steps:
The following steps are the basic design steps for using the
MICRF010 receiver:
1. Select
the reference oscillator
2. Select
the demodulator filter bandwidth
3. Select
the C
capacitor
TH
one timing element, which is usually a crystal. With the
exception of a supply decoupling capacitor and antenna
impedance matching network, these are the only external
components needed by the MICRF010 to assemble a
complete UHF receiver.
4. Select
the C
capacitor
AGC
Step 1: Selecting The Reference Oscillator
All timing and tuning operations on the MICRF010 are
derived from the internal Colpitts reference oscillator.
Timing and tuning is controlled through the REFOSC pin in
one of three ways:
For optimal performance it is highly recommended that the
MICRF010 is impedance-matched to the antenna. The
matching network will add an additional two or three
components.
1. Connect
a crystal.
The “SHUT” input is the only control input of the IC.
It is
used in polling operation for decreasing DC current
consumption. This input is CMOS compatible and it is
internally pulled-up.
2. Drive
this pin with an external timing signal.
The specific reference frequency required is related to the
system transmit frequency.
The IF Bandpass Filter Roll-off response of the IF Filter is
5th order, and the demodulator data filter has a 2nd order
response.
Crystal Selection
The smaller the crystal, the longer it takes for the oscillator
to start from a shutdown operation. If shorter start-up time
M9999-063005
(408) 955-1690
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Micrel
MICRF010
is desired, use crystals with lower ESR, which normally are
bigger in size, like the HC49 package. “Application Hints
35” provides additional information and recommended
sources for crystals. If using an externally applied signal, it
should be AC-coupled and limited to the operating range of
Slicing level time constant values vary somewhat with
decoder type, data pattern, and data rate, but typically
values range from 5ms to 50ms. This issue is covered in
more detail in “Application Note 22.” Optimization of the
value of C
TH
is required to maximize range.
0.2V
PP
to 1.5V
PP
.
Selecting Capacitor C
TH
Selecting Reference Oscillator Frequency f
T
The first step in the process is selection of a data-slicing-
level time constant. This selection is strongly dependent
upon system issues including system decode response
time and data code structure (that is, existence of data
preamble, etc.) This issue is also covered in more detail in
“Application Note 22.”
As with any super-heterodyne receiver, the difference
between the internal LO (local oscillator) frequency f
LO
and
the incoming transmit frequency f
TX
, should equal the IF
center frequency.
Equation 1 may be used to compute the
appropriate f
LO
for a given f
TX
:
The effective resistance of R
SC
is listed in the electrical
characteristics table as 150k
Ω
at 315MHz, this value
scales inversely with frequency. R
SC
value at other
frequencies is given by equation (4), where f
T
is in MHz:
⎛
⎞
f
TX
f
=
f
TX
±
0.86
⎜
⎟
⎠
LO
315
⎝
(1)
Frequencies f
TX
and f
LO
are in MHz.
Note that two values
of f
LO
exist for any given f
TX
, distinguished as “high-side
mixing” and “low-side mixing.” High-side mixing results in
an image frequency above the frequency of interest and
low-side mixing results in a frequency below. There is
generally no preference of one over the other.
9.7941
R
SC
=
150
Ω
(4)
f
T
C
TH
can be calculated using equation (5) with the
knowledge of R
sc
and
τ.
After choosing one of the two acceptable values of f
LO
, use
Equation 2 to compute the reference oscillator frequency
f
T
:
τ
R
SC
C
TH
=
(5)
f
LO
f
T
=
2
×
(2)
64.5
Recommended
τ
is 5x the bit-rate.
Frequency f
T
is in MHz. Connect a crystal of frequency f
T
to REFOSC on the MICRF010. Four-decimal-place
accuracy on the frequency is generally adequate. The
following table identifies f
T
for some common transmit
A standard ±20% X7R ceramic capacitor for C
TH
is
generally sufficient. Refer to “Application Hint 42” for C
TH
frequencies.
and C
AGC
selection examples.
Reference Oscillator
Step 3: Selecting C
AGC
Capacitor
Transmit Frequency (f
TX
)
Frequency (f
T
)
The signal path has AGC (automatic gain control) to
increase input dynamic range. The attack time constant of
the AGC is set externally by the value of the CAGC
capacitor connected to the CAGC pin of the device. To
maximize system range, it is important to keep the AGC
control voltage ripple low, preferably under 10mV
PP
once
the control voltage attains its quiescent value. For this
reason, capacitor values of at least 0.47µF are
recommended.
315.0 MHz
390.0 MHz
418.0 MHz
433.92 MHz
9.7941 MHz
12.1260 MHz
12.9966 MHz
13.4916 MHz
Table 1. Recommended Reference Oscillator Values For
Typical Transmit Frequencies (high-side mixing)
Step 2: Selecting C
TH
Capacitor
The AGC control voltage is carefully managed on-chip to
allow duty-cycle operation of the MICRF010. When the
device is placed into shutdown mode (SHUT pin is pulled
high), the AGC capacitor floats to retain the voltage. When
operation is resumed, only the voltage drop, due to
capacitor leakage, must be replenished. A relatively low-
leakage capacitor such as a ceramic type is recommended
Extraction of the DC value of the demodulated signal for
purposes of logic-level data slicing is accomplished using
the external threshold capacitor C
TH
and the on-chip
switched capacitor “resistor” RSC, as shown in the block
diagram.
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June 2005
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Micrel
MICRF010
when the devices are used in duty-cycled operation.
(that is, the attack time constant is 10 times of the decay
time constant). Generally the design value of 1:10 is
adequate for the vast majority of applications. If adjustment
is required, adding a resistor in parallel of the C
AGC
capacitor may vary the ratio. The value of the resistor must
be determined on a case-by-case basis.
To further enhance duty-cycled operation, the AGC push
and pull currents are boosted for approximately 10ms
immediately after the device is taken out of shutdown. This
compensates for AGC capacitor voltage drop and reduces
the time to restore the correct AGC voltage. The current is
boosted by a factor of 45.
Selecting CAGC Capacitor in Continuous Mode
A CAGC capacitor in the range of 0.47µF to 4.7µF is
typically recommended. Caution! If the capacitor is too
large, the AGC may react too slowly to incoming signals.
AGC settling time, from a completely discharged (zero-volt)
state is given approximately by Equation 6:
∆
t
=
1.33
3
×
C
AGC
−
0.44
where:
AGC
is in µF, and
∆
t is in seconds.
(6)
C
Selecting CAGC Capacitor in Duty-Cycle Mode
Voltage droop across the CAGC capacitor during shutdown
should be replenished as quickly as possible after the IC is
enabled. As mentioned above, the MICRF010 boosts the
push-pull current by a factor of 45 immediately after start-
up. This fixed time period is based on the reference
oscillator frequency f
T
. The time is 10.9ms for f
T
=
12.00MHz, and varies inversely with f
T
. The value of CAGC
capacitor and the duration of the shutdown time period
should be selected such that the droop can be replenished
within this 10ms period.
Polarity of the droop is unknown, meaning the AGC voltage
could droop up or down. The worst-case from a recovery
standpoint is downward droop, since the AGC pull-up
current is 1/10th magnitude of the pull-down current. The
downward droop is replenished according to the Equation
7:
I
∆
V
∆
t
=
(7)
C
AGC
where:
I = AGC pull-up current for the initial 10ms (67.5µA)
AGC
= AGC capacitor value
C
∆
t = drop recovery time
∆
V = drop voltage
For example, if user desires
∆
t = 10ms and chooses a
4.7µF CAGC, the allowable droop is about 144mV. Using
the same equation with 200nA, the worst-case pin leakage,
and assuming 1µA of capacitor leakage in the same
direction, the maximum allowable
∆
t (shutdown time) is
about 0.56s for droop recovery in 10ms.
The ratio of decay-to-attack time-constant is fixed at 1:10
M9999-063005
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June 2005
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Micrel
MICRF010
protection diodes at all input and output pins are not
shown.
The Demodulator Filter Bandwidth
There is no external control to set the demodulator
bandwidth. The maximum bandwidth is 2000 hertz at 315
MHz. Maximum
bandwidth scales linearly with operating
frequency. To
minimize data pulse stretching, one must
calculate the “demodulator BW required” to be certain that
it does not exceed demodulator filter bandwidth of
MICRF010 at operating frequency.
For “demodulator BW
required” calculation, one needs to identify the shortest
pulse within the data profile and use equation 8 below:
CTH Pin
VDD
PHI2B
TG2
PHI1B
TG1
Demodulator
S
i
gn al
CTH
~1.6V
PHI2
PHI1
VSS
V
S
S
0.65
Demodulator BW Required
=
(8)
Figure 2. CTH Pin
shortest pulse – width
Figure 2 illustrates the CTH pin interface circuit. The CTH
pin is driven from a N-Channel MOSFET source-follower
with approximately 10µA of bias. Internal control signals
PHI1/PHI2 are related in a manner such that the
impedance across the transmission gates looks like a
“resistance” of approximately 150k
Ω
. The DC potential at
the CTH pin is approximately 1.6V
Refer to the “Electrical Characteristics” for the exact filter
bandwidth at a chosen frequency.
Power Supply Bypass Capacitors
Supply bypass capacitors are strongly recommended. One
example is to use 0.1uF ceramic capacitor in parallel with
100pF ceramic capacitor for VDD.
CAGC Pin
VDD
Data Squelching
During quiet periods (no signal), the data output (DO pin)
transitions randomly with noise. Most decoders can
discriminate between this random noise and actual data.
For some systems, random transition due to noise during
quiet period is a problem. There are three possible
approaches to reduce this output noise:
7
u
A
16
u
A
Co m
p
a
–
ra
t
o
r
C
A
G
C
T
i
meo
u
t
1. Analog
squelch to raise the demodulator threshold.
85
u
A
160
u
A
2. Digital
squelch to disable the output when data is not
present.
V
S
S
3. Output
filter to filter the (high frequency) noise
glitches on the data output pin.
Figure 3. CAGC Pin
The simplest solution is to perform analog squelch by
inducing a small offset, or squelch voltage, on the CTH pin
so that noise does not trigger the internal comparator,
Usually 20mV to 30mV on CTH pin is sufficient.
This may
be achieved by connecting a several-meg-ohm resistor
from the CTH pin to either VSSBB or VDDBB, depending
upon the desired offset polarity. Since MICRF010’s
receiver AGC noise at the internal comparator input is
always the same (set by the AGC), the squelch-offset
requirement does not change as the local noise strength
changes from installation to installation. Introducing
squelch will reduce sensitivity and range. One should
introduce minimal offset to sufficiently quiet the output.
Typical squelch resistor values range from 10M
Ω
to 6.8M
Ω
for low to high squelch strength.
Figure 3 illustrates the CAGC pin interface circuit. The
AGC control voltage is developed as an integrated current
into a capacitor CAGC. The attack current is nominally
1.5µA, while the decay current is a 10 times scaling of this,
approximately 15µA. Signal gain of the RF/IF strip inside
the IC diminishes as the voltage on CAGC decreases. By
simply adding a capacitor to CAGC pin, the attack/decay
time constant ratio is fixed at 10:1. Modification of the
attack/decay ratio is possible by adding resistance from the
CAGC pin to either VDDBB or VSSBB, as desired.
Both the push and pull current sources are disabled during
shutdown, which maintains the voltage across CAGC, and
improves recovery time in duty-cycled applications. To
further improve duty-cycle recovery, both push and pull
currents are increased by 45 times for approximately 10ms
after release of the SHUT pin. This allows rapid recovery of
any voltage droop on CAGC while in shutdown.
I/O Pin Interface Circuitry
Interface circuitry for the various I/O pins of the MICRF010
are diagrammed in Figures 2 through 8. The ESD
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Micrel
MICRF010
DO Pin
SHUT Pin
The output stage for the digital output (DO) is shown in
Figure 4. The output is a 45µA push and 45µA pull
switched-current stage. This output stage is capable of
driving CMOS loads. An external buffer-driver is
recommended for driving high capacitance loads.
VDD
Q1
Q2
Q3
VDD
to Interna
Circuits
VSS
SHUT
45
u
A
Co m p a-
ra
t
or
VSS
Figure 6. SHUT Pin
DO
Control input circuitry is shown in Figure 6. The standard
input is a logic inverter constructed with minimum geometry
MOSFETs (Q2, Q3). P-Channel MOSFET Q1 is a large
channel length device, which functions essentially as a
“weak” pull-up to VDDBB. Typical pull-up current is 5µA,
leading to an impedance to the VDD supply of typically
1M
Ω
.
45
u
A
VSS
Figure 4. DO Pin
REFOSC Pin
The REFOSC input circuit is shown in Figure 5. Input
impedance is quite high (290k
Ω
). This is a Colpitts
oscillator, with internal 10pF capacitors.
Externally applied signals should be AC-coupled,
amplitude limited to approximately 0.5V
PP
. The nominal
DC bias voltage on this pin is 1.4V
VDD
Active
Bias
200k
REFOSC
250
10pF
10pF
30uA
VSS
VSS
Figure 5. REFOSC Pin
M9999-063005
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June 2005
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Micrel
MICRF010
Frequency
(Mhz)
S11
Mag, angle
Z11, ohms
C3, pF
L2, nH
Additional Applications Information
In addition to the basic operation of the MICRF010, the
following enhancements can be made. In particular, it is
strongly recommended that the antenna impedance is
matched to the input of the IC.
300
305
310
315
320
325
330
335
340
345
350
355
360
365
370
375
380
385
390
395
400
405
410
415
420
425
430
435
440
0.944,-36.65
0.940,-37.499
0.942,-37.579
0.945, -37.66
0.943,-38.237
0.942, -38.814
0.94, -39.39
14.45-j150
14.84-j145
14.28-j145
13.48-j145
13.58-j143
13.43-j140
13.5-j138
2.2
2.2
2.2
2.2
2
47
47
47
47
47
47
47
43
43
43
39
36
36
36
36
33
33
33
33
33
30
30
30
27
27
27
27
27
27
Antenna Impedance Matching
1.8
1.8
1.8
1.8
1.8
2
0.938, -39.967
0.937, -40.544
0.935, -41.12
0.933, -41.697
0.931, -42.274
0.93, 42.85
13.59-j136
13.44-j134
13.51-j132
13.57-j130
13.62-j123
13.48-j126
13.52-j124
13.57-j122
13.42-j120
13.46-j118
13.49-j117
13.35-j115
13.6-j114
2.2
2.2
2
0.928, -43.427
0.926, -44.004
0.925, -44.581
0.923, -45.157
0.921, -45.734
0.92, -46.311
0.917, -46.729
0.914, -47.148
0.912, -47.566
0.909, -47.985
0.907, -48.403
0.906, -48.797
0.909, -49.152
0.911, -49.507
0.911, -49.925
0.904, -50.571
1.8
2.2
2
Figure 7. Antenna Pin Input Impedance
1.8
1.8
1.8
2
Figure 7 and Table 2 presents the antenna pin input
impedance. The
Antenna pin can be matched to 50
Ω
with
a high pass circuit as shown in Figure 8. That is, a shunt
inductor from the ANT Pin to ground and a series capacitor
from ANT Pin to the antenna.
13.89-j113
14.00-j112
14.25-j110
14.34-j109
14.28-j108
13.63-j107
13.15-j107
12.94-j106
13.66-j104
1.8
1.8
2.2
2
C3
2
AN
T
P
i
n
1.8
1.8
1.8
L2
Table 2
Figure 8. Antenna with Matching Network to ANT Pin
Inductor values may be different from Table 2, depending
on PCB material, PCB thickness, ground configuration, and
how long the traces are in the layout. Values shown were
characterized for a 0.031 inch thickness, FR4 board, solid
ground plane on bottom layer, and very short traces.
MuRata and Coilcraft wire-wound 0603 or 0805 surface
mount inductors were tested, however, any wire-wound
inductor with high SRF (self-resonance frequency) should
do the job.
Shutdown Function
Duty-cycled operation of the MICRF010 (often referred to
as polling) is achieved by turning the MICRF010 on and off
via the SHUT pin. The shutdown function is controlled by a
logic state applied to the SHUT pin. When VSHUT is high,
the device goes into low-power standby mode. This pin is
pulled high internally, and it must be externally pulled low
to enable the receiver.
M9999-063005
(408) 955-1690
June 2005
11
Micrel
MICRF010
Application Example: 433.92Mhz, 1000 bps Manchester Encoded On-Off Keyed Receiver
17cm 22 AWG MAGNET WIRE
Bill of Materials
Item Qty Reference
Value
Description
Manufacturer
Part#
CAPACITORS
2
4
1
5
6
7
3
1
1
1
1
1
1
2
C3
C7
C2
C8B
C8
5.6pF
100pF
4.7pF
NL
0.47uF
100nF
4.7uF
5.6pF Capacitor, 0603, 50VDC, ±5%
100pF Capacitor, 0603, 50VDC, ±5%
4.7pF Capacitor, 0603, 50VDC, ±5%
MuRata
MuRata
MuRata
GRM1885C1H5R6DZ01B
GRM1885C1H101JA01B
GRM1885C1H4R7CZ01B
0.47uF Capacitor, 0603, 25VDC, ±10%
100nF Capacitor, 0603, 25VDC, ±10%
4.7uF Capacitor, 0805, 10VDC, +80-20%
CONNECTORS
MuRata
MuRata
MuRata
GRM188R61A474KA61B
GRM188R71E104KA01B
GRM21BF51A475ZA01B
C9
C5,C10
8
9
1
1
J2
J1
4 Pin Header
4 Pin Header
ANTENNA 17cm
22 AWG magnet wire
Major League Electronics
TSHS-148-S-06-A-GT
Consolidated
INDUCTORS
30nH Inductor, 0603, ±5%
24nH Inductor, 0603, ±5%
11
12
13
14
1
1
3
1
L3
L5
L6,L7,L9
L8
30nH
24nH
Coilcraft
Coilcraft
ACT
0603CS-30NXJB
0603CS-24NXJB
ZCB-0603
ZCB-0603 Ferrite
bead, >600 Ohm @ 100MHz
UL
Ferrite bead, >600 Ohm @ 100MHz
ACT
ZCB-0603
RESISTORS
15
16
1
2
R4
R5, R6
100K
UL
VISHAY
CRCW06031003F
SEMICONDUCTORS
17
18
1
1
U1
Y1
MICRF010BM 300-440MHz
UHF Receiver
13.4916MHz 10pF,
no built-in capacitor
MICREL
Abracon
MICRF010BM
ABl-13.4916MHz-10
M9999-063005
(408) 955-1690
June 2005
12
Micrel
MICRF010
PCB Layout Information
The MICRF010 evaluation board was designed and
characterized using two sided 31 mils thick FR4 material
with 1 ounce copper clad. If another type of printed circuit
board material were to be substituted, impedance matching
and characterization data stated in this document may not
be valid. The gerber files for this board can be downloaded
All Units for PCB shown are in mils.
PCB Component Side Layout
PCB Silk Screen
PCB Solder Side Layout
M9999-063005
(408) 955-1690
June 2005
13
Micrel
MICRF010
Package Information
0.026 (0.65)
MAX
)
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
TYP
45
0.0098 (0.249)
0.0040 (0.102)
0.010 (0.25)
0.007 (0.18)
0–8
0.197 (5.0)
0.189 (4.8)
0.050 (1.27)
0.016 (0.40)
SEATING
PLANE
0.064 (1.63)
0.045 (1.14)
0.244 (6.20)
0.228 (5.79)
8-Lead SOIC (M)
MICREL, INC.
2180 Fortune DRIVE
SAN JOSE, CA
95131 USA
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the
body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or
sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any
damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
M9999-063005
(408) 955-1690
June 2005
14
