Microchip-Tech-TC6320TG-G

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Microchip-Tech-TC6320TG-G
TC6320  
N-Channel and P-Channel Enhancement-Mode MOSFET Pair  
Features  
General Description  
• Integrated
 
Gate-to-source Resistor  
• Integrated
 
Gate-to-source Zener Diode  
• Low
 
Threshold  
The TC6320 consists of high-voltage, low-threshold  
N-channel and P-channel MOSFE
T
s
i
n 8-lead SOIC  
and DFN packages. Both MOSFE
T
s
h
ave integrated  
gate-to-source resistors and gate-to-source Zener  
diode clamps which are desired for high-voltage pulser  
• Low
 
On-resistance  
• Low
 
Input Capacitance  
applications. It is  
a complimentary, high-speed,  
• Fast
 
Switching Speeds  
high-voltage, gate-clamped N-channel and P-channel  
MOSFET pair, which utilizes an advanced vertical  
DMOS structure and a well-proven silicon gate  
manufacturing process. This combination produces a  
device with the power handling capabilities of bipolar  
transistors and with the high input impedance and  
positive temperature coefficient inherent in MOS  
devices. Characteristic of all MOS structures, this  
device is free from thermal runaway and thermally  
induced secondary breakdown.  
• Free
 
from Secondary Breakdown  
• Low
 
Input and Output Leakage  
• Independent
 
Electrically Isolated N-channel and  
P-channel  
Applications  
• High-voltage
 
Pulsers  
• Amplifiers  
Microchip’s vertical DMOS FE
T
s
a
re ideally suited to a  
wide range of switching and amplifying applications  
where very low threshold voltage, high breakdown  
voltage, high input impedance, low input capacitance  
and fast switching speeds are desired.  
• Buffers  
• Piezoelectric
 
Transducer Drivers  
• General
 
Purpose Line Drivers  
• Logic-level
 
Interfaces  
Package Types  
8-lead SOIC  
5-lead DFN  
(
T
o
p view)  
(
T
o
p view)  
SN  
GN  
SP  
GP  
1
2
3
4
8
7
6
5
DN  
DN  
DP  
DP  
1
2
3
4
8
7
6
5
SN  
GN  
GP  
SP  
DN  
DN  
DP  
DP  
DN  
DP  
See
T
a
ble 2-1
and
T
a
ble 2-2
for pin information.  
2017 Microchip Technology Inc.  
DS20005697A-page 1  

TC6320  
Functional Block Diagram  
SN  
GN  
DN  
DN  
N-Channel  
P-Channel  
GP  
SP  
DP  
DP  
DS20005697A-page 2  
2017 Microchip Technology Inc.  

TC6320  
Typical Application Circuit  
+100V  
VH  
VDD  
OE  
10nF  
10nF  
INA  
INB  
-100V  
VL  
VSS  
MD12xx, MD17xx, or MD18xx  
TC6320  
2017 Microchip Technology Inc.  
DS20005697A-page 3  

TC6320  
1.0  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings†  
Drain-to-source Voltage ………………………………………………………………………………………………………………………. BV

DSS  

Drain-to-gate Voltage
 
…………………………………………………………………………………………………………………………. BV

DGS  

Operating Ambient
T
e
mperature, T

A

……………………………………………………………………………………… –55°C to +150°C  
Storage
T
e
mperature, T

S

……………………………………………………………………………………………………… –55°C
 
to +150°C  
† Notice:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those  
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for  
extended periods may affect device reliability.  
N-CHANNEL ELECTRICAL CHARACTERISTICS  
Electrical Specifications
: T

A

= T

J

= 25°C unless otherwise specified.  
Parameter  
Sym.  
Min. Typ. Max.  
Unit  
Conditions  
DC PARAMETER (
Note 1
unless otherwise specified)  
Drain-to-source Breakdown Voltage  
Gate Threshold Voltage  
BV

DSS  

V

GS(th)  

∆
V

GS(th)  

R

GS  

200  
1
—
—
—
—
—
—
2
V
V
V

GS

= 0
V
,
I

D

= 2 mA  
V

GS

= V

DS

, I

D

= 1 mA  
Change in V

GS(th)

with
T
e
mperature  
Gate-to-source Shunt Resistor  
Gate-to-Source Zener Voltage  
—
–4.5 mV/°C
 
V

GS

= V

DS

, I

D

= 1 mA (
Note 2
)  
10  
50  
25  
k
Ω  
I

GS

= 100 µA  
I

GS

= 2 mA  
VZ

GS  

13.2  
V
V

DS

= Maximum rating,
 
—
—
—
—
10  
1
µA  
V

GS

= 0V  
Zero-gate Voltage Drain Current  
On-state Drain Current  
I

DSS  

V

DS

= 0.8 Maximum rating,  
V

GS

= 0
V
, T

A

= 125°C (
Note 2
)  
mA  
1
—
—
—
—
—
—
—
8
V

GS

= 4.5
V
,
V

DS

= 25V  
I

D(ON)  

A
2
V

GS

= 10
V
,
V

DS

= 25V  
V

GS

= 4.5
V
,
I

D

= 150 mA  

GS

= 10
V
,
I

D

= 1A  
—
—
—
Static Drain-to-source On-state
  
Resistance  
R

DS(ON)  

Ω
7
V
Change in R

DS(ON)

with
T
e
mperature
 
∆
R

DS(ON)  

1
%/°C V

GS

= 4.5
V
,
I

D

= 150 mA (
Note 2
)  
AC PARAMETER (
Note 2
)  
Forward Transconductance  
Input Capacitance  
G

FS  

C

ISS  

C

OSS  

C

RSS  

t

d(ON)  

t

r  

400  
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
110  
60  
23  
10  
15  
20  
15  
mmho V

DS

= 25
V
, I

D

= 500 mA  
pF  
V

GS

= 0
V
,  
pF  
pF  
Common Source Output Capacitance  
Reverse Transfer Capacitance  
Turn-on Delay Time  
V

DS

= 25V,
  
f = 1 MHz  
ns  
ns  
ns  
ns  
V

DD

= 25V,  
Rise Time  
I

D

= 1A,  
R

GEN

= 25
ꢀ  
Turn-off Delay Time  
t

d(OFF)  

t

f  

Fall Time  
DIODE PARAMETER  
Diode Forward Voltage Drop  
Reverse Recovery Time  
V

SD  

t

rr  

—
—
—
1.8  
—
V
V

GS

= 0
V
,
I

SD

= 500 mA (
Note 1
)  
V

GS

= 0
V
,
I

SD

= 500 mA (
Note 2
)  
300  
ns  
Note 1:
 
All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty  
cycle.  
2:
Specification is obtained by characterization and is not 100% tested.  
DS20005697A-page 4  
2017 Microchip Technology Inc.  

TC6320  
P-CHANNEL ELECTRICAL CHARACTERISTICS  
Electrical Specifications
: T

A

= T

J

= 25°C unless otherwise specified.  
Parameter  
Sym.  
Min. Typ. Max.  
Unit  
Conditions  
DC PARAMETER (
Note 1
unless otherwise specified)  
Drain-to-source Breakdown Voltage  
Gate Threshold Voltage  
BV

DSS

–200  
—
—
—
—
—
—
V
V
V

GS

= 0
V
,
I

D

= –2 mA  
V

GS

= V

DS

, I

D

= –1 mA  
V

GS(th)  

∆
V

GS(th)  

R

GS  

–1  
—
–2.4  
Change in V

GS(th)

with
T
e
mperature  
Gate-to-source Shunt Resistor  
Gate-to-Source Zener Voltage  
4.5 mV/°C
 
V

GS

= V

DS

, I

D

= –1 mA (
Note 2
)  
10  
50  
25  
k
ꢀ  
I

GS

= 100 µA  
I

GS

= –2 mA  
VZ

GS  

13.2  
V
V

DS

= Maximum rating,
  
V

GS

= 0V  
—
—
—
—
–10  
–1  
µA  
Zero-gate Voltage Drain Current  
On-state Drain Current  
I

DSS  

V

DS

= 0.8 Maximum rating,
  
mA  
V

GS

= 0
V
, T

A

= 125°C (
Note 2
)  
V

GS

= –4.5
V
, V

DS

= –25V  
V

GS

= –10
V
,
V

DS

= –25V  
V

GS

= –4.5
V
,
I

D

= –150 mA  
–1  
–2  
—
—
—
—
—
—
—
—
—
—
10  
8
I

D(ON)  

A
Static Drain-to-source On-state
  
Resistance  
R

DS(ON)  

ꢀ
V

GS

= –10
V
, I

D

= –1A  
Change in R

DS(ON)

with
T
e
mperature
 
∆
R

DS(ON)  

1
%/°C V

GS

= –10
V
,
I

D

= –200 mA (
Note 2
)  
AC PARAMETER (
Note 2
)  
Forward Transconductance  
Input Capacitance  
G

FS  

400  
—
—
—
—
mmho V

DS

= –25
V
, I

D

= –500 mA  
pF  
C

ISS  

200  
V

GS

= 0V,  
Common Source Output  
Capacitance  
pF  
pF  
C

OSS  

—
—
55  
V

DS

= –25
V
,
  
f = 1 MHz  
Reverse Transfer Capacitance  
Turn-on Delay Time  
Rise Time  
C

RSS  

t

d(ON)  

t

r  

—
—
—
—
—
—
—
—
—
—
30  
10  
15  
20  
15  
ns  
ns  
ns  
ns  
V

DD

= –25
V
,  
I

D

= –1A,  
R

GEN

= 25
ꢀ  
Turn-off Delay Time  
Fall Time  
t

d(OFF)  

t

f  

DIODE PARAMETER  
Diode Forward Voltage Drop  
Reverse Recovery Time  
V

SD  

t

rr  

—
—
—
–1.8  
—
V
V

GS

= 0
V
,
I

SD

= –500 mA (
Note 1
)  
V

GS

= 0
V
,
I

SD

= –500 mA (
Note 2
)  
300  
ns  
Note 1:
 
All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty  
cycle.  
2:
Specification is obtained by characterization and is not 100% tested.  
TEMPERATURE SPECIFICATIONS  
Electrical Characteristics:
Unless otherwise specified, for all specifications T

A

=T

J

= +25°C.  
Parameter  
Sym.  
Min.  
Typ.  
Max.  
Unit  
Conditions  
TEMPERATURE RANGE  
Operating Ambient
T
e
mperature  
Storage
T
e
mperature  
T

A  

T

S  

–55°C  
–55°C  
—
—
+150  
+150  
°C  
°C  
PACKAGE THERMAL RESISTANCE  
8-lead DFN  

JA  

JA  

—
—
44  
—
—
°C/W
Note 1  
°C/W
Note 1  
8-lead SOIC  
101  
Note 1:
 
1 oz., four-layer, 3” x 4” PCB  
2017 Microchip Technology Inc.  
DS20005697A-page 5  

TC6320  
2.0  
PIN DESCRIPTION  
T
a
ble 2-1
and
T
a
ble 2-2
show the description of pins in  
TC6320 8-lead DFN and 8-lead SOIC, respectively.  
Refer to
Package Types
for the location of pins.  
TABLE 2-1:  
Pin Number  
8-LEAD DFN PIN FUNCTION TABLE  
Pin Name  
Description  
1
2
3
4
5
6
7
8
SN  
GN  
GP  
SP  
DP  
DP  
DN  
DN  
Source N-channel  
Gate N-channel  
Gate P-channel  
Source P-channel  
Drain P-channel  
Drain P-channel  
Drain N-channel  
Drain N-channel  
TABLE 2-2:  
Pin Number  
8-LEAD SOIC FUNCTION TABLE  
Pin Name  
Description  
1
2
3
4
5
6
7
8
SN  
GN  
SP  
GP  
DP  
DP  
DN  
DN  
Source N-channel  
Gate N-channel  
Source P-channel  
Gate P-channel  
Drain P-channel  
Drain P-channel  
Drain N-channel  
Drain N-channel  
DS20005697A-page 6  
2017 Microchip Technology Inc.  

TC6320  
3.0  
FUNCTIONAL DESCRIPTION  
Figure 3-1
 
and
Figure 3-2
 
illustrate the switching  
waveforms and test circuits for TC6320.  
10V  
90%  
V

DD  

Input  
R

L  

10%  
0V  
Pulse  
OUTPUT  
Generator  
t

(ON)  

t

d(ON)  

t

(OFF)  

t

d(OFF)  

R

GEN  

t

r  

t

f  

D
.
U.T  
VDD  
Output  
10%  
90%  
10%  
90%  
Input  
0V  
FIGURE 3-1:  
N-Channel Switching Waveforms and Test Circuit.  
0V  
10%  
Pulse  
Generator  
Input  
90%  
R

GEN  

-10V  
D
.
U.T  
t

(ON)  

t

d(ON)  

t

(OFF)  

Input  
t

r  

t

f  

t

d(OFF)  

90%  
10%  
OUTPUT  
R

L  

0V  
Output  
VDD  
90%  
10%  
V

DD  

FIGURE 3-2:  
P-Channel Switching Waveforms and
T
e
st Circuit.  
PRODUCT SUMMARY  
R

DS(ON)  

(Maximum)  
(
Ω
)  
BV

DSS

/BV

DGS  

(V)  
N-Channel  
P-Channel  
N-Channel  
P-Channel  
200  
–200  
7
8
2017 Microchip Technology Inc.  
DS20005697A-page 7  

TC6320  
4.0  
4.1  
PACKAGING INFORMATION  
Package Marking Information  
Example  
8-lead DFN  
TC6320  
XXXXXXX  
XXXXXXX  
K6  
e3  
e3  
1715  
YYWW  
222  
NNN  
Example  
8-lead SOIC  
TC6320TG  
XXXXXXX  
e3  
e3  
1727  
YYWW  
NNN  
555  
Legend:
XX…X Product
 
Code or Customer-specific information
  
Y
Y
e
ar code (last digit of calendar year)
  
YY  
WW  
NNN  
Y
e
ar code (last 2 digits of calendar year)
  
Week code (week of January 1 is week ‘01’)
  
Alphanumeric traceability code
  
Pb-free JEDEC

®

designator for Matte Tin (Sn)
  
This package is Pb-free. The Pb-free JEDEC designator (
 
)
  
e
3
*
e
3
can be found on the outer packaging for this package.
  
Note
: In
 
the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for product code or customer-specific information. Package may or  
not include the corporate logo.  
DS20005697A-page 8  
2017 Microchip Technology Inc.  

TC6320  
APPENDIX A:
 
REVISION HISTORY  
Revision A (October 2017)  
• Converted
 
Supertex Doc# DSFP-TC6320 to  
Microchip DS20005697A  
• Changed
 
the package marking format  
• Changed
 
the quantity of the  
8-lead DFN K6 package from 3000/Reel  
to 3300/Reel  
• Changed
 
the quantity of the 8-lead SOIC TG  
package from 2000/Reel to 3300/Reel  
• Made
 
minor text changes throughout the docu-  
ment  
2017 Microchip Technology Inc.  
DS20005697A-page 11  

TC6320  
PRODUCT IDENTIFICATION SYSTEM  
To
o
rder or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office
.  
Examples:  
XX  
PART NO.  
Device  
–
X
–
X
Package  
Options  
Environmental  
Media Type  
a) TC6320K6-G
:  
b) TC6320TG-G
:  
N-Channel and P-Channel  
Enhancement-ModeMOSFETPair
,
 
8
‐
lead (4×4) VDFN, 3300/Reel  
Device:  
TC6320  
=
N-Channel and P-Channel Enhancement-  
Mode MOSFET Pair  
N-Channel and P-Channel  
Enhancement-Mod
e
M
OSFETPair,  
8-lead SOIC, 3300/Reel  
Packages:  
K6  
=
=
8-lead (4×4) VDFN  
8-lead SOIC  
TG  
Environmental:  
Media Type:  
G
=
Lead (Pb)-free/RoHS-compliant Package  
(blank)  
=
=
3300/Reel for a K6 Package  
3300/Reel for a TG Package  
DS20005697A-page 12  
2017 Microchip Technology Inc.  

Note the following details of the code protection feature on Microchip devices:  
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALIT
Y
,
P
ERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE
.
Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights unless otherwise stated.  
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AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,  
CryptoR
F
,
d
sPIC, FlashFlex, flexPWR, Heldo, JukeBlox, K
EE
L
OQ
,  
K
EE
L
OQ
logo, Kleer, LANCheck, LINK MD, maXStylus,  
maX
T
o
uch, MediaLB, megaAVR, MOS
T
,
M
OST logo, MPLAB,  
OptoLyzer, PIC, picoPower, PICSTAR
T
,
P
IC32 logo, Prochip  
Designer, Q
T
o
uch, Right
T
o
uch, SAM-BA, SpyNIC, SS
T
,
S
ST  
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered  
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T
e
chnology Incorporated in the U.S.A.  
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e
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,  
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e
chnology Incorporated in the  
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e
chnology Incorporated in  
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®

MCUs and dsPIC

®

DSCs, K
EE
L
OQ

®

code hopping  
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chnology is a registered trademark of Microchip  
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e
chnology Inc. in other countries.  
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e
chnology  
Germany II GmbH & Co. K
G
, a
s
ubsidiary of Microchip
T
e
chnology  
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All other trademarks mentioned herein are property of their  
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QUALITY
ꢀ
MANAGEMENT
ꢀꢀ
SYSTEM
ꢀ  
CERTIFIED
ꢀ
BY
ꢀ
DNV
ꢀ  
© 2017, Microchip
T
e
chnology Incorporated, All Rights Reserved.  
ISBN: 978-1-5224-2207-5  
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2017 Microchip Technology Inc.  
DS20005697A-page 13  

Worldwide Sales and Service  
AMERICAS  
ASIA/PACIFIC  
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EUROPE  
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chnical Support:  
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DS20005697A-page 14  
2017 Microchip Technology Inc.  
11/07/16