Microchip-Tech-U2790B-NFPH
| Part # | Microchip-Tech-U2790B-NFPH |
Download  | Microchip-Tech-U2790B-NFPH |
Features
•
Supply Voltage 5V (Typically)
•
Very Low Power Consumption: 150 mW (Typically) for –1 dBm Output Level
•
Very Good Sideband Suppression by Means of Duty Cycle Regeneration of the LO
Input Signal
•
Phase Control Loop for Precise 90° Phase Shifting
•
Power-down Mode
•
Low LO Input Level: –10 dBm (Typically)
•
50-
Ω
Single-ended LO and RF Port
•
LO Frequency from 100 MHz to 1 GHz
•
SO16 Package
1000-MHz
Quadrature
Modulator
Benefits
•
No External Components Required for Phase Shifting
•
Adjustment Free, Hence Saves Manufacturing Time
•
Only Three External Components Necessary, this Results in Cost and Board Space
Saving
U2790B
Electrostatic sensitive device.
Observe precautions for handling.
1. Description
The U2790B is a 1000-MHz quadrature modulator using Atmel
®
’s advanced UHF pro-
cess. It features a frequency range from 100 MHz up to 1000 MHz, low current
consumption, and single-ended RF and LO ports. Adjustment-free application makes
the direct converter suitable for all digital radio systems up to 1000 MHz, e.g., GSM,
ADC, JDC.
Figure 1-1.
Block Diagram
S
PU
PU
1
6
8
7
BB
AI
BB
AI
Power
up
V
S
5,4
RF
O
12
15
0°
Frequency
doubler
Duty cycle
regenerator
90°/control
loop
Σ
L
O
i
90°
3
16
9
Ph
adj
BB
Bi
10
B
B
BI
2,11,13,14
GND
4583D–CELL–07/06
2. Pin
Configuration
Figure 2-1.
Pinning SO16
PU
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Ph
adj
Ph
adj
GND
GND
RF
O
GND
LO
i
V
S
V
S
S
PD
GND
BB
Bi
BB
Bi
BB
Ai
BB
Ai
Table 2-1.
Pin Description
Pin
Symbol
PU
Function
1
Power-up input
Ground
2, 11, 13, 14
GND
RF
o
3
4, 5
6
RF output
V
S
Supply voltage
S
PU
Settling time power-up
Baseband input A
7
BB
Ai
BB
Ai
BB
Bi
BB
Bi
LO
i
8
Baseband input A inverse
Baseband input B
9
10
12
15, 16
Baseband input B inverse
LO input
Ph
adj
Phase adjustment (not necessary for regular applications)
2
U2790B
4583D–CELL–07/06
U2790B
3. Absolute
Maximum Ratings
Parameters
Symbol
Value
6
Unit
V
Supply voltage
V
S
V
i
Input voltage
0 to V
S
125
V
Junction temperature
Storage temperature range
T
j
°C
°C
T
Stg
–55 to +125
4. Operating
Range
Parameters
Symbol
V
S
Value
Unit
V
Supply voltage range
Ambient temperature range
4.5 to 5.5
–40 to +85
T
amb
°C
5. Thermal
Resistance
Parameters
Symbol
Value
Unit
Junction ambient
SO16
R
thJA
110
K/W
6. Electrical
Characteristics
T
e
st conditions (unless otherwise specified): V
S
= 5
V
, T
amb
= 25°C, referred to test circuit, system impedance Z
O
= 50
Ω
, f
LO
= 900 MHz,
P
LO
= –10 dBm, V
BBi
= 1 V
pp
differential.
Parameters
Test Conditions
Pin
4, 5
4, 5
Symbol
Min.
4.5
24
Typ.
Max.
5.5
Unit
V
Type*
No.
1.1
1.2
2
Supply voltage range
Supply current
V
S
I
S
A
A
30
37
mA
Baseband Inputs
Input-voltage range
(differential)
7-8,
9-10
2.1
2.2
V
BBi
Z
BBi
1000
3.2
1500
mV
pp
D
D
Input impedance
(single ended)
k
Ω
Input-frequency
range
(5)
2.3
2.4
2.5
f
BBi
0
250
2.65
<1
MHz
V
D
A
D
Internal bias voltage
V
BBb
TC
BB
2.35
2.5
0.1
T
e
mperature
coefficient
mV/°C
*)
T
y
pe means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1.
The required LO level is a function of the LO frequency.
2. In
reference to an RF output level
≤
–1 dBm and I/Q input level of 400 mV
pp
differential.
3. Sideband
suppression is tested without connection at pins 15 and 16. For higher requirements a potentiometer can be
connected at these pins.
4. For
T
amb
= –30°C to +85°C and V
S
= 4.5V to 5.5V.
5. By
low impedance signal source.
3
4583D–CELL–07/06
6. Electrical
Characteristics (Continued)
T
e
st conditions (unless otherwise specified): V
S
= 5
V
, T
amb
= 25°C, referred to test circuit, system impedance Z
O
= 50
Ω
, f
LO
= 900 MHz,
P
LO
= –10 dBm, V
BBi
= 1 V
pp
differential.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
No.
3
LO Input
3.1
3.2
3.3
Frequency range
Input level
(1)
12
f
LOi
P
LOi
Z
iLO
50
1000
–5
MHz
dBm
Ω
D
D
D
–12
–10
50
Input impedance
Voltage standing
wave ratio
3.4
VSWR
LO
DCR
LO
1.4
2
D
D
3.5
4
Duty cycle range
RF Output
0.4
–5
0.6
4.1
Output level
3
P
RFo
–1
+2
dBm
dB
B
B
f
LO
= 900 MHz
f
LO
= 150 MHz
30
32
35
35
4.2
4.3
LO suppression
(2)
LO
RFo
Sideband
f
LO
= 900 MHz
f
LO
= 150 MHz
35
30
40
35
SBS
RFo
dB
B
suppression
(2, 3)
4.4
4.5
Phase error
(4)
P
e
A
e
<1
deg.
dB
D
D
Amplitude error
< ±0.25
V
BBi
= 2
V
,
V
BBi
= 3V
V
BBi
= V
BBi
= 2.5V
–132
–144
4.6
4.7
Noise floor
N
FL
dBm/Hz
D
D
VSWR
VSWR
RF
1.6
2
3rd-order baseband
harmonic
suppression
4.8
S
BBH
35
45
dB
dB
D
D
RF harmonic
suppression
4.9
5
S
RFH
35
Power-up Mode
V
PU
≤
0.5V
5.1
Supply current
4, 5
I
PU
10
10
1
1
µA
µs
D
D
V
PU
= 1V
C
SPU
= 100 pF
5.2
Settling time
C
LO
= 100 pF
C
RFo
= 1 nF
6 to 3
t
sPU
6
Switching Voltage
Power-on
6.1
6.2
1
1
V
PUon
4
V
V
D
D
Power-up
V
PUdown
*)
T
y
pe means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1.
The required LO level is a function of the LO frequency.
2. In
reference to an RF output level
≤
–1 dBm and I/Q input level of 400 mV
pp
differential.
3. Sideband
suppression is tested without connection at pins 15 and 16. For higher requirements a potentiometer can be
connected at these pins.
4. For
T
amb
= –30°C to +85°C and V
S
= 4.5V to 5.5V.
5. By
low impedance signal source.
4
U2790B
4583D–CELL–07/06
U2790B
7. Diagrams
Figure 7-1.
Typical Single Sideband Output Spectrum at V
S
= 4.5V and V
S
= 5.5V,
LO
= 900 MHz, P
LO
= –10 dBm, V
BBI
= 1 V
PP
(differential) T
amb
= 25°C
f
Figure 7-2.
Typical GMSK Output Spectrum
5
4583D–CELL–07/06
Figure 7-3.
Demo Board Layout
Figure 7-4.
OIP3 versus T
amb
, LO = 150 MHz, Level –20 dBm
16
V
BBI
= 0.2 V
PP
12
V
BBi
= 0.4 V
PP
8
4
0
-40 -20
0
20
Temperature (°C)
80
100
40
60
6
U2790B
4583D–CELL–07/06
U2790B
Figure 7-5.
OIP3 versus T
amb
, LO = 900 MHz, Level –10 dBm
12
10
V
BBi
= 0.4 V
PP
8
6
V
BBi
= 1.0 V
PP
4
2
0
100
40
60
-40 -20
0
20
80
Temperature (°C)
Figure 7-6.
Output Power versus
T
amb
0.5
0
F
LO
= 150 MHz
-0,5
-1
-1.5
F
LO
= 900 MHz
-2
-2.5
100
-40
-20
0
20
Temperature (°C)
80
40
60
Figure 7-7.
Supply Current versus
T
amb
40
30
20
10
0
100
-40 -20
0
20
Temperature (°C)
80
40
60
7
4583D–CELL–07/06
Figure 7-8.
Typical S11 Frequency Response of the RF Output
Figure 7-9.
Typical VSWR Frequency Response of the RF Output
8
U2790B
4583D–CELL–07/06
U2790B
Figure 7-10.
Typical S11 Frequency Response of the LO Input
Figure 7-11.
Typical VSWR Frequency Response of the LO input
10
8
6
4
2
0
1000
100
LO Frequency (MHz)
9
4583D–CELL–07/06
Figure 7-12.
Typical Supply Current versus Temperature at V
S
= 5V
60
50
40
30
20
10
100
-40
-20
0
20
40
60
80
Temperature (°C)
Figure 7-13.
Typical Output Power versus LO-Frequency at
T
amb
= 25°C,
VBBI = 230 mV
PP
(differential)
0
-5
0
200 400
600 800 1000
1200
LO Frequency ( MHz )
1400
Figure 7-14.
Typical required V
BBi
Input Signal (differential) versus LO Frequency for
PO = 0 dBm and P
O
= –2 dBm
2
1
0
0
200 400 600
800 1000 1200
LO Frequency (MHz)
1400
10
U2790B
4583D–CELL–07/06
U2790B
Figure 7-15.
Typical useful LO Power Range versus LO Frequency at
T
amb
= 25
°
C
0
-10
-20
-30
-40
-50
0
200 400
600 800 1000 1200
LO Frequency (MHz)
1400
Figure 7-16.
Application Circuit
PU
1n
C
PU
S
PU
Power
down
A
inv
220n
1
6
8
7
Power
down
220n
BB
Ai
BB
Ai
A
V
S
5,4
V
S
100n
1n
RF
O
Baseband
processing
100p
12
Duty cycle
regenerator
Frequency
doubler
0°
90°/ control
OUT
LO
Σ
loop
LO
i
Ph
adj
90°
3
10k
15
V
S
B
16
9
BB
Bi
10
220n
BB
Bi
2,11,13,14
GND
220n
B
inv
11
4583D–CELL–07/06
Figure 7-17.
Demo Board Layout
12
U2790B
4583D–CELL–07/06
U2790B
8. Application
Notes
8.1
Noise Floor and Settling Time
In order to reduce noise on the power-up control input and improve the wide-off noise floor of the
900-MHz RF output signal, capacitor C
PU
should be connected from pin 6 to ground in the
shortest possible way.
The settling time has to be considered for the system under design. For GSM applications, a
value of C
PU
= 1 nF defines a settling time, t
sPU
, equal or less than 3 ms. This capacitance does
not have any influence on the noise floor within the relevant GSM mask. For mobile applications
the mask requirements can be achieved very easily without C
PU
.
A significant improvement of the wide-off noise floor is obtainable with C
PU
greater than 100 nF.
Such values are recommended for applications where the settling time is not critical such as in
base stations. Coupling capacitors for LO
i
and RF
O
also have a certain impact on the settling
time. The values used for the measurements are CLO
i
= 100 pF and C
RFo
= 1 nF.
8.2
Baseband Coupling
The U2790B-FP (SO16) has an integrated biasing network which allows AC coupling of the
baseband signal at a low count of external components. The bias voltage is 2.5V ±0.15V.
Figure 7-17
shows the baseband input circuitry with a resistance of 3.2 k
Ω
for each asymmetric
input. The internal DC offset between A and A, and B and B is typically < ±1 mV with a maximum
of ±3 mV. DC coupling is also possible with an external DC voltage of 2.5 ±0.15V.
Figure 8-1.
Baseband Input Circuitry
Mixer input stage
3.2 k
Ω
A
B
,
A
B
,
13
4583D–CELL–07/06
RF Output Circuitry LO Input Circuitry
V
S
RF
O
3
20
Ω
Figure 8-2.
LO Input Circuitry
LO
12
50
Ω
20 pF
14
U2790B
4583D–CELL–07/06
U2790B
9. Ordering
Information
Extended Type Number
Package
SO16
Remarks
U2790B-NFPH
Tube, Pb-free
U2790B-NFPG3H
SO16
Taped and reeled, Pb-free
10. Package Information
5.2
4.8
Package SO16
Dimensions in mm
10.0
9.85
3.7
1.4
0.25
0.2
0.4
3.8
0.10
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
1
8
11. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
Revision No.
History
•
Page 3, Abs. Max.Ratings table: Storage temperature values changed
•
Page 2, Pin Description table: symbol of Pins 8 and 10 changed
•
Put datasheet in a new template
4583D-CELL-07/06
15
4583D–CELL–07/06
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4583D–CELL–07/06
