Mini-Circuits-DAT-31R5A-PP-

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Mini-Circuits-DAT-31R5A-PP-
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tep Attenuator  
DAT-31R5A+ Series  
50
Ω
0 to 31.5 dB, 0.5 dB Step
 
DC to 4.0 GHz  
The Big Deal  
• Wideband,
 
operates up to 4 GHz  
• Immune
 
to latchup  
CASE STYLE: DG983-2  
• High
 
IP3, 52 dBm  
Product Overview  
The DAT-31R5A+ series of 50
Ω
digital step attenuators provides adjustable attenuation from 0 to 31.5 dB  
in 0.5 dB steps.
 
The control is a 6-bit serial/parallel interface, and the attenuators operate with either single  
positive or dual (positive and negative) supply voltage.
 
DAT-31R5A+ series models are produced by a  
unique CMOS process on silicon, offering the performance of GaAs with the advantages of conventional  
CMOS devices.  
Key Features  
Feature  
Advantages  
Wideband operation, specified from DC  
to 4.0 GHz  
Can be used in multiple applications such as communications, satellite and defense,  
reducing part count.  
Serial or parallel interface  
Good VSWR, 1.2:1 typ.  
Models available with serial or parallel interface mode to suit customer demand.  
Eases interfacing with adjacent components and results in low amplitude ripple.  
Single positive supply models:  
(Model suffixes: -SP+ and –PP+)  
+2.3 to +3.6V+  
Use of single positive supply simplifies power supply design.
 
An internal negative voltage  
generator supplies the desired negative voltage.
 
Single positive supply results in excellent  
spurious performance, -140 dBm typical.  
Dual supply models:  
(Model suffixes: -SN+ and –PN+)  
+2.7 to +3.6V (Positive) and  
-3.6 to -3.2V (Negative)  
Dual supply provides spurious-free operation.
 
It also allows fast switching up to 1 MHz (vs.  
25 kHz for single supply).  
Wide range fo positive operating voltages allows the DAT-31R5A+ Series of models to be  
used in a wide range of applications.
 
See Application Note AN-70-006 for operation above  
+3.6V  
Useable over a wide range of supply  
voltages, +2.3/2.7 to 5.2V  
Footprint compatible to DAT-31R5-XX+
 
Can fit into existing footprint and provide wideband performance, to 4 GHz instead of  
Series (XX=SN/SP/PN/PP)  
2.4 GHz.  
The DAT-31R5A-XX+ series is designed to prevent any momentary positive ‘spikes’ in  
power during attenuation transitions  
Safe attenuation transitions  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 1 of 8  

Digital Step Attenuator  
50
Ω
DC-4000 MHz  
31.5 dB,
 
0.5 dB Step  
6 Bit,
 
Parallel Control Interface, Single Supply Voltage  
Product Features  
• Immune to latch up  
• Excellent accurac
y
,
0
.1 dB
T
y
p  
• Low Insertion Loss  
• High IP3, +52 dBm
T
y
p  
• Very low DC power consumption  
• Excellent return loss, 20 dB
T
y
p  
• Small size 4.0 x 4.0 mm  
Generic photo used for illustration purposes only  
DAT-31R5A-PP+  
CASE STYLE: DG983-2  
+RoHS Compliant  
The +Suffix identifies RoHS Compliance. See our web site  
for RoHS Compliance methodologies and qualifications  
Typical Applications  
• Base Station Infrastructure  
• Portable Wireless  
• C
A
T
V & DBS  
• MMDS & Wireless LAN  
• Wireless Local Loop  
• UNII & Hiper LAN  
• Power amplifier distortion canceling loops  
General Description  
The D
A
T
–
31R5A-PP+ is a 50
Ω
RF digital step attenuator that offers an attenuation range up to 31.5 dB in  
0.5 dB steps
.
T
he control is a 6-bit parallel interface, operating on single (positive) supply voltage. The D
A
T-  
31R5A-PP+ is produced using a unique CMOS process on silicon, offering the performance of GaAs, with  
the advantages of conventional CMOS devices.  
Simplified Schematic  
RF Input  
RF Out  
16dB  
8dB  
4dB  
2dB  
0.5dB  
1dB  
Parallel Control  
Latch Enable  
Internal Control Logic Interface  
RE
V
. C  
M164761  
DAT
–
31R5A-PP+  
RS/TH/CP/AM  
MCL NY  
200513  
Page 2 of 8  
®
Mini-Circuits  

www.minicircuits.com

P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
(718) 934-4500
 

Digital Step Attenuator  
DAT-31R5A-PP+  
RF Electrical Specifications, DC-4000 MHz,
 
T

AMB

=25°C, V

DD

=+3V  
Freq. Range  
Parameter  
Min.  
Typ.  
Max.  
Units  
(GHz)  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
DC-1  
1-2.4  
2.4-4  
—
—
—
—
—
0.03  
0.05  
0.07  
0.02  
0.05  
0.1  
0.1  
0.15  
0.2  
Accuracy @
0.5 dB
Attenuation Setting  
dB  
0.1  
Accuracy @
1 dB
Attenuation Setting  
Accuracy @
2 dB
Attenuation Setting  
Accuracy @
4 dB
Attenuation Setting  
Accuracy @
8 dB
Attenuation Setting  
Accuracy @
16 dB
Attenuation Setting  
0.15  
0.25  
0.15  
0.25  
0.35  
0.2  
dB  
dB  
dB  
dB  
dB  
dB  
—
—
0.05  
0.15  
0.15  
0.07  
0.15  
0.23  
0.03  
0.15  
0.6  
—
—
0.25  
0.5  
—
—
0.2  
0.5  
0.8  
—
—
0.1  
0.3  
0.15  
1.1  
0.7  
1.45  
1.9  
—
—
—
1.3  
Insertion Loss

(note 2)

@ all attenuator set to 0dB  
Input IP3

(note 3)

(at Min. and Max. Attenuation)  
1.6  
2.4  
2.1  
3.0  
DC-4  
DC-4  
—
—
—
+52  
+24  
—
—
—
dBm  
dBm  
Input Power @ 0.2dB Compression

(Note 3)  

(at Min. and Max. Attenuation)  
10 kHz to 50 MHz  
See Fig. 1  
Input Operating Power  
VSWR  
dBm  
:1  
>50 MHz  
DC-1  
—
—
—
—
+24  
1.5  
1.6  
1.9  
1.2  
1.2  
1.4  
1-2.4  
2.4-4  
Notes:  
1.
T
e
sted
 
on Evaluation Board TB-334, See Figure 3.  
2. Insertion
 
loss values are de-embedded from test board Loss (test board’s Insertion Loss: 0.10dB @100MHz, 0.35dB @1000MHz, 0.60dB @2400MHz, 0.75dB @4000MHz).  
3. Input
 
IP3 and 1dB compression degrade below 1 MHz. Input power not to exceed max operating specification for continuous operation.  
DC Electrical Specifications  
Switching Specifications  
Parameter  
dd
, Supply Voltage  
dd
Supply Current  
Min.  
Typ.  
Max.  
Units  
Parameter  
Min.  
Typ.  
Max.  
Units  
Sec  
V
2.3  
—
3
3.6

(Note 4)  

200  
V
µA  
V
Switching Speed, 50% Control to  
0.5dB of Attenuation Value  
—
—
1.0  
—
—
µ
I
—
—
—
—
Switching Control Frequency  
25  
kHz  
Control Input Low  
Control Input High  
Control Current  
-0.3  
1.17  
—
+0.6  
3.6  
20

(Note 5)  

V
µA  
4. For operation above +3.6
V
,
s
ee Application Note AN-70-006  
5. Except, 30µA typ for C0.5, C16, PUP1 at +3.6V  
Absolute Maximum Ratings

(Note 6,7)  

Parameter  
Ratings  
Operating
T
e
mperature  
Storage
T
e
mperature  
V
dd  
Voltage on any control input  
Input Power  
-40°C to 105°C  
-65°C to 150°C  
-0.3V Min., 5.5V Max.  
-0.3V Min., 3.6V Max.  
+30dBm  
Thermal Resistance  
37°C/W  
6. Permanent damage may occur if any of these limits are exceeded.  
7. Operation between max operating and absolute max input power will result in reduced reliabilit
y
.  
Figure 1. Max Input Operating Power vs Frequency  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 3 of 8  

Digital Step Attenuator  
DAT-31R5A-PP+  
Pin Configuration (Top View)  
Pin Description  
Pin  
Number  
Function  
Description  
C16  
RF in  
N/C  
1
2
Control for Attenuation bit, 16dB (Note 3, 7)  
RF in port (Note 1)  
1
2
3
4
5
15  
14  
13  
12  
11  
C16  
RFin  
N/C  
GND  
LE  
C8  
RFout  
GND  
GND  
GND  
2x2mm  
Paddle  
ground  
3
Not connected (Note 4)  
GND  
LE  
4
Ground connection  
5
Latch Enable Input (Note 2)  
Positive Supply Voltage  
V

DD  

6
PUP1  
PUP2  
V

DD  

7
Power-up selection (Note 7)  
Power-up selection  
8
9
Positive Supply Voltage  
GND  
GND  
GND  
GND  
RF out  
C8  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Paddle  
Ground connection  
Ground connection  
Ground connection (Note 6)  
Ground connection  
RF out port (Note 1)  
Control for attenuation bit, 8 dB  
Control for attenuation bit, 4 dB  
Control for attenuation bit, 2 dB  
Ground Connection  
Device Marking  
C4  
C2  
GND  
C1  
Pin 1  
Index  
Control for attenuation bit, 1 dB  
Control for attenuation bit, 0.5 dB (Note 7)  
Paddle ground (Note 5)  
MCL  
C0.5  
GND  
DS50  
Notes:  
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.  
2. Latch Enable (LE) has an internal 2M
Ω
to internal positive supply voltage.  
3. Place a 10K
Ω
resistor in series, as close to pin as possible to avoid freq. resonance.  
4. Place a shunt 10K
Ω
resistor to GND  
5. The exposed solder pad on the bottom of the package (See Pin configuration) must be  
grounded for proper device operation.  
6. Ground must be less than 80 mil (0.08”) from Pin 12 for proper device operation.  
7. This pin has an internal 200 k
Ω
resistor to ground.  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
(718) 934-4500
 

Page 4 of 8  

Digital Step Attenuator  
Simplified Schematic  
RF Input  
DAT-31R5A-PP+  
RF Out  
16dB  
8dB  
4dB  
2dB  
1dB  
0.5dB  
Parallel Control  
Latch Enable  
Internal Control Logic Interface  
The D
A
T
–
31R5A-PP+ parallel interface consists of 6 control bits that select the desired attenuation state, as  
shown in
T
a
ble 1:
 
T
r
uth
T
a
ble  
Table 1. Truth
 
Table  
Attenuation  
C16  
C8  
C4  
C2  
C1  
C0.5  
State  
Reference  
0.5 (dB)  
1 (dB)  
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
1
0
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
1
0
1
0
0
0
0
0
1
2 (dB)  
4 (dB)  
8 (dB)  
16 (dB)  
31.5 (dB)  
Note: Not all 64 possible combinations of C0.5 – C16 are shown in table  
The parallel interface timing requirements are defined by Figure 2 (Parallel Interface Timing Diagram) and  
T
a
ble 2 (Parallel Interface AC Characteristics), and switching speed.  
For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenuation  
state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device.  
For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation  
state control values will change device state to new attenuation. Direct mode is ideal for manual control of  
the device (using hardwire, switches, or jumpers).  
Figure 2:
 
Parallel Interface Timing Diagram  
Table 2.
 
Parallel Interface AC Characteristics  
Symbol  
Parameter  
Min.  
10  
Max.  
Units  
ns  
LE minimum pulse width  
t

LEPW  

t

PDSUP  

t

PDHLD  

Data set-up time before  
clock rising edge of LE  
10  
ns  
Data hold time  
after clock falling edge of LE  
10  
ns  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 5 of 8  

Digital Step Attenuator  
DAT-31R5A-PP+  
Power-up Control Settings  
The D
A
T
–
31R5A-PP+ always assumes a specifiable attenuation setting on power-up, allowing a known at-  
tenuation state to be established before an initial parallel control word is provided.  
When the attenuator powers up with LE=0, the control bits are automatically set to one of four possible val-  
ues .These four values are selected by the two power-up control bits,PUP1 and PUP2 ,as shown in
T
a
ble 3:  
(Power-Up
T
r
uth
T
a
ble, Parallel Mode).  
Table 3.
 
Power-Up Truth Table, Parallel Mode  
Attenuation State  
Reference  
8 (dB)  
PUP1  
PUP2  
LE  
0
0
0
1
1
0
1
0
1
0
16 (dB)  
0
31.5 (dB)  
0
Defined by C0.5-C16  
(See
T
a
ble 1-
T
r
uth
T
a
ble)  
X (Note 1)  
X (Note 1)  
1
Note 1: PUP1 and PUP2 Connection may be 0, 1, GROUND, or not con-  
nect, without effect on attenuation state.  
Power-Up with LE=1 provides normal parallel operation with C0.5-C16, and PUP1 and PUP2 are not active.  
®
Mini-Circuits  

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.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 6 of 8  

Digital Step Attenuator  
DAT-31R5A-PP+  
TB-339  
Bill of Materials  
N5, N7, N9, N11,  
N13 N15, N21 & N25  
Resistor 0603 10 KOhm
 
1%  
N28 & N29  
Resistor 0603 475 Ohm
 
1%  
Resistor 0603 0 Ohm  
N35 – N37  
N17  
Resistor 0402 10 KOhm
 
1%  
N6, N8, N10, N12,  
N14, N16,
 
N24, N26
 
NPO Capacitor 0603 100pF
 
5%  
& N32  
N27 & N31  
N3 & N4  
N23  
T
a
ntalum Capacitor 0805 100nF
 
10%  
Hex Invert
T
r
igger MSL1  
Dual Schmitt
T
r
igger Buffer SC-70 MSL1  
Notes  
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.  
2.
T
e
st Board TB-339 is designed for operation for VDD=2.3 to 3.6
V
.
F
or operation over 3.6V to 5.2
V
,
S
ee Application Note AN-70-006  
3.
VDD=Vdd  
Fig 3. Evaluation Board Schematic
,
T
B-339, used for characterization (DUT not soldered on TB-339)  
Test Equipment  
Measurement Conditions  
For Insertion Loss, Isolation and Return Loss:  
Agilent’s E5071C Network Analyzer & E3631A Power Suppl
y
.  
For Compression:  
For Insertion Loss, Isolation and Return Loss:  
VDD=+2.3/+3/+5.5V &Pin=0dBm  
Agilent’s N9020A Signal Analyzer, E8247C RF Generator,  
E3631A Power Supply & U2004A Power Sensor.  
For Input IP3:  
For Compression:
Pin=0/+24dBm. VDD=+3V  
For Input IP3:
Pin=+10dBm/tone.  
Agilent’s N9020A Signal Analyzer, N5181A  
Signal Generators, E3631A Power Suppl
y
,
U
2004A Power Sensor.  
For Spurs:  
T
o
ne spacing: 0.1 MHz to 1 MHz RF Freq and 1 MHz to 4200 MHz RF Freq,  
VDD=+3V  
Agilent N5181A Signal Generator, E4440A Spectrum Analyzer.  
For Spurs:
RF IN at 1000MHz and -20dBm. VDD=+3V  
For Switching Time:  
Agilent’s N5181A Signal Generator, 81110A Pulse Generator,  
54832B Oscilloscope, E3631A Power Suppl
y
.  
For Max Control Frequency:  
For Switching Time:  
RF Freq=501MHz/0dBm, Pulse for LE=1Hz/0/+3.4
V
,
D
elay=500ms,  
Width=500ms. VDD=+3V  
Agilent’s N5181A Signal Generator, N9020A Signal Analyzer,  
E3631A Power Suppl
y
,
8
1110A Pulse Generator.  
For Max Control Frequency:  
RF Freq=501MHz, 0dBm. VDD=+3V  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 7 of 8  

Digital Step Attenuator  
DAT-31R5A-PP+  
Additional Detailed Technical Information  
additional information is available on our dash board.
 
To access this information
click here  
Data Table  
Performance Data  
Case Style  
Swept Graphs  
S-Parameter (S2P Files) Data Set
(.zip file)  
DG983-2
Plastic package, exposed paddle, lead finish: NiPdAu  
Tape & Reel  
F87  
Standard quantities available on reel  
7” reels with 20, 50, 100 or 200 devices  
13” reels with 3K devices  
Suggested Layout for PCB Design  
Evaluation Board  
PL-180  
TB-339  
Environmental Ratings  
ENV33T1  
ESD Rating  
Human Body Model (HBM): Class 1C (1000 to <2000V) in accordance with MIL-STD-883 method 3015  
MSL Rating  
Moisture Sensitivity: MSL1 in accordance with IPC/JEDEC J-STD-020D  
MSL Test Flow Chart  
Start  
Visual  
Inspection  
Electrical
T
e
st  
SAM Analysis  
Soak  
85°C/85RH  
168 hours  
Reflow 3 cycles,  
260°C  
Bake at 125°C,  
24 hours  
Finish  
Visual  
Inspection  
Electrical
T
e
st  
SAM Analysis  
Additional Notes  
A. Performance and quality attributes and conditions not expressly stated in this specification document are intended  
to be excluded and do not form a part of this specification document.  
B. Electrical specifications and performance data contained in this specification document are based on Mini-Circuit’s  
applicable established test performance criteria and measurement instructions.  
C. The parts covered by this specification document are subject to Mini-Circuits standard limited warranty and terms  
and conditions (collectivel
y
,
“
Standard
T
e
rms”); Purchasers of this part are entitled to the rights and benefits  
contained therein. For a full statement of the Standard
T
e
rms and the exclusive rights and remedies thereunder,  
®
Mini-Circuits  

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P
.
O. Box 350166, Brooklyn, NY 11235-0003
 
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Page 8 of 8