Minos-MLS60R150W
| Part # | Minos-MLS60R150W |
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Description
MLS60R150W, the silicon N-channel Enhanced MOSFETs,
is obtained by advanced Super Junction technology which
reduce the conduction loss, improve switching performance.
The transistor is suitable device for SMPS, high speed
switching and general purpose applications.
KEY CHARACTERISTICS
① V
DS
=600V, R
dson
<150mΩ @V
GS
=10V, I
D
=26A (Typ:126mΩ)
① Fast Switching
② 100% avalanche tested
③ Improved dv/dt capability
④ RoHS product
G
D
APPLICATIONS
S
①High frequency switching mode power supply
TO-247
ORDERING INFORMATION
Ordering Codes
Package
Product Code
Packing
M60R150W
MLS60R150-W
TO-247
Tube
at T
C
= 25°C, unless otherwise specified
ABSOLUTE RATINGS
Symbol
Parameter
Rating
Units
Drain-to-Source Voltage
V
DSS
600
26
V
A
Continuous Drain Current
I
D
Continuous Drain Current T
C
= 100
°C
Pulsed Drain Current(Note1)
Gate-to-Source Voltage
16
A
I
DM
75.9
±30
600
15
A
V
GS
V
Single Pulse Avalanche Energy(Note2)
Peak Diode Recovery dv/dt(Note3)
E
AS
mJ
V/ns
dv/dt
Power Dissipation
TO-220 TO-262 TO-263
TO-3PN
220
1.75
42
W
P
D
P
D
Derating Factor above 25°C
Power Dissipation TO-220F
W/
℃
W
Derating Factor above 25°C
W/
℃
0.33
T
J
，
T
stg
150
，
–55 to 150
Operating Junction and Storage Temperature
Range
Maximum Temperature for Soldering
℃
℃
T
L
300
Thermal characteristics
Symbol
Parameter
RATINGS
Units
Junction-to-Case
℃
/W
℃
/W
R
θJC
0.57
Junction-to-Ambient
R
θJA
62.5
at T
C
= 25°C, unless otherwise specified
Electrical Characteristics
OFF Characteristics
Values
Test Conditions
Symbol
Parameter
Units
Min.
Typ.
Max.
Drain to Source Breakdown Voltage
V
GS
=0V, I
D
=250µA
V
V
DSS
600
—
—
—
ID=250uA,
Reference25
℃
ΔBV
DSS
/ ΔT
J
Bvdss Temperature Coefficient
Drain to Source Leakage Current
V/
℃
—
—
0.63
V
DS
=600V, V
GS
= 0V,
Tj = 25
℃
µA
µA
—
—
1
I
DSS
V
DS
=480V, V
GS
= 0V,
Tj = 125
℃
—
100
Gate to Source Forward Leakage
Gate to Source Reverse Leakage
V
GS
=+30V
V
GS
=-30V
nA
nA
I
GSS(F)
I
GSS(R)
—
—
—
—
100
-100
ON Characteristics
Values
Symbol
Parameter
Test Conditions
Units
Min.
Typ.
Max.
Drain-to-Source On- Resistance
V
GS
=10V, I
D
=9A(Note4)
R
DS(ON)
V
GS(TH)
—
0.126
—
0.15
4.5
Ω
V
V
DS
= V
GS
,
I
D
= 250µA(Note4)
Gate Threshold Voltage
2.5
Dynamic Characteristics
Values
Symbol
Parameter
Test Conditions
Units
Min.
Typ.
Max.
—
Gate resistance
f = 1.0MHz
R
g
—
3.2
Ω
Input Capacitance
C
iss
C
oss
—
1860
1060
—
V
GS
= 0V
V
DS
= 25V
f = 1.0MHz
Output Capacitance
—
—
PF
Reverse Transfer Capacitance
C
rss
—
56
—
Switching Characteristics
Values
Symbol
Parameter
Test Conditions
Units
Min.
—
Typ.
Max.
—
Turn-on Delay Time
Rise Time
100.4
61
t
d(ON)
tr
I
D
=8.5A
—
—
V
DD
= 300V
V
GS
= 10V
R
G
=5Ω
ns
Turn-Off Delay Time
Fall Time
220.6
54.8
43
t
d(OFF)
t
f
—
—
—
—
Total Gate Charge
Q
g
—
—
I
D
=11A
V
DD
=400V
V
GS
= 10V
Gate to Source Charge
Q
gs
—
10
—
nC
Gate to Drain (“Miller”)Charge
Q
gd
—
16
—
Source-Drain Diode Characteristics
Values
Test Conditions
Symbol
Parameter
Units
Min.
—
Typ.
Max.
26
Continuous Source Current (Body Diode)
Maximum Pulsed Current (Body Diode)
I
S
—
A
A
V
T
C
=25 °C
I
SM
V
SD
—
—
75.9
1.2
I
S
=11A, V
GS
=0V(Note4)
Diode Forward Voltage
—
—
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
T
rr
—
—
—
267.6
—
—
—
ns
nC
A
I
S
=11A,
T
j
= 25°C
d
IF
/d
t
=100A/us
Q
rr
I
rrm
4069
26.8
Note1: Pulse width limited by maximum junction temperature
Note2: L=20mH, VDs=50V, Start TJ=25
℃
Note3: I
SD
=11A,d
i
/d
t
≤100A/us,V
DD
≤B
VDS
, Start T
J
=25
℃
Note4: Pulse width tp≤300µs, δ≤2%
Characteristics Curves
Figure 1a Safe Operating Area (No FullPAK)
Figure 1b Safe Operating Area (FullPAK)
Figure 2a Power Dissipation (No FullPAK)
Figure 2b Power Dissipation (FullPAK)
Figure 3a Max Thermal Impendance (No FullPAK)
Figure 3b Max Thermal Impendance (FullPAK)
Figure 4 Typical Output Characteristics
Figure 5 Typical Transfer Characteristics
Figure 6 Typical Drain to Source ON Resistance vs Drain
Current
Figure 7 Typical Drian to Source on Resistance vs Junction
Temperature
Figure 8 Typical Theshold Voltage vs Junction Temperature
Figure 9 Typical Breakdown Voltage vs Junction Temperature
Figure 10 Typical Capacitance vs Drain to Source Voltage
Figure 11 Typical Gate Charge vs Gate to Source Voltage
Test Circuit and Waveform
Figure 12 Gate Charge Test Circuit
Figure 13 Gate Charge Waveforms
Figure 14 Resistive Switching Test Circuit
Figure 15 Resistive Switching Waveforms
Figure 16 Diode Reverse Recovery Test Circuit
Figure 17 Diode Reverse Recovery Waveform
Figure 18 Unclamped Inductive Switching Test Circuit
Figure 19 Unclamped Inductive Switching Waveform
Package Description
Items
MIN
MAX
A
A1
B
4.6
5.2
2,2
0.9
2.6
1.4
B1
B2
B3
B4
C
1.75
1.75
2.8
2.35
2.15
3.35
3.15
0.7
2.8
0.5
D
20.60
16
21.30
18
D1
E
15.5
13
16.10
14.7
5.3
E1
E2
E3
e
3.80
0.8
2.60
5.7
5.2
L
19
20.5
4.6
L1
ΦP
3.9
2.5
3.70
Q
S
5.2
5.8
6.00
6.6
TO-247 Package
NOTE:
1.
Exceeding the maximum ratings of the device in performance may cause damage to the device,
even the permanent failure, which may affect the dependability of the machine. Please do not
exceed the absolute maximum ratings of the device when circuit designing.
2.
When installing the heat sink, please pay attention to the torsional moment and the smoothness of
the heat sink.
3.
MOSFETs is the device which is sensitive to the static electricity, it is necessary to protect the device
from being damaged by the static electricity when using it.
4.
Shenzhen Minos reserves the right to make changes in this specification sheet and is subject to
change withoutprior notice.
CONTACT:
深圳市迈诺斯科技有限公司（总部）
地址：深圳市福田区华富街道田面社区深南中路4026号田面城市大厦22B-22C
邮编：518025
电话：0755-83273777
