miracle-MGZ18N65

MGZ18N65  

650V GaN FET Enhancement Mode  

Features  



650V, 13A, R

DS(on)

(typ.) = 150mΩ@VGS = 10V.  



Very low Q

RR  

S

DFN8X8-3L  

Bottom View  



Reduced Crossover Loss  



Easy to drive with commonly-used gate drivers  

D

G



Enables AC-DC bridgeless totem-pole PFC designs  

—

Increased power density  

—

Reduced system size and weight  

—

Overall lower system cost  



Achieves increased efficiency in both hard- and soft

ꢀ

 

switched circuits  

Application  



Power adapters  



Low power SMPS  



Lighting  

Absolute Maximum Ratings

（

Tc = 25

°

C unless otherwise noted

）  

Symbol  

V

DS  

Parameter  

Limit  

650  

Unit  

V

Drain-Source Voltage  

V

(TR)DSS  

V

GSS  

Transient Drain to Source Voltage

a  

Gate-Source Voltage  

800  

V

± 20  

V

P

D  

Maximum power Dissipation @T

C

= 25°C  

52  

W

A

Drain Current-Continuous  

Drain Current-Continuous  

Drain Current-Pulsed  

T

C

= 25°C

b  

13  

I

D  

T

C

= 100°C

b  

8.4  

A

I

DM  

T

C  

Pulse Width = 10μs  

60  

A

Operating

T

emperature Case  

-55 to +150  

-55 to +150  

-55 to +150  

260  

°C  

°C  

°C  

°C  

T

J  

Operating Temperature Junction  

Storage Temperature  

T

S  

T

SOLD  

Soldering Peak Temperature

c  

Thermal Characteristics  

Symbol  

Parameter  

Typical  

2.4  

Unit  

°C/W  

°C/W  

R

θJC  

R

θJA  

Thermal Resistance Junction-Case  

Thermal Resistance Junction-Ambient

d  

50  

Miracle

T

echnology Co., Ltd.  

– 1 –  

Rev 0.1  

MGZ18N65  

650V GaN FET Enhancement Mode  

Electrical Characteristics

（

T

J

= 25

°

C unless otherwise noted

）  



Off Characteristics  

Symbol  

Parameter  

Test Condition  

V

GS

= 0V  

Min. Typ. Max. Unit  

V

(BL)DSS

Reverse Breakdown Voltage  

650  

–

2.5  

10  

–

–

25  

V

V

GS

= 0V, V

DS

= 650V  

T

J

= 25

°

C  

V

GS

= 0V, V

DS

= 650V  

T

J

= 150

°

C  

–

–

–

μA  

μA  

nA  

I

DSS  

Reverse Leakage Current  

–

Gate-to-source Leakage  

Current  

I

GSS  

V

DS

= 0V, V

GS

= ±20V  

±100  



On Characteristics  

Symbol  

Parameter  

Test Condition  

Min. Typ. Max. Unit  

V

GS(th)  

Gate Threshold Voltage  

V

DS

= V

GS

, I

D

=500μA  

3.3  

4.0  

150  

307  

4.8  

180  

–

V

V

GS

= 10V, I

D

=8.5A  

T

J

= 25°C  

V

GS

= 10V, I

D

=8.5A  

T

J

= 150°C  

–

–

R

DS(on)eff

On Resistance  

mΩ  



Dynamic Characteristics  

Symbol  

Parameter  

Test Condition  

Min. Typ.

 

Max. Unit  

C

ISS  

Input Capacitance  

–

–

–

–

–

598  

30  

1

–

–

–

–

–

V

GS

= 0 V,  

V

DS

= 400 V  

f=1MHz  

C

OSS  

C

RSS  

C

o(er)  

C

o(tr)  

Output Capacitance  

Transfer Capacitance  

pF  

pF  

Output Capacitance,  

energy related  

Output Capacitance,  

time related  

43  

85  

V

GS

= 0 V,  

V

DS

= 0~400 V  



On Characteristics  

Symbol  

t

d(on)  

t

r  

Parameter  

Test Condition  

Min. Typ. Max. Unit  

Turn-On Delay Time  

Turn-On Rise Time  

Turn-Off Delay Time  

Turn-Off Fall Time  

Total Gate Charge  

Gate-Source Charge  

Gate-Drain Charge  

Output Charge  

–

–

–

–

–

–

–

–

13  

25  

–

–

–

–

–

–

–

–

V

GS

= 0~12 V,  

V

DS

= 400 V ,  

I

D

= 10 A ,  

ns  

t

d(off)  

t

f  

47  

Rg = 70 Ω  

34  

Q

G  

8.0  

3.3  

2.0  

34  

V

GS

= 0~10 V,  

V

DS

= 400 V ,  

I

D

= 8.5 A  

Q

GS  

Q

GD  

Q

OSS  

nC  

nC  

V

GS

=0V,V

DS

=0~400 V  

Miracle

T

echnology Co., Ltd.  

– 2 –  

Rev 0.1  

MGZ18N65  

650V GaN FET Enhancement Mode  



Drain-Source Diode Characteristics  

Symbol  

Parameter  

Reverse Current  

Test Condition  

V

GS

= 0 V  

Min.  

Typ.  

Max. Unit  

I

S  

–

–

13  

A

V

GS

= 0V,

 

I

S

= 10 A  

V

GS

= 0V,

 

I

S

= 5 A  

–

–

–

–

2.4  

1.6  

31  

–

–

–

–

V

V

V

SD  

Reverse Voltage  

t

RR  

Reverse Recovery Time  

Reverse Recovery Charge  

ns  

nC  

I

S

= 10 A ,V

DS

= 400V,  

di/dt = 1000 A/μs  

Q

RR  

40  

Notes:  

a. In off-state, spike duty cycle D<0.01, spike duration <1μs .  

b. For increased stability at high current operation.  

c. Reflow MSL3 .  

d. Device on one layer epoxy PCB for drain connection (vertical and without air stream cooling, with 6cm

2

copper area  

and 70µm thickness).  

Miracle

T

echnology Co., Ltd.  

– 3 –  

Rev 0.1  

MGZ18N65  

650V GaN FET Enhancement Mode  



DFN8X8-3L Package Information  



Revision History  

Version  

Date  

Subjects (major changes since last revision)  

0.1  

2021-12-10 Preliminary

 

Version  

Miracle

T

echnology Co., Ltd.  

– 4 –  

Rev 0.1