MSKSEMI-AO4812-MS
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AO4812-MS
Product specification
AO4812-MS
Description
The AO4812-MS uses advanced trench technology to provide excellent
R DS(ON) , low gate charge and operation with
gate voltages as low as 2.5V. This device is suitable for use as a Battery protection or in other Switching application.
General Features
Application
VDS = 30V ID = 6A
Battery protection
Load switch
RDS(ON) < 42mΩ @ VGS=4.5V
RDS(ON) < 30mΩ @ VGS=10 V
Uninterruptible power supply
Reference News
PACKAGE OUTLINE
Pin Configuration
Marking
MSKSEMI
4812
3SKJ12
SOP-8
N-Channel MOSFET
Absolute Maximum Ratings@Tj=25
℃
(unless otherwise specified)
Parameter
Units
Symbol
Rating
Drain- Source
Voltage
30
V
V
A
V
DS
V
GS
Gate- Source
Voltage
+20
6
Drain Current, V
GS
@ 4.5V
3
I
D
@T
A
=25
℃
Drain Current, V
GS
@ 4.5V
3
5
A
I
D
@T
A
=70
℃
I
DM
Pulsed Drain Current
1
Total Power Dissipation
30
2
A
W
P
D
@T
A
=25
℃
Storage Temperature Range
-55 to 150
-55 to 150
62.5
T
STG
T
J
℃
℃
Operating Junction Temperature Range
Maximum Thermal Resistance, Junction
–
a
mbient
3
Rthj-a
℃
/W
Copyright© Msksemi Incorporated
AO4812-MS
Electrical Characteristics (T
=25°C unless otherwise noted
)
J
Symbol
Typ
Parameter
Max Units
Conditions
Min
STATIC PARAMETERS
Drain
–
S
ource Breakdown Voltage
I
D
=-250
µ
A, V
GS
=0V
30
V
BV
DSS
1
μA
5
V
DS
=30V, V
GS
=0V
Zero Gate Voltage Drain Current
I
DSS
T
J
=55°C
V
DS
=0V, V
GS
=±20V
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
±100
2.4
nA
V
I
GSS
V
DS
=V
GS
I
D
=250
µ
A
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=6A
1.2
30
1.8
V
GS
(
t
h)
I
D(ON)
A
25
40
30
48
42
mΩ
Static Drain
–
S
ource On-Resistance
T
J
=125°C
R
DS(ON)
V
GS
=4.5V, I
D
=5A
V
DS
=5V, I
D
=6A
I
S
=1A,V
GS
=0V
33
mΩ
S
Forward Transconductance
Diode Forward Voltage
15
FS
V
SD
I
S
0.76
1
V
Maximum Body-Diode Continuous Current
2.5
A
DYNAMIC PARAMETERS
Input Capacitance
C
iss
Output Capacitance
C
oss
pF
pF
pF
255
45
310
V
GS
=0V, V
DS
=15V, f=1MHz
Reverse Transfer Capacitance
35
50
C
rss
R
g
V
GS
=0V, V
DS
=0V, f=1MHz
Gate resistance
1.6
3.25
4.9
Ω
SWITCHING PARAMETERS
Total Gate Charge
Q
g(10V)
nC
5.2
2.55
0.85
1.3
6.3
3.2
Qg
(4.5V)
nC
nC
nC
ns
ns
ns
ns
V
GS
=10V, V
DS
=15V, I
D
=6A
Gate Source Charge
Q
gs
Gate Drain Charge
Q
gd
Turn
–
O
n DelayTime
4.5
D(on)
t
r
Turn-On Rise Time
Turn
–
O
ff DelayTime
2.5
V
GS
=10V, V
DS
=15V, R
L
=2.5
Ω
14.5
3.5
D(off)
R
GEN
=3
Ω
,
t
f
Turn-Off Fall Time
t
rr
Body Diode Reverse Recovery Time
ns
I
F
=6A, dI/dt=100A/
µ
s
8.5
2.2
nC
Body Diode Reverse Recovery
Charge
Q
rr
I
F
=6A, dI/dt=100A/
µ
s
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment
with TA =25°C. The value in any given application depends on the user’s specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and
duty cycles to keep initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on
1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a
single pulse ratin g.
Copyright© Msksemi Incorporated
AO4812-MS
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10
5
30
25
20
15
10
5
V
DS
=5V
10V
7V
4.5V
4V
3.5V
25
°
C
125
°
C
V
GS
=3V
0
0
1
1.5
2
2.5
3
3.5
4
4.5
0
1
2
3
4
5
V
DS
(Volts)
V
GS
(Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
1.8
1.6
1.4
1.2
1
40
35
30
25
20
V
GS
=10V
I
D
=6A
V
GS
=4.5V
=4.5V
10
V
GS
I
D
=5A
V
GS
=10V
0.8
0
25
50
75
100
125
150
175
0
3
6
9
12
15
I
D
(A)
Temperature (
°
C
)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction Te
m
p
erature
(Note E)
100
80
1.0E+02
1.0E+01
I
D
=6A
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
60
125
°
C
125
°
C
25
°
C
0.8
40
25
°
C
20
0.0
0.2
0.4
0.6
1.0
1.2
2
4
6
8
10
V
GS
(Volts)
V
SD
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Figure 6: Body-Diode Characteristics (Note E)
Copyright© Msksemi Incorporated
AO4812-MS
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
400
350
300
250
200
150
100
50
10
8
V
DS
=15V
I
D
=6A
C
iss
6
4
C
oss
2
C
rss
0
0
0
1
2
3
4
5
6
0
5
10
15
DS
(Volts)
20
25
30
Q
g
(nC)
V
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
100.0
10.0
1.0
10000
1000
100
10
T
A
=25
°
C
10
µ
s
R
DS(ON)
limited
100
µ
s
1ms
10ms
T
J(Max)
=150
°
C
T
A
=25
°
C
0.1
10s
DC
0.0
1
0.01
0.1
1
10
100
0.00001
0.001
0.1
10
1000
V
DS
(Volts)
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-to-
Ambient (Note F)
Figure 10: Maximum Forward Biased Safe
Operating Area (Note F)
10
D=T
on
/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J,PK
=T
A
+P
DM
.Z
θ
JA
.R
θ
JA
R
θ
JA
=90
°
C
/W
1
0.1
P
D
0.01
0.001
Single Pulse
0.001
T
on
T
0.00001
0.0001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Copyright© Msksemi Incorporated
AO4812-MS
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
–
–
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
–
Vgs
Vgs
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
E
AR
= 1/2 L
I
A
2
R
B
V
DSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I
AR
VDC
Id
Rg
–
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q
rr
= –
Idt
Vds +
Vds –
Ig
DUT
Vgs
t
rr
L
Isd
I
F
Isd
Vgs
dI/dt
I
RM
+
Vdd
VDC
Vdd
–
Vds
Copyright© Msksemi Incorporated
AO4812-MS
PACKAGE MECHANICAL DATA
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Min
Max
Max
A
1.350
1.750
0.053
0.069
A1
0.100
1.350
0.330
0.170
4.800
0.250
1.550
0.510
0.250
5.000
0.004
0.053
0.013
0.007
0.189
0.010
0.061
0.020
0.010
0.197
A2
b
c
D
e
1. 2 70 (
B
SC)
0
.
0 5 0 (
B
SC)
E
5.800
3.800
0.400
0°
6.200
4.000
1.270
8°
0.228
0.150
0.016
0°
0.244
0.157
0.050
8°
E1
L
θ
Suggested Pad Layout
Note:
1.Controlling dimension:in millimeters.
2.General tolerance:±0.05mm.
3.The pad layout is for reference purposes only
REEL SPECIFICATION
P/N
PKG
QTY
AO4812-MS
SOP–8
4000
Copyright© Msksemi Incorporated
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■
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have specifications
that can
handle applications that require extremely high levels of reliability, such as life-support
systems, aircraft’s control systems, or
other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with
your MSKSEMI Semiconductor representative
nearest you
before using any MSKSEMI Semiconductor products described
or contained herein in such
applications.
■
MSKSEMI Semiconductor assumes no responsibility for equipment failures that result from using products
at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in
products specificationsof any andall MSKSEMI Semiconductor products described orcontained herein.
■
Specifications of any and all MSKSEMI Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the
performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment.
T
o
verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test
devices mounted in the customer’sproducts orequipment.
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or events cannot occur. Such measures include but are
not limited to protective circuits anderror prevention circuitsfor safedesign, redundant design, and structural design.
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reliable, but no guarantees are made or
implied regarding its use or any infringementsof intellectual property rights or other rightsof third parties.
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Any and all information described or contained herein are subject to change without notice due to
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