Nexperia-2PB1424-115

Part #Nexperia-2PB1424-115
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Nexperia-2PB1424-115
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Dear Customer,  
On 7 February 2017 the former NXP Standard Product business became a new company with the  
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Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS  
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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use  
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on  
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– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights  
reserved  
Should be replaced with:  
–
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.  
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2PB1424  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
Rev. 02 — 15 January 2007  
Product data sheet  
1. Product
 
profile  
1.1 General
 
description  
PNP low V

CEsat

Breakthrough In Small Signal (BISS) transistor in a medium power  
SOT89 (SC-62/TO-243) flat lead Surface-Mounted Device (SMD) plastic package.  
NPN complement: 2PD2150.  
1.2 Features  
I
Low collector-emitter saturation voltage V

CEsat  

I
High collector current capability I

C

and I

CM  

I
High collector current gain (h

FE

) at high I

C  

I
High efficiency due to less heat generation  
I
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors  
1.3 Applications  
I
DC-to-DC conversion  
I
MOSFET gate driving  
I
Motor control  
I
Charging circuits  
I
Power switches (e.g. motors, fans)  
I
Thin Film
T
r
ansistor (TFT) backlight inverter  
1.4 Quick
 
reference data  
Table 1.  
Symbol Parameter  
V

CEO

collector-emitter voltage  
I

C  

Quick reference data  
Conditions  
Min  
Typ  
Max  
−
20  
−
3  
Unit  
V
open base  
–
–
–
–
–
–
collector current  
A
I

CM  

peak collector current  
single pulse;  
−
5  
A
t

p

≤
1 ms  
[1]  
V

CEsat  

collector-emitter  
I

C

=
−
2 A;  
–
−
0.2  
−
0.5  
V
saturation voltage  
I

B

=
−
0.1 A  
[1] Pulse
 
test: t

p

≤
300
µ
s;
δ ≤
0.02.  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
2. Pinning
 
information  
Table 2.  
Pinning  
Pin  
1
Description  
emitter  
Simplified outline  
Symbol  
2
1
2
collector  
base  
3
3
3
2
1
006aaa231  
3. Ordering
 
information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
2PB1424  
SC-62  
plastic surface-mounted package; collector pad for  
good heat transfer; 3 leads  
SOT89  
4. Marking  
Table 4.  
Marking codes  
Type number  
Marking code  
2PB1424  
M1  
5. Limiting
 
values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
V

CBO  

V

CEO  

V

EBO  

I

C  

Parameter  
Conditions  
Min  
Max  
−
20  
−
20  
−
6  
Unit  
V
collector-base voltage  
open emitter  
–
–
–
–
–
collector-emitter voltage
 
open base  
V
emitter-base voltage  
collector current  
open collector  
V
−
3  
A
I

CM  

peak collector current  
single pulse;  
−
5  
A
t

p

≤
1 ms  
[1]  
[2]  
P

tot  

total power dissipation  
T

amb

≤
25
°
C  
–
0.5  
W
–
2
W
T

j  

junction temperature  
ambient temperature  
storage temperature  
–
150  
+150  
+150  
°
C  
°
C  
°
C  
T

amb  

T

stg  

−
65  
−
65  
[1] Device
 
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2] Device
 
mounted on a ceramic PCB, Al

2

O

3

, standard footprint.  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
2 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
006aaa943  
2.4  
(1)  
P
tot  
(W)  
1.6  
0.8  
(2)  
0
−
75  
−
25  
0
25  
75  
125  
175  
(
°
C)  
T
amb  
(1) Ceramic
 
PCB, Al

2

O

3

, standard footprint  
(2) FR4
 
PCB, standard footprint  
Fig 1.
 
Power derating curves  
6. Thermal
 
characteristics  
Table 6.  
Symbol Parameter  
R

th(j-a)

thermal resistance from  
junction to ambient  
Thermal characteristics  
Conditions  
Min  
Typ  
Max  
250  
62  
Unit  
K/W  
K/W  
[1]  
in free air  
–
–
–
–
[2]  
[1] Device
 
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2] Device
 
mounted on a ceramic PCB, Al

2

O

3

, standard footprint.  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
3 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
006aaa944  
3
10  
duty cycle =  
Z
th(j-a)  
1
(K/W)  
0.75  
2
0.5  
0.2  
10  
0.33  
0.1  
0.05  
10  
0.02  
0.01  
1
0
−
1  
10  
−
5  
−
4  
−
3  
−
2  
−
1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, standard footprint  
Fig 2.
 
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
006aaa945  
2
10  
duty cycle =  
1
Z
th(j-a)  
0.75  
(K/W)  
0.5  
0.2  
0.33  
10  
0.1  
0.05  
0.02  
0.01  
1
0
−
1  
10  
−
5  
−
4  
−
3  
−
2  
−
1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
Ceramic PCB, Al

2

O

3

, standard footprint  
Fig 3.
 
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
4 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
7. Characteristics  
Table 7.  
Characteristics  
T

amb

= 25
°
C unless otherwise specified.  
Symbol Parameter
 
Conditions  
I

CBO

collector-base cut-off
 
V

CB

=
−
20 V; I

E

= 0 A  
Min  
Typ  
Max  
Unit  
–
–
−
0.1  
µ
A  
current  
I

EBO  

emitter-base cut-off  
current  
V

EB

=
−
5 V; I

C

= 0 A  
–
–
−
0.1  
µ
A  
h

FE  

DC current gain  
V

CE

=
−
2 V; I

C

=
−
0.1 A  
I

C

=
−
2 A; I

B

=
−
0.1 A  
180  
–
–
390  
[1]  
V

CEsat  

collector-emitter  
−
0.2  
−
0.5  
V
saturation voltage  
f

T  

transition frequency  
V

CE

=
−
2 V; I

E

= 0.5 A;  
f = 100 MHz  
–
–
–
125  
130  
37  
–
–
–
MHz  
pF  
pF  
C

ib  

C

ob  

common-base input  
capacitance  
V

EB

=
−
5 V; I

E

= i

e

= 0 A;  
f = 1 MHz  
common-base output
 
V

CB

=
−
10 V; I

E

= i

e

= 0 A;  
capacitance f
 
= 1 MHz  
[1] Pulse
 
test: t

p

≤
300
µ
s;
δ ≤
0.02.  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
5 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
006aaa946  
006aaa947  
4
−
10  
−
2.0  
I
(mA) =
−
20  
−
14  
−
12  
B
I
C
I
C
−
18  
−
16  
(A)  
(mA)  
−
1.6  
−
10  
−
8  
3
2
−
10  
−
1.2  
−
0.8  
−
0.4  
0
−
6  
−
4  
(1)  
(2) (3)  
−
10  
−
10  
−
1  
−
2  
0
−
0.2
−
0.4
−
0.6
−
0.8
−
1.0
−
1.2
−
1.4  
(V)  
0
−
0.2  
−
0.4  
−
0.6  
−
0.8  
−
1.0  
(V)  
V
V
BE  
CE  
V

CE

=
−
2 V  
T

amb

= 25
°
C  
(1) T

amb

= 100
°
C  
(2) T

amb

= 25
°
C  
(3) T

amb

=
−
40
°
C  
Fig 4.
 
Collector current as a function of base-emitter  
voltage; typical values  
Fig 5.
 
Collector current as a function of  
collector-emitter voltage; typical values  
006aaa948  
006aaa949  
3
−
5  
10  
I
(mA) =
−
50  
B
I
C
(1)  
(2)  
(A)  
−
45  
−
35  
h
FE  
−
4  
−
40  
−
30  
(3)  
2
10  
−
25  
−
15  
−
3  
−
2  
−
1  
0
−
20  
−
10  
−
5  
10  
1
2
3
4
0
−
1  
−
2  
−
3  
−
4  
−
5  
(V)  
−
1  
−
10  
−
10  
−
10  
−
10  
V
I (mA)  
C
CE  
T

amb

= 25
°
C  
V

CE

=
−
2 V  
(1) T

amb

= 100
°
C  
(2) T

amb

= 25
°
C  
(3) T

amb

=
−
40
°
C  
Fig 6.
 
Collector current as a function of  
collector-emitter voltage; typical values  
Fig 7.
 
DC current gain as a function of collector  
current; typical values  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
6 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
006aaa950  
006aaa951  
−
1  
−
1  
V
V
CEsat  
(V)  
CEsat  
(V)  
−
1  
−
1  
−
10  
−
10  
−
10  
−
10  
−
10  
−
10  
(1)  
(2)  
(3)  
(1)  
(2)  
(3)  
−
2  
−
3  
−
2  
−
3  
2
3
4
2
3
4
−
1  
−
10  
−
10  
−
10  
−
10  
−
1  
−
10  
−
10  
−
10  
−
10  
I
(mA)  
I (mA)  
C
C
I

C

/I

B

= 10  
I

C

/I

B

= 20  
(1) T

amb

= 100
°
C  
(2) T

amb

= 25
°
C  
(3) T

amb

=
−
40
°
C  
(1) T

amb

= 100
°
C  
(2) T

amb

= 25
°
C  
(3) T

amb

=
−
40
°
C  
Fig 8.
 
Collector-emitter saturation voltage as a  
function of collector current; typical values  
Fig 9.
 
Collector-emitter saturation voltage as a  
function of collector current; typical values  
006aaa952  
006aaa953  
3
−
1  
10  
V
f
T
(MHz)  
CEsat  
(V)  
(1)  
(2)  
(3)  
−
1  
2
−
10  
−
10  
−
10  
10  
−
2  
−
3  
10  
1
2
3
4
2
3
−
1  
−
10  
−
10  
−
10  
−
10  
1
10  
10  
10  
I
(mA)  
I (mA)  
E
C
I

C

/I

B

= 50  
T

amb

= 25
°
C; V

CE

=
−
2 V  
(1) T

amb

= 100
°
C  
(2) T

amb

= 25
°
C  
(3) T

amb

=
−
40
°
C  
Fig 10. Collector-emitter saturation voltage as a  
function of collector current; typical values  
Fig 11. Transition frequency as a function of emitter  
current; typical values  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
7 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
006aaa954  
006aaa955  
3
3
10  
10  
C
ib  
C
ob  
(pF)  
(pF)  
2
2
10  
10  
10  
−
10  
10  
−
10  
−
1  
2
−
1  
2
−
1  
−
10  
−
10  
−
1  
−
10  
−
10  
V
(V)  
V
(V)  
CB  
EB  
T

amb

= 25
°
C; f = 1 MHz; I

E

= i

e

= 0 A  
T

amb

= 25
°
C; f = 1 MHz; I

E

= i

e

= 0 A  
Fig 12. Common-base input capacitance as a function  
of emitter-base voltage; typical values  
Fig 13. Common-base output capacitance as a  
function of collector-base voltage; typical  
values  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
8 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
8. Package
 
outline  
4.6  
4.4  
1.8  
1.4  
1.6  
1.4  
2.6  
2.4  
4.25  
3.75  
1.2  
0.8  
1
2
3
0.53  
0.40  
0.48  
0.35  
0.44  
0.23  
1.5  
3
Dimensions in mm  
06-08-29  
Fig 14. Package outline SOT89 (SC-62/TO-243)  
9. Packing
 
information  
Table 8.  
Packing methods  
The indicated -xxx are the last three digits of the 12NC ordering code.

[1]  

Type number  
Package  
Description  
Packing quantity  
1000  
4000  
2PB1424  
SOT89  
8 mm pitch, 12 mm tape and reel  
-115  
-135  
[1] For
 
further information and the availability of packing methods, see
Section 13
.  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
9 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
10. Soldering  
4.75  
2.25  
2.00  
1.90  
1.20  
solder lands  
solder resist  
0.85  
0.20  
1.20  
1.20  
occupied area  
1.70  
solder paste  
4.60  
4.85  
Dimensions in mm  
0.50  
1.20  
1.00  
(3x)  
3
2
1
msa442  
0.60 (3x)  
0.70 (3x)  
3.70  
3.95  
SOT89 standard mounting conditions for reflow soldering  
Fig 15. Reflow soldering footprint SOT89 (SC-62/TO-243)  
6.60  
2.40  
3.50  
2
solder lands  
solder resist  
7.60  
0.50  
1.20  
3
1
occupied area  
3.00  
Dimensions in mm  
preferred transport direction during soldering  
msa423  
1.50  
0.70  
5.30  
Not recommended for wave soldering  
Fig 16. Wave soldering footprint SOT89 (SC-62/TO-243)  
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
10 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
11. Revision history  
Table 9.  
Revision history  
Document ID  
2PB1424_2  
Release date  
Data sheet status  
Change notice  
Supersedes  
20070115  
Product data sheet  
–
2PB1424_1  
Modifications:  
•
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP  
Semiconductors.  
•
Legal texts have been adapted to the new company name where appropriate.  
•
T
a
ble 1 “Quick reference data”
: I

C

collector current added  
•
T
a
ble 1 “Quick reference data”
: I

CM

peak collector current maximum value adapted  
•
T
a
ble 1 “Quick reference data”
: V

CEsat

collector-emitter saturation voltage added  
•
T
a
ble 5 “Limiting values”
: V

CBO

collector-base voltage maximum value adapted  
•
T
a
ble 5 “Limiting values”
: V

EBO

emitter-base voltage maximum value adapted  
•
T
a
ble 5 “Limiting values”
: I

C

collector current maximum value adapted  
•
T
a
ble 5 “Limiting values”
: I

CM

peak collector current maximum value adapted  
•
T
a
ble 5 “Limiting values”
: P

tot

total power dissipation for ceramic PCB condition added  
•
Figure 1 “Power derating curves”
: adapted  
•
T
a
ble 6 “Thermal characteristics”
: adapted  
•
T
a
ble 6 “Thermal characteristics”
: R

th(j-a)

thermal resistance from junction to ambient for ceramic PCB  
condition added  
•
Figure 2
: t

p

pulse time redefined to pulse duration  
•
Figure 3
: added  
•
T
a
ble 7 “Characteristics”
: I

CBO

collector-base cut-off current conditions adapted  
•
T
a
ble 7 “Characteristics”
: V

CEsat

collector-emitter saturation voltage typical value added  
•
T
a
ble 7 “Characteristics”
: f

T

transition frequency conditions and typical value adapted  
•
T
a
ble 7 “Characteristics”
: C

ib

common-base input capacitance added  
•
T
a
ble 7 “Characteristics”
: C

ob

common-base output capacitance added  
•
Figure 4
,
6
,
10
,
11
,
12
,
13
and
16
: added  
•
Figure 5
,
7
,
8
and
9
: adapted  
•
Section 12 “Legal information”
: updated  
2PB1424_1  
20050502  
Product data sheet  
–
–
2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
11 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
12. Legal information  
12.1 Data
 
sheet status  
Document status

[1][2]  

Product status

[3]  

Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet
 
Qualification  
Product [short] data sheet
 
Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL

.  
malfunction of a NXP Semiconductors product can reasonably be expected to  
12.2 Definitions  
result in personal injur
y
,
d
eath or severe property or environmental damage.  
NXP Semiconductors accepts no liability for inclusion and/or use of NXP  
Semiconductors products in such equipment or applications and therefore  
such inclusion and/or use is at the customer’s own risk.  
Draft —
The document is a draft version onl
y
.
T
he content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications —
Applications that are described herein for any of these  
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet —
A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values —
Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliabilit
y
.  
Terms and conditions of sale —
NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at

, including those pertaining to warrant
y
,  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
12.3 Disclaimers  
General —
Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license —
Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes —
NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use —
NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,  
space or life support equipment, nor in applications where failure or  
13. Contact information  
For additional information, please visit:

For sales office addresses, send an email to:

2PB1424_2  
© NXP B.
V
.
2
007. All rights reserved.  
Product data sheet  
Rev. 02 — 15 January 2007  
12 of 13  

2PB1424  
NXP Semiconductors  
20
V
, 3 A
P
NP low V

CEsat

(BISS) transistor  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
1.1  
1.2  
1.3  
1.4  
General description. . . . . . . . . . . . . . . . . . . . . .
 
1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
Applications .
 
. . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
Quick reference data. . . . . . . . . . . . . . . . . . . . .
 
1  
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
 
2  
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
 
2  
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
 
2  
Thermal characteristics. . . . . . . . . . . . . . . . . . .
 
3  
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
 
5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
 
9  
Packing information. . . . . . . . . . . . . . . . . . . . . .
 
9  
Soldering .
 
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
10  
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
 
1
1  
3
4
5
6
7
8
9
10  
11  
12  
Legal information. . . . . . . . . . . . . . . . . . . . . . .
 
12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
 
12  
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1
2  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1
2  
12.1  
12.2  
12.3  
12.4  
13  
14  
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
 
12  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.
V
.
 
2
007.  
All rights reserved.  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 15 January 2007  
Document identifier: 2PB1424_2