Nexperia-BSP220-115
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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP220
P-channel enhancement mode
vertical D-MOS transistor
April 1995
Product specification
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
FEATURES
QUICK REFERENCE DATA
•
Low R
DS(on)
SYMBOL
PARAMETER
CONDITIONS
MAX. UNIT
•
Direct interface to C-MOS, TTL,
etc.
−
V
DS
−
I
D
drain-source voltage
drain current
200
225
12
V
DC value
mA
Ω
•
High-speed switching
R
DS(on)
drain-source on-resistance
−
I
D
= 200 mA
−
V
GS
= 10 V
•
No secondary breakdown.
−
V
GS(th)
gate-source threshold
voltage
2.8
V
DESCRIPTION
P-channel enhancement mode
vertical D-MOS transistor in a
miniature SOT223 envelope and
intended for use in relay, high-speed
and line transformer drivers.
PIN CONFIGURATION
handbook, halfpage
4
d
PINNING – SOT223
PIN
DESCRIPTION
g
1
2
3
4
gate
drain
1
2
3
s
source
drain
Top view
MAM121
Fig.1 Simplified
outline and symbol.
April 1995
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage
CONDITIONS
MIN. MAX. UNIT
−
V
DS
±
V
GSO
−
I
D
−
200
20
V
gate-source voltage
drain current
open drain
DC value
−
V
−
225
600
1.5
mA
mA
W
−
I
DM
P
tot
drain current
peak value
−
total power dissipation
storage temperature range
junction temperature
up to T
amb
= 25
°
C (note 1)
−
T
stg
T
j
−
65
−
150
150
°
C
°
C
Note
1. Device
mounted on an epoxy printed-circuit board 40 x 40 x 1.5 mm; mounting pad for the drain lead minimum 6 cm
2
.
THERMAL RESISTANCE
SYMBOL
PARAMETER
VALUE
83.3
UNIT
K/W
R
th j-a
from junction to ambient (note 1)
Note
1. Device
mounted on an epoxy printed-circuit board 40 x 40 x 1.5 mm; mounting pad for the drain lead minimum 6 cm
2
.
April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
CHARACTERISTICS
T
j
= 25
°
C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
−
I
D
= 10
µ
A
GS
= 0
MIN. TY
P
.
M
AX. UNIT
−
V
(BR)DSS
drain-source breakdown voltage
200
−
−
V
V
−
I
DSS
±
I
GSS
−
V
GS(th)
R
DS(on)
Y
fs
drain-source leakage current
gate-source leakage current
gate-source threshold voltage
drain-source on-resistance
transfer admittance
−
V
DS
= 160 V
V
GS
= 0
−
−
1
µ
A
nA
V
±
V
GS
= 20 V
V
DS
= 0
−
−
100
2.8
12
−
−
I
D
= 1 mA
V
GS
= V
DS
0.8
−
−
−
I
D
= 200 mA
−
V
GS
= 10 V
10
Ω
−
I
D
= 200 mA
−
V
DS
= 25 V
100 200
mS
pF
C
iss
input capacitance
−
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
−
−
−
65
20
6
90
C
oss
output capacitance
−
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
30
15
pF
pF
C
rss
feedback capacitance
−
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
Switching times (see Figs
2
and
3
)
t
on
turn-on time
−
I
D
= 250 mA
−
V
DD
= 50 V
−
V
GS
= 0 to 10 V
−
−
5
20
30
ns
ns
t
off
turn-off time
−
I
D
= 250 mA
−
V
DD
= 50 V
20
−
V
GS
= 0 to 10 V
April 1995
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
handbook, halfpage
V
=
−
50 V
DD
handbook, halfpage
INPUT
10 %
90 %
10 %
0 V
I
OUTPUT
D
−
10 V
50
Ω
90 %
MBB689
t
t
on
off
MBB690
Fig.2 Switching
time test circuit.
Fig.3 Input
and output waveforms.
MBB693
MDA706
2
−
1
handbook,
P
handbook, halfpage
V
=
−
10 V
−
6 V
GS
I
tot
(W)
D
(A)
1.6
−
0.8
1.2
0.8
−
0.6
−
0.4
−
5 V
−
4 V
0.4
0
−
0.2
−
3 V
−
15
0
0
0
50
100
150
200
(
°
C)
−
5
−
10
−
20
V
−
25
(V)
T
amb
DS
Fig.4 Power
derating curve.
Fig.5 Typical
output characteristics; T
j
= 25
°
C.
April 1995
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
MDA707
MDA708
3
−
10
−
1
handbook, halfpage
handbook, halfpage
V
=
−
10 V
−
5 V
GS
I
D
(A)
I
−
0.8
D
(mA)
−
4 V
−
0.6
−
0.4
2
−
10
−
0.2
0
−
10
8
12
16
20
24
R
28
(
Ω
)
0
−
2
−
4
−
6
−
8
V
−
10
(V)
GS
DSon
Fig.6 Typical
transfer characteristic;
−
V
DS
= 10 V;
T
j
= 25
°
C.
Fig.7 Typical
on-resistance as a function of drain
current; T
j
= 25
°
C.
MDA734
MDA710
160
2.5
handbook, halfpage
handbook, halfpage
C
k
(pF)
2
120
80
1.5
1
C
iss
40
0.5
0
C
oss
C
rss
0
0
−
5
−
10
−
15
−
20
V
−
25
(V)
−
50
0
50
100
150
T (
°
C)
j
DS
Fig.9 Temperature
coefficient of drain-source
on-resistance;
R
DS
(
on
)
at T
j
Fig.8 Typical
capacitances as a function of
drain-source voltage; V
GS
= 0; f = 1 MHz;
T
j
= 25
°
C.
———————————————-
k
=
;
R
DS
(
on
)
at 25
°
C
typical R
DS(on)
at
−
200 mA/
−
10 V.
April 1995
6
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
MDA711
1.1
handbook, halfpage
k
1
0.9
0.8
0.7
−
50
0
50
100
150
T (
°
C)
j
Fig.10 Temperature
coefficient of gate-source
threshold voltage;
V
GS
(
th
)
at T
j
——————————————–
k
=
;
V
GS
(
th
)
at 25
°
C
typical -V
GS(th)
at -1 mA.
April 1995
7
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
SOT223
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8
1.5
0.10 0.80
0.01 0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
7.3
6.7
1.1
0.7
0.95
0.85
mm
4.6
2.3
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
96-11-11
97-02-28
SOT223
April 1995
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
NOTES
April 1995
10
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
NOTES
April 1995
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/01/pp12
Date of release: April 1995
Document order number:
9397 750 02482
